Commit Graph

650 Commits

Author SHA1 Message Date
danh-arm e9ced6f291 Merge pull request #825 from dp-arm/dp/simplify-cond
tbbr: Simplify conditional
2017-01-31 15:38:19 +00:00
danh-arm 424ad49117 Merge pull request #819 from davidcunado-arm/dc/build_with_gcc6.2
Resolve build errors flagged by GCC 6.2
2017-01-31 11:09:27 +00:00
dp-arm f3ded3782c tbbr: Simplify conditional
These are equivalent so use the reduced form.

Change-Id: I40ca097411b9abab69985b8e4dbccf7582eae49e
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-01-31 10:55:04 +00:00
David Cunado 9edac0479d Resolve build errors flagged by GCC 6.2
With GCC 6.2 compiler, more C undefined behaviour is being flagged as
warnings, which result in build errors in ARM TF build.

The specific issue that this patch resolves is the use of (1 << 31),
which is predominantly used in case statements, where 1 is represented
as a signed int. When shifted to msb the behaviour is undefined.

The resolution is to specify 1 as an unsigned int using a convenience
macro ULL(). A duplicate macro MAKE_ULL() is replaced.

Fixes ARM-software/tf-issues#438

Change-Id: I08e3053bbcf4c022ee2be33a75bd0056da4073e1
Signed-off-by: David Cunado <david.cunado@arm.com>
2017-01-26 13:47:37 +00:00
Koan-Sin Tan 201d535ff6 Remove use of all deprecated APIs
Now it's possbile to build BL31 for MT8173 with ERROR_DEPRECATED=1.

Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
2017-01-24 10:50:14 +08:00
Koan-Sin Tan 8bc20038af Get rid of use of old GIC APIs
Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
2017-01-24 10:50:14 +08:00
Koan-Sin Tan 9cfd83e95f Add support of PSCI_EXTENDED_STATE_ID to MT8173
Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
2017-01-24 10:50:14 +08:00
Koan-Sin Tan 3fc26aa093 Get rid of use of compatibility API
make 'make ARCH=aarch64 CROSS_COMPILE=aarch64-linux-gnu- PLAT=mt8173
ENABLE_PLAT_COMPAT=0' work.

Change-Id: I13f35d8aef23dfa0e65883fa0be43f1513c9fef5
Signed-off-by: Koan-Sin Tan <koansin.tan@gmail.com>
2017-01-24 10:50:14 +08:00
Masahiro Yamada 6af03f9c45 Use #ifdef for AARCH32 instead of #if
One nasty part of ATF is some of boolean macros are always defined
as 1 or 0, and the rest of them are only defined under certain
conditions.

For the former group, "#if FOO" or "#if !FOO" must be used because
"#ifdef FOO" is always true.  (Options passed by $(call add_define,)
are the cases.)

For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because
checking the value of an undefined macro is strange.

For AARCH32/AARCH64, these macros are defined in the top-level
Makefile as follows:

ifeq (${ARCH},aarch32)
        $(eval $(call add_define,AARCH32))
else
        $(eval $(call add_define,AARCH64))
endif

This means only one of the two is defined.  So, AARCH32/AARCH64
belongs to the latter group where we should use #ifdef or #ifndef.
The conditionals are mostly coded correctly, but I see some mistakes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-24 01:01:21 +09:00
Masahiro Yamada 3d8256b2a1 Use #ifdef for IMAGE_BL* instead of #if
One nasty part of ATF is some of boolean macros are always defined
as 1 or 0, and the rest of them are only defined under certain
conditions.

For the former group, "#if FOO" or "#if !FOO" must be used because
"#ifdef FOO" is always true.  (Options passed by $(call add_define,)
are the cases.)

For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because
checking the value of an undefined macro is strange.

Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like
follows:

  $(eval IMAGE := IMAGE_BL$(call uppercase,$(3)))

  $(OBJ): $(2)
          @echo "  CC      $$<"
          $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@

This means, IMAGE_BL* is defined when building the corresponding
image, but *undefined* for the other images.

So, IMAGE_BL* belongs to the latter group where we should use #ifdef
or #ifndef.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-24 01:01:21 +09:00
davidcunado-arm f38d93fdbf Merge pull request #801 from masahir0y/cleanup
Macro cleanups
2017-01-18 13:47:06 +00:00
danh-arm 1dd920fc75 Merge pull request #809 from paulkocialkowski/integration
mt8173: Correct SPM MCDI firmware length
2017-01-18 10:55:01 +00:00
Masahiro Yamada 7a2b35d807 qemu: remove unused BL32_SIZE
I do not see any line that references BL32_SIZE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-18 19:33:41 +09:00
Masahiro Yamada 4749705355 Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too).
Move them to include/plat/common/common_def.h.

While we are here, suffix the end address with _END instead of
_LIMIT.  The _END is a better fit to indicate the linker-derived
real end address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-18 19:33:41 +09:00
Masahiro Yamada ecdc898da3 Use *_END instead of *_LIMIT for linker derived end addresses
The usage of _LIMIT seems odd here, so rename as follows:
  BL_CODE_LIMIT     --> BL_CODE_END
  BL_RO_DATA_LIMIT  --> BL_RO_DATA_END
  BL1_CODE_LIMIT    --> BL1_CODE_END
  BL1_RO_DATA_LIMIT --> BL1_RO_DATA_END

Basically, we want to use _LIMIT and _END properly as follows:
  *_SIZE + *_MAX_SIZE = *_LIMIT
  *_SIZE + *_SIZE     = *_END

The _LIMIT is generally defined by platform_def.h to indicate the
platform-dependent memory constraint.  So, its typical usage is
  ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.")
in a linker script.

On the other hand, _END is used to indicate the end address of the
compiled image, i.e. we do not know it until the image is linked.

Here, all of these macros belong to the latter, so should be
suffixed with _END.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-18 19:33:28 +09:00
Paul Kocialkowski 03be4806fd mt8173: Correct SPM MCDI firmware length
The actual length of the firmware is 1001 32 bit words.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2017-01-14 17:11:12 +01:00
Masahiro Yamada 152c8c11b7 utils: move BIT(n) macro to utils.h
We are duplicating this macro define, and it is useful enough
to be placed in the common place.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-13 04:34:24 +09:00
danh-arm 236c27d21f Merge pull request #805 from Xilinx/zynqmp/addr_space_size
zynqmp: Migrate to new address space macros
2017-01-10 11:12:08 +00:00
Soren Brinkmann 7b2a268e53 zynqmp: Migrate to new address space macros
Commit 0029624fe2 ("Add
PLAT_xxx_ADDR_SPACE_SIZE definition") deprecates 'ADDR_SPACE_SIZE' in
favor of PLAT_(PHY|VIRT)_ADDRESS_SPACE_SIZE. Migrate the zynqmp platform
to use the new interface.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2017-01-06 11:07:00 -08:00
Patrick Georgi 742df4f614 rockchip: Build m0 firmware without standard libraries
Depending on the compiler used, it might try to link in libc even though
it's not required. Stop it from doing that.

Signed-off-by: Patrick Georgi <pgeorgi@google.com>
2017-01-04 19:06:14 +01:00
danh-arm e60f189751 Merge pull request #792 from masahir0y/zynqmp
zynqmp: add "override" directive to mandatory options
2016-12-20 17:00:59 +00:00
danh-arm bd83b41a30 Merge pull request #791 from jeenu-arm/asm-assert-32
AArch32: Print ASM_ASSERT and panic messages
2016-12-20 17:00:32 +00:00
Masahiro Yamada 34071d6aec zynqmp: add "override" directive to mandatory options
The platform.mk sets build options required for ZynqMP, but users
can still change them from the command line, like:

  make PLAT=zynqmp RESET_TO_BL31=0 CROSS_COMPILE=...

Then, the makefile shows an error message in that case:
  Using BL31 as the reset vector is only one option supported on ZynqMP.
  Please set RESET_TO_BL31 to 1.

If the option is not user-configurable, the makefile can specify
"override" to prevent users from changing it.  We do not need the
error message for the case that never happens.

Likewise, ENABLE_PLAT_COMPAT := 0 and PROGRAMMABLE_RESET_ADDRESS := 1
are mandatory to avoid build error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-12-21 00:55:29 +09:00
danh-arm 9acdafbccf Merge pull request #793 from jeenu-arm/gic-changes
GIC driver changes for extended power management
2016-12-20 12:26:23 +00:00
Sandrine Bailleux 949a52d24e Fix integer overflows in BL1 FWU code
Before adding a base address and a size to compute the end
address of an image to copy or authenticate, check this
won't result in an integer overflow. If it does then consider
the input arguments are invalid.

As a result, bl1_plat_mem_check() can now safely assume the
end address (computed as the sum of the base address and size
of the memory region) doesn't overflow, as the validation is
done upfront in bl1_fwu_image_copy/auth(). A debug assertion
has been added nonetheless in the ARM implementation in order
to help catching such problems, should bl1_plat_mem_check()
be called in a different context in the future.

Fixes TFV-1: Malformed Firmware Update SMC can result in copy
of unexpectedly large data into secure memory

Change-Id: I8b8f8dd4c8777705722c7bd0e8b57addcba07e25
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Dan Handley <dan.handley@arm.com>
2016-12-20 11:43:10 +00:00
Dan Handley 19d2595d41 Merge pull request #785 from dp-arm/dp/nvcounter 2016-12-20 11:36:54 +00:00
danh-arm 28076fad49 Merge pull request #781 from yatharth-arm/yk/aarch64_tbbr_load_img_v2
Enable TRUSTED_BOARD_BOOT support for LOAD_IMAGE_V2=1
2016-12-19 15:39:55 +00:00
Jeenu Viswambharan e12cb61f0e AArch32: Print ASM_ASSERT and panic messages
ASM_ASSERT failure and panic messages are suppressed at present. This
patch enables printing the PC location for panic messages, and file name
and line number upon assembly assert failure.

Change-Id: I80cb715988e7ce766f64da1e1d7065a74a096a0c
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2016-12-19 11:57:12 +00:00
dp-arm d35dee23b6 tbbr: Fix updating of Non-Trusted NV counter
The previous code required that a certificate be signed with the ROT
key before the platform's NV counter could be updated with the value
in the certificate.  This implies that the Non-Trusted NV counter was
not being updated for Non-Trusted content certificates, as they cannot
be signed with the ROT key in the TBBR CoT scheme.

The code is reworked to only allow updating the platform's Trusted NV
counter when a certificate protected by the Trusted NV counter is
signed with the ROT key.

Content certificates protected by the Non-Trusted NV counter are
allowed to update the platform's Non-Trusted NV counter, assuming
that the certificate value is higher than the platform's value.

A new optional platform API has been introduced, named
plat_set_nv_ctr2().  Platforms may choose to implement it and perform
additional checks based on the authentication image descriptor before
modifying the NV counters.  A default weak implementation is available
that just calls into plat_set_nv_ctr().

Fixes ARM-software/tf-issues#426

Change-Id: I4fc978fd28a3007bc0cef972ff1f69ad0413b79c
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2016-12-15 14:12:35 +00:00
Jeenu Viswambharan 74a9578c20 FVP: Avail GIC Redistributor power management
Earlier patches introduced GIC Redistributor power management for ARM
platforms. This patch modifies FVP power management to power down
Redistributor during CPU power on/off.

Change-Id: I2adb9c50a7dd750019fe3b4e576b5d5fc364bffb
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2016-12-15 14:08:26 +00:00
Jeenu Viswambharan d17b953ab3 Introduce ARM platform APIs for GICv3 Redistributor
As with other ARM platform GIC APIs, these directly invoke the GICv3
driver APIs for Redistributor power management.

For the sake of uniform GIC API, empty stubs are placed for those GIC
drivers that lack Redistributor component.

Change-Id: Iad0d760d4dbca790998f7768cda621ff3b15a864
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2016-12-15 14:08:26 +00:00
Yatharth Kochar 53d703a555 Enable TRUSTED_BOARD_BOOT support for LOAD_IMAGE_V2=1
This patch enables TRUSTED_BOARD_BOOT (Authentication and FWU)
support, for AArch64, when LOAD_IMAGE_V2 is enabled.

This patch also enables LOAD_IMAGE_V2 for ARM platforms.

Change-Id: I294a2eebce7a30b6784c80c9d4ac7752808ee3ad
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
2016-12-14 14:37:53 +00:00
Antonio Nino Diaz ede939f26d Fix incorrect copyright notices
Some files have incorrect copyright notices, this patch fixes all
files with deviations from the standard notice.

Change-Id: I66b73e78a50a235acb55f1e2ec2052a42c0570d2
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2016-12-14 14:31:32 +00:00
danh-arm 1b5fa6ef10 Merge pull request #774 from jeenu-arm/no-return-macro
Define and use no_ret macro where no return is expected
2016-12-12 14:29:01 +00:00
danh-arm 535f185a5c Merge pull request #770 from yatharth-arm/yk/AArch32_fixes
AArch32: Miscellaneous fixes in the AArch32 code
2016-12-08 12:20:21 +00:00
Soby Mathew 5486a9653b Allow ARM Standard platforms to dynamically define PSCI capability
The capabilities exposed by the PSCI generic layer depends on the hooks
populated by the platform in `plat_arm_psci_pm_ops`. Currently ARM
Standard platforms statically define this structure. However, some
platforms may want to modify the hooks at runtime before registering
them with the generic layer.

This patch introduces a new ARM platform layer API
`plat_arm_psci_override_pm_ops` which allows the platform to probe
the power controller and modify `plat_arm_psci_pm_ops` if required.
Consequently, 'plat_arm_psci_pm_ops' is no longer qualified as
`const` on ARM Standard platforms.

Change-Id: I7dbb44b7bd36c20ec14ded5ee45a96816ca2ab9d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2016-12-07 12:45:55 +00:00
Soby Mathew b12a2b493e Introduce SCP power management abstraction
This patch introduces an additional layer of abstraction between
CSS power management hooks and the SCPI driver. A new set of APIs
are introduced in order to abstract out power management operations
from underlying communication mechanism with the SCP.

The SCPI and the associated MHU drivers are moved into a `drivers`
folder in CSS. The new SCP communication abstraction layer is added
in the `drivers/scp` folder. The existing CSS power management
uses the new APIs to reflect this abstraction.

Change-Id: I7d775129fc0558e9703c2724523fb8f0a916838c
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2016-12-07 12:45:55 +00:00
Jeenu Viswambharan a806dad58c Define and use no_ret macro where no return is expected
There are many instances in ARM Trusted Firmware where control is
transferred to functions from which return isn't expected. Such jumps
are made using 'bl' instruction to provide the callee with the location
from which it was jumped to. Additionally, debuggers infer the caller by
examining where 'lr' register points to. If a 'bl' of the nature
described above falls at the end of an assembly function, 'lr' will be
left pointing to a location outside of the function range. This misleads
the debugger back trace.

This patch defines a 'no_ret' macro to be used when jumping to functions
from which return isn't expected. The macro ensures to use 'bl'
instruction for the jump, and also, for debug builds, places a 'nop'
instruction immediately thereafter (unless instructed otherwise) so as
to leave 'lr' pointing within the function range.

Change-Id: Ib34c69fc09197cfd57bc06e147cc8252910e01b0
Co-authored-by: Douglas Raillard <douglas.raillard@arm.com>
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2016-12-05 14:55:35 +00:00
Yatharth Kochar 69d59e0ce9 AArch32: Miscellaneous fixes in the AArch32 code
This patch makes following miscellaneous fixes:
* pl011_console.S: Fixed the bit mask used to check if the
  transmit FIFO is full or empty.
* smcc_macros.S: Added `_fsxc` suffix while updating the SPSR.
  By default the assembler assumes `_fc` suffix which does not
  update all the fields in SPSR. By adding `_fsxc` suffix all
  the fields gets updated.
* platform_helpers.S: Removed the weak definition for
  `plat_my_core_pos()` as this is a mandatory function which
  needs to be defined by all platforms.

Change-Id: I8302292533c943686fff8d7c749a07132c052a3b
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
2016-12-01 11:02:51 +00:00
Soren Brinkmann aa2345e917 rk3399: Add CFI debug information to SRAM functions
Commit b91d935fee
("Add CFI debug frame information for ASM functions") modifies the
assembly macros 'func' and 'endfunc' to include CFI debug frame
information.

The rockchip platform uses a custom version of the 'func' macro with the
common 'endfunc' macro. The custom macro wasn't updated in
b91d935fee resulting in the following
build error:
  plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S: Assembler messages:
  plat/rockchip/rk3399/drivers/pmu/plat_pmu_macros.S:155: Error: .cfi_endproc without corresponding .cfi_startproc
  Makefile:532: recipe for target 'build/rk3399/release/bl31/plat_helpers.o' failed
  make: *** [build/rk3399/release/bl31/plat_helpers.o] Error 1

Fixing this by updating the sram_func macro in the rk3399 port.

Fixes: b91d935fee ("Add CFI debug frame information for ASM functions")
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-24 14:14:39 -08:00
danh-arm 5c0df525ac Merge pull request #762 from douglas-raillard-arm/dr/doc_build_info
Clarify dependency for PSCI_EXTENDED_STATE_ID
2016-11-22 10:49:57 +00:00
Douglas Raillard 91a422d69f Clarify dependency for PSCI_EXTENDED_STATE_ID
Add dependency information in the user guide for ARM_RECOM_STATE_ID_ENC
that needs to be set when using PSCI_EXTENDED_STATE_ID on ARM
platforms. Also clarify the build error message.

Change-Id: Id125a0299b179f5f222bca4e2503204bf89a3c59
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
2016-11-22 10:05:47 +00:00
Soren Brinkmann 300cbb0bdb zynqmp: pm: Add SiP call to obtain PM callback data
The callback IRQ is delivered to the NS OS. Provide an interface to
allow the NS OS to obtain the callback data from the secure HW.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:55:58 -08:00
Soren Brinkmann a76c3697a0 zynqmp: pm: Enable IPI IRQ when API version is probed
The IPI hardware is secure and managed by ATF, nevertheless we deliver
the IRQ to the rich OS. The IRQ is needed to receive PM callbacks.
Enable the IPI interrupt when the rich OS probes the API version.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:55:58 -08:00
Soren Brinkmann 9f8a2e2425 zynqmp: Remove dead code
Remove dead code pieces and stale comments.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:55:52 -08:00
Soren Brinkmann 79c96f8afe zynqmp: Fix UART1 base address
Cc: Michal Simek <michal.simek@xilinx.com>
Reported-by: Jonas Karlsson <jonas.karlsson@atero.se>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-11-16 15:48:48 -08:00
Soren Brinkmann 8353170321 zynqmp: PM: Migrate to new shutdown interface
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:48:48 -08:00
Soren Brinkmann 46cb684f32 zynqmp: pm: Plumb get_chipid through FW interface
Use the PMUFW get_chipid call to obtain IDCODE and version register.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:48:48 -08:00
Soren Brinkmann dc0c5a42d6 zynqmp: pm: Allow obtaining additional return values from FW
Allow reading more than just a single value from the message buffer.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
2016-11-16 15:48:48 -08:00
Soren Brinkmann e89f4af7dd zynqmp: Do not alter system counter
On ZynqMP the FSBL will configure the system counter. Hence, remove the
initialization of the system counter with hardcoded values from the ATF
and use the setup provided by the bootloader.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2016-11-16 15:48:48 -08:00