Commit Graph

2054 Commits

Author SHA1 Message Date
Antonio Niño Díaz cae725bf38
Merge pull request #1721 from marex/arm/master/memsize-passing-v2
plat: rcar: Move FDT from x3 to x1
2018-12-18 15:24:52 +01:00
Antonio Niño Díaz 85686f1842
Merge pull request #1717 from satheesbalya-arm/sb1/sb1_2629_romlib_ifc
romlib: Add platform specific jump table list
2018-12-18 15:22:49 +01:00
Sathees Balya 8b9a0de440 romlib: Add platform specific jump table list
This patch allows platforms to define their
own jump table list for library at ROM. The
file has the list of functions to be used
from library at ROM. It can also include
other list files.

Change-Id: I721c35d7dad3dcadbb3a7f3277bfd5d3e1f6e00a
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
2018-12-18 13:55:47 +00:00
Marek Vasut 06ce6912b3 plat: rcar: Move FDT from x3 to x1
As suggested, pass the FDT to BL 33 via x1 instead of x3 , to be
consistent with the other platforms.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-13 22:08:24 +01:00
Yann Gautier 941ba04396 stm32mp1: remove useless compilation flags
On AARCH32, thumb is used by default, no need to redefine it.
As all our binaries are compiled with thumb, interwork is not needed.
The binaries compiled with or without those flags are the same,
except of course for the date.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-12-13 15:01:53 +01:00
Soby Mathew c0940083bc
Merge pull request #1708 from Yann-lms/warnings
Add possibility to add compilation warnings
2018-12-12 15:54:47 +00:00
Antonio Niño Díaz fca0a51ff5
Merge pull request #1707 from antonio-nino-diaz-arm/an/spm
SPM: Initial prototype based on SPCI and SPRT
2018-12-11 17:48:17 +01:00
Antonio Nino Diaz bbc8100720 SPM: Support multiple xlat tables contexts
Change-Id: Ib7c2529b85bb5930d44907edfc8ead13d3b1ef4d
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-11 13:45:41 +00:00
Antonio Nino Diaz ffb7ce70b3 SPM: Map memory regions from RD
SPM needs to map a number of regions on behalf of the secure partition.
Previously, it used to get a list of them from platform code using the
plat_get_secure_partition_mmap() API. Now it gets them from the resource
description structure.

The SPM<->SP shared buffer is mapped dynamically at EL3. This buffer is
used to pass information between SPM and SP, so it must be mapped at EL3
as well in order to be used by SPM.

Dynamic translation tables have been enabled when the Trusted Firmware
is compiled with SPM support.

Change-Id: I64ad335e931661812a0a60558e60372e1e5e6b72
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-11 13:45:41 +00:00
Antonio Nino Diaz 680389a65a SPM: Load image and RD from SP package
Load SP and RD from package instead of relying on RD being already
loaded in memory and the SP being loaded as a BL32 image.

Change-Id: I18d4fbf4597656c6a7e878e1d7c01a8a324f3f8a
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-11 13:45:41 +00:00
Soby Mathew 19122fcada
Merge pull request #1714 from chandnich/sgiclark-helios
SGI-Clark.Helios platform support patches
2018-12-11 10:53:36 +00:00
Yann Gautier 1b18c6c471 correct some missing-prototype warnings
This avoids the following warnings:
no previous prototype for 'bl2_arch_setup' [-Wmissing-prototypes]
no previous prototype for 'plat_log_get_prefix' [-Wmissing-prototypes]

Also correct a compilation issue if BL2_IN_XIP_MEM is enabled:
uintptr_t is not defined.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-12-10 18:09:49 +01:00
Yann Gautier b7c6529c41 io_block: define MAX_IO_BLOCK_DEVICES as unsigned
This is used as a table index, and already compared with an unsigned int:
block_dev_count.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-12-10 18:09:49 +01:00
Antonio Nino Diaz 09d413a158 SPM: Remove SP memory mappings definitions
This information is retrieved from the resource description now.

Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-10 16:37:46 +00:00
Antonio Nino Diaz 08aa122bf5 SPM: Deprecate boot info struct
This information is defined by the Secure Partition in the resource
description.

Change-Id: Ia7db90c5de8360a596106880d3f6a632a88d3ea8
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-10 16:37:46 +00:00
Antonio Nino Diaz e458302be0 SPM: Introduce functions to load DTB files
Introduce helpers to create resource description struct, as well as code
to load the information from DTB files.

Change-Id: I0f5bb94eb8b01c6cb53fe807a9db0c05a70d7a43
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-10 16:37:46 +00:00
Antonio Nino Diaz 73f45ba4a9 fvp: Increase stack size when SPM is enabled
Change-Id: Iec265dc85d44f35048d1fbcfbe55960d45570027
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-10 16:37:46 +00:00
Antonio Niño Díaz 74203d268e
Merge pull request #1704 from marex/arm/master/memsize-passing-v1
Arm/master/memsize passing v1
2018-12-10 15:18:23 +01:00
Soby Mathew 85456a9201
Merge pull request #1700 from jwerner-chromium/JW_crashfix
MULTI_CONSOLE_API fixes and cleanups
2018-12-10 14:00:01 +00:00
Julius Werner 985ee0b7e8 drivers/console: Link console framework code by default
This patch makes the build system link the console framework code by
default, like it already does with other common libraries (e.g. cache
helpers). This should not make a difference in practice since TF is
linked with --gc-sections, so the linker will garbage collect all
functions and data that are not referenced by any other code. Thus, if a
platform doesn't want to include console code for size reasons and
doesn't make any references to console functions, the code will not be
included in the final binary.

To avoid compatibility issues with older platform ports, only make this
change for the MULTI_CONSOLE_API.

Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-12-06 16:13:50 -08:00
Julius Werner 63c52d0071 plat/common/crash_console_helpers.S: Fix MULTI_CONSOLE_API support
Crash reporting via the default consoles registered by MULTI_CONSOLE_API
has been broken since commit d35cc34 (Console: Use callee-saved
registers), which was introduced to allow console drivers written in C.
It's not really possible with the current crash reporting framework to
support console drivers in C, however we should make sure that the
existing assembly drivers that do support crash reporting continue to
work through the MULTI_CONSOLE_API.

This patch fixes the problem by creating custom console_putc() and
console_flush() implementations for the crash reporting case that do not
use the stack. Platforms that want to use this feature will have to link
plat/common/aarch64/crash_console_helpers.S explicitly.

Also update the documentation to better reflect the new reality (of this
being an option rather than the expected default for most platforms).

Change-Id: Id0c761e5e2fddaf25c277bc7b8ab603946ca73cb
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-12-06 16:10:32 -08:00
Julius Werner b2f7c9dd80 plat/common: Remove duplication of plat_crash_console functions/stubs
Commit e74afb652 (Deprecate weak crash console functions) deprecated the
default inclusion of weak definitions for plat_crash_console functions
in plat/common/aarch64/platform_helpers.S. The code was later copied out
to plat/common/aarch64/crash_console_helpers.S so platforms can link it
explicitly if they want to. However, since deprecation does not mean
removal, the same code is also still duplicated in platform_helpers.S.

The duplicated code contains both empty stubs for the !MULTI_CONSOLE_API
case, and a real implementation that used to work but was broken by
commit d35cc34 (Console: Use callee-saved registers) for
MULTI_CONSOLE_API. It's not great to have both of these duplicated in
two files, so this patch splits them up: in platform_helpers.S we'll
only keep the empty stubs (guarded by !ERROR_DEPRECATED), which should
not regress functionality since the MULTI_CONSOLE_API implementation was
already broken anyway. In crash_console_helpers.S, we'll only keep the
MULTI_CONSOLE_API version, which is enough both as an implementation in
itself and as a sample for how to reimplement these functions in a
platform-specific file.

Change-Id: I83d95a90ab6aac597dc2ea2f2797ac2c8ed075d4
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-12-06 16:09:42 -08:00
Soby Mathew f7ed4ab07a
Merge pull request #1713 from chandnich/nt-fw-config
plat/arm/sgi: Use NT_FW_CONFIG instead of HW_CONFIG
2018-12-06 15:07:44 +00:00
Antonio Niño Díaz 8dc395e3ed
Merge pull request #1706 from Yann-lms/mmc_init_check
MMC init check and STM32MP1 MMC driver improvements
2018-12-06 11:28:53 +01:00
Chandni Cherukuri a46cdc0533 plat/arm/sgi: Add board support for SGI-Clark.Helios platform
SGI-Clark.Helios platform is similar to SGI-Clark.Ares platform.
The difference between these two platforms is the CPU type and
the number of CPUs. Add the base support for SGI-Clark.Helios platform.

Change-Id: I2b04cb3fb953907848b4fab016e3648899ca4256
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2018-12-06 15:52:06 +05:30
Chandni Cherukuri 187ae3158c plat/arm/sgi: override 'plat_psci_ops_t' for SGI-Clark.Helios platform
For SGI-Clark.Helios platform, at present, only the CPU power ON/OFF
ops are supported. So override the PSCI ops to allow callbacks only
for CPU power ON/OFF operations.

Change-Id: Idc0a3deb78cb850310cbe849d77604fa9881579c
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2018-12-06 15:52:06 +05:30
Chandni Cherukuri 982261f7ec plat/arm/sgi: add platform support for SGI-Clark.Helios platform
SGI-Clark.Helios platform is based on multi-threaded CPUs and uses an
additional thread power domain level as well.

Define a power domain tree descriptor 'sgi_clark_helios_pd_tree_desc'
for SGI-Clark.Helios platform and let the function
'plat_get_power_domain_tree_desc' pick up the correct power
domain tree descriptor based on the platform.

Change-Id: Ibc6d551b570bc740053316a3608c455679d9155b
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2018-12-06 15:51:54 +05:30
Marek Vasut a6de3db7bb plat: rcar: Generate FCNL reserved memory node
Generate a /reserved-memory node for FCNL in the DT passed to
subsequent stages, so they will know how the FCNL is configured.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 10:23:54 +01:00
Marek Vasut ac49c5fbe9 plat: rcar: Generate platform compatible string
Generate /compatible string for the platform, so that the subsequent
stages know which platform they are running on. This could be useful
when ie. building U-Boot that contains DTs for multiple platforms and
can thus decide on which platform it is running. This would ultimately
allow single bootloader binary for all Gen3 platforms.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 10:23:54 +01:00
Marek Vasut 1d85c4bd5b plat: rcar: Pass DTB with DRAM layout from BL2 to next stages
Pass DTB containing DRAM layout from BL2 to BL33 via register x3, so
that the BL33 can simply consume it and get accurate DRAM layout info.
BL33 is in most usecases U-Boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 10:23:54 +01:00
Marek Vasut 851851519d plat: rcar: Use array in the DRAM size reporting
Use array of start-size tuples for the DRAM banks and call single
function which iterates over this array to report the DRAM info.
This is in preparation for expanding this to generate FDT for the
next stage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 10b7a4aeca plat: rcar: Print DRAM configuration after init
Print the DRAM configuration only after the DRAM was initialized. This
will be useful when deduplicating code populating FDT passed to U-Boot,
since it will contain the same macros as bl2_advertise_dram_size().

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut e1eddfea88 plat: rcar: Fill in memory information for M3W, M3N
Make the DRAM configuration debug print consistent for all supported SoCs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 7bf24ae3c6 plat: rcar: Drop H3 v3.0 check on DRAM debug print
There is nothing preventing H3 older than v3.0 from printing the
DRAM configuration, just like v3.0 and newer. Drop the check and
let all H3 revisions print DRAM configuration in BL2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 3b507aabd8 plat: rcar: Add E3 1GBx4 debug print
RCAR_DRAM_DDR3L_MEMCONF = 2 means E3 with 1GBx4 memory configuration.
Add debug print for this configuration for completeness sake.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Marek Vasut 358ed930f4 plat: rcar: Move DRAM layout print to separate function
Just move the DRAM layout information into separate function,
no functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06 01:59:10 +01:00
Chandni Cherukuri 77ab969a8a plat/arm/sgi: Use NT_FW_CONFIG instead of HW_CONFIG
With the two new APIs 'plat_arm_sgi_get_platform_id' and
'plat_arm_sgi_get_config_id' that are available now, BL31 need not
depend on hw_config device tree to identify the platform. In addition
to this, the existing hardware description in hw_config can be limited
to use by BL33 and not by the operating system.

So the hardware description from hw_config dts can be moved into
nt_fw_config dts and the use of hw_config dts can be removed.

Change-Id: I873b7e1e72823d3ec5d253a848e85ae724f09e49
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
2018-12-05 22:15:51 +05:30
Antonio Niño Díaz 36bc633eec
Merge pull request #1653 from JackyBai/master
Add NXP i.MX8MQ basic support
2018-12-05 11:22:55 +01:00
Bai Ping 8113681992 plat: imx: Add i.MX8MQ basic support
i.MX8MQ is new SOC of NXP's i.MX8M family based on
A53. It can provide industry-leading audio, voice
and video processing for applications that scale
from consumer home audio to industrial building
automation and mobile computers

this patchset add the basic supoort to boot up
the 4 X A53. more feature will be added later.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-12-05 08:58:51 +08:00
Antonio Niño Díaz 03ce162080
Merge pull request #1703 from oscardagrach/hikey960-dmac-fix
hikey960: initialize EDMAC and channels
2018-12-04 17:19:50 +01:00
Antonio Nino Diaz ae4a99b954
Merge pull request #1705 from chandnich/platform-id
plat/arm/sgi: Use platform specific functions to get platform ids
2018-12-04 14:07:36 +00:00
Antonio Niño Díaz 6d422c3e2b
Merge pull request #1702 from MISL-EBU-System-SW/patches-18.12
Update code with latest changes from Marvell LSP 18.12
2018-12-04 15:01:48 +01:00
Konstantin Porotchkin f32f3899f8 plat/marvell: update platform LSP version to 18.12.0
Sync the platform code version with current Marvell LSP.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
2018-12-04 14:09:44 +02:00
Igal Liberman ff82813af8 a8k: pm: extend MSS_TRIGGER_TIMEOUT
Very rarely, during cpuidle operations the following error
is seen: "PM MSG Trigger Timeout".
This is caused by slow handling of message interrutps
in the PM FW running on CM3 (under heavy PM operation load).

This is not a real issue, so we extend the timeout to
avoid the error prints.

Change-Id: I92fd6f2ff1ddf208b216c123880ded28a00b6e0e
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59670
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
2018-12-04 14:09:44 +02:00
Konstantin Porotchkin 5a9f00f707 plat/marvell: comphy: Add support for SFI on Lane 4
Add static configuration for SFI+ 10Gbps interface on SERDES
Lane 4.
This is just a copy of Lane 2 static values, not optimized.
Board-to-board iperf test shows up to 6Gbps transfer speed.

Change-Id: I024d2ac132f7fa6c342a64367f3dca2123a27e97
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
2018-12-04 14:09:44 +02:00
Christine Gharzuzi 5cf6fafe22 fix: a3900: pm: fix number of CPU power switches.
- Number of open power switches for CPUs should be three
  and now two.

- This patch updates the value of open power switches from
  0xfd (two power-switches) to 0xfc (three power-switches).

Change-Id: I2783ab7f04bbbb6da78eeedcabe4636f9a774512
Signed-off-by: Christine Gharzuzi <chrisg@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-12-04 14:09:44 +02:00
Konstantin Porotchkin c35442690c svc: Update the EEPROM AVS values processing
Add support for SVC test builds for tuning AVS values.
Update the SVC procedure and add EEPROM access.
Add support for AP807 AVS values (10 bits wide).

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
2018-12-04 14:09:44 +02:00
Christine Gharzuzi 1020e0d326 ble: ap807: Switch to PLL mode and update CPU frequency
- Update CPU frequency on AP807 to 2GHz for SAR 0x0.
- Increase AVS to 0.88V for 2GHz clock

Change-Id: Ic945b682ab2f8543e34294bfc56c3eae2c5e0c8e
Signed-off-by: Christine Gharzuzi <chrisg@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
2018-12-04 14:09:44 +02:00
Igal Liberman 55df84f974 mvebu: cp110: avoid pcie power on/off sequence when called from Linux
In Armada 8K DB boards, PCIe initialization can be executed only once
because PCIe reset performed during chip power on and it cannot be
executed via GPIO later.
This means that power on can be executed only once, when it's called
from the bootloader.
Power on:
	Read bit 21 of the mode, it marks if the caller is
	the bootloader or the Linux Kernel.
Power off:
	Check if the comphy was already configured to PCIe, if yes,
	check if the caller is bootloader, if both conditions are true
	(PCIe mode and called by Linux) - skip the power-off.

In addition, fix incorrect documentation describing mode fields -
PCIe width is 3 bits, not 2.

NOTE: with this patch, please use LK4.14.76 (LK4.4.120 may not work
with it).

Change-Id: I4b929011f97a0a1869a51ba378687e78b3eca4ff
Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-12-04 14:09:44 +02:00
Grzegorz Jaszczyk 9cb6751d59 plat: marvell: a3700: do not power off cpu due to errata ref #13
Do not power off the CPU1 since there is no way to wake it up
(wake-up is causing CPU0 reset as well duo to HW bug). Quote from errata
Ref #13 [In power saving mode, both cores must be powered off]:
"When Core 0 is on and Core 1 is in power-off state, a Core 1
wake-up resets Core 0 as well and puts Core 0 back to ROM".

To overcome described HW bug instead of powering the CPU off, let it
reach WFI instruction, which is invoked by generic psci_do_cpu_off
function after platform handler finishes. This will put the core in low
power state and give a chance to wake it up.

Before this change, after running secondary kernel via kexec, only one
core was up, now both cores are up.

Change-Id: I87f144867550728055d9b8a2edb84a14539acab7
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
2018-12-04 14:09:44 +02:00