4b5c1f3060
[IPL/DDR] - Update E3 DDR setting rev.0.12. Signed-off-by: Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ic9fb7ed1cd7588fab169a99c4070a8dfc40038dc |
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boot_init_dram_regdef_d3.h | ||
boot_init_dram_regdef_e3.h | ||
boot_init_dram_regdef_v3m.h | ||
ddr_a.mk | ||
ddr_init_d3.c | ||
ddr_init_e3.c | ||
ddr_init_e3.h | ||
ddr_init_v3m.c |