Tien Hock Loh e734ecd61d plat: intel: Add FPGAINTF configuration to when configuring pinmux ... FPGAINTF wasn't enabled when configuring pinmux. This fixes the issue. Signed-off-by: Tien Hock Loh <tien.hock.loh@intel.com> Change-Id: I5a6aacd504901b8f7327b2f4854b8a77d0c37019		2020-06-08 22:03:41 +00:00
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plat_macros.S	intel: Platform common code refactor	2019-08-07 12:19:11 +00:00
platform_def.h	intel: Enable EMAC PHY in Intel FPGA platform	2020-02-25 10:19:51 +08:00
socfpga_emac.h	intel: Enable EMAC PHY in Intel FPGA platform	2020-02-25 10:19:51 +08:00
socfpga_handoff.h	intel: Change boot source selection	2020-02-03 14:31:52 +08:00
socfpga_mailbox.h	intel: Fix argument type for mailbox driver	2020-02-25 16:41:47 +08:00
socfpga_private.h	intel: stratix10: Enable uboot entrypoint support	2019-12-17 12:54:29 +08:00
socfpga_reset_manager.h	intel: Refactor reset manager driver	2020-01-16 10:53:23 +08:00
socfpga_sip_svc.h	intel: Update RSU driver return code	2020-02-27 20:25:58 +08:00
socfpga_system_manager.h	plat: intel: Add FPGAINTF configuration to when configuring pinmux	2020-06-08 22:03:41 +00:00