Xing Zheng 175476f9e5 FIXUP: rockchip: rk3399: fix the incorrect bit during m0_init ... We found that the DUT will be hanged if we don't set the bit_1 of the PMUCRU_GATEDIS_CON0. But, from the TRM, there is weird that the bit_1 is set the clk_center1_gating_dis, not clk_pmum0_gating_dis. Is the TRM incorrect? We need to check it with the IC team and re-clean the commit message and explain it tomorrow. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>		2017-02-24 20:07:44 +08:00
..
arm	Resolve build errors flagged by GCC 6.2	2017-01-26 13:47:37 +00:00
common	tbbr: Simplify conditional	2017-01-31 10:55:04 +00:00
compat	AArch32: Add essential ARM platform and FVP support	2016-08-10 18:01:38 +01:00
mediatek	Remove use of all deprecated APIs	2017-01-24 10:50:14 +08:00
nvidia/tegra	Use #ifdef for IMAGE_BL* instead of #if	2017-01-24 01:01:21 +09:00
qemu	Use #ifdef for IMAGE_BL* instead of #if	2017-01-24 01:01:21 +09:00
rockchip	FIXUP: rockchip: rk3399: fix the incorrect bit during m0_init	2017-02-24 20:07:44 +08:00
xilinx/zynqmp	Move BL_COHERENT_RAM_BASE/END defines to common_def.h	2017-01-18 19:33:41 +09:00