Richard Gong 1ae7b6f6b1 intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB ... Increase INTEL_SIP_SMC_FPGA_CONFIG_SIZE from 16 to 32MB. We need higher pre-reserved memory size between Intel service layer and secure monitor software so we can handle JIC file authorization. Signed-off-by: Richard Gong <richard.gong@intel.com> Change-Id: Ibab4e42e4b7b93a4cf741e60ec9439359ba0a64c		2020-10-24 11:00:42 +08:00
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plat_macros.S	intel: Platform common code refactor	2019-08-07 12:19:11 +00:00
platform_def.h	intel: clear 'PLAT_SEC_ENTRY' in early platform setup	2020-10-24 11:00:42 +08:00
socfpga_emac.h	intel: Enable EMAC PHY in Intel FPGA platform	2020-02-25 10:19:51 +08:00
socfpga_handoff.h	intel: Change boot source selection	2020-02-03 14:31:52 +08:00
socfpga_mailbox.h	intel: common: Remove urgent from mailbox async	2020-10-24 11:00:42 +08:00
socfpga_private.h	intel: stratix10: Enable uboot entrypoint support	2019-12-17 12:54:29 +08:00
socfpga_reset_manager.h	intel: Refactor reset manager driver	2020-01-16 10:53:23 +08:00
socfpga_sip_svc.h	intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB	2020-10-24 11:00:42 +08:00
socfpga_system_manager.h	plat: intel: Add FPGAINTF configuration to when configuring pinmux	2020-06-08 22:03:41 +00:00