87b5c17f91
As rk3399 TRM1.1 document show, when set PMU_CRU_GATEDIS_CON0/1 register, it need set the write_mask bit (bit16 ~ bit31), but as we test, it not need it. So need to correct the setting way, otherwise it will set wrong value to this register. Signed-off-by: Lin Huang <hl@rock-chips.com> |
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| arm | ||
| common | ||
| compat | ||
| mediatek | ||
| nvidia/tegra | ||
| qemu | ||
| rockchip | ||
| xilinx/zynqmp | ||