arm-trusted-firmware/plat
Siva Durga Prasad Paladugu 91bf4c5c15 zynqmp: Fix EG/EV detection logic
The vcu disable bit in efuse ipdisable register is valid
only if PL powered up so, consider PL powerup status for
determing EG/EV part. If PL is not powered up, display
EG/EV as a part of string. The PL powerup status will
be filled by pmufw based on PL PROGB status in the
9th bit of version field.This patch also used IPI
to get this info from pmufw instead of directly accessing
the registers. Accessing this info from pmufw using
IPI fixes the issue of PMUFW access denied error for
reading IPDISABLE register.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-05-17 15:19:23 +05:30
..
arm Merge pull request #1387 from vishwanathahg/sgi575/core_pos_calc 2018-05-16 15:23:18 +01:00
common Fix build error with correct format string 2018-05-15 17:05:36 +01:00
compat Do not enable SVE on pre-v8.2 platforms 2017-11-30 17:45:23 +00:00
hisilicon Merge pull request #1361 from vchong/tool_add_img 2018-05-01 17:12:51 +01:00
layerscape layerscape: fix integer handling issues 2018-04-11 12:12:24 +00:00
mediatek Fix pointer type mismatch of handlers 2018-04-27 18:35:02 +09:00
nvidia/tegra types: use int-ll64 for both aarch32 and aarch64 2018-04-27 18:35:02 +09:00
qemu Merge pull request #1334 from michpappas/tf-issues#572_qemu_dont_use_C_for_crash_console 2018-04-03 11:59:55 +01:00
rockchip Merge pull request #1255 from masahir0y/int-ll64 2018-05-01 15:06:56 +01:00
rpi3 Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements 2018-03-29 13:20:05 +01:00
socionext/uniphier plat: fix switch statements to comply with MISRA rules 2018-03-26 12:43:05 +01:00
xilinx/zynqmp zynqmp: Fix EG/EV detection logic 2018-05-17 15:19:23 +05:30