Soby Mathew a91e12fbea Fix race in GIC IPRIORITY and ITARGET accessors ... GICD_IPRIORITYR and GICD_ITARGETSR specifically support byte addressing so that individual interrupt priorities can be atomically updated by issuing a single byte write. The previous implementation of gicd_set_ipriority() and gicd_set_itargetsr() used 32-bit register accesses, modifying values for 4 interrupts at a time, using a read-modify-write approach. This potentially may cause concurrent changes by other CPUs to the adjacent interrupts to be corrupted. This patch fixes the issue by modifying these accessors to use byte addressing. Fixes ARM-software/tf-issues#343 Change-Id: Iec28b5f5074045b00dfb8d5f5339b685f9425915		2016-02-09 16:50:36 +00:00
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cci	Use uintptr_t as base address type in ARM driver APIs	2015-07-09 11:53:32 +01:00
cci400	Fix debug assertion in deprecated CCI-400 driver	2015-10-12 10:21:55 +01:00
ccn	Add a generic driver for ARM CCN IP	2015-09-14 22:09:40 +01:00
gic	Fix race in GIC IPRIORITY and ITARGET accessors	2016-02-09 16:50:36 +00:00
pl011	Disable PL011 UART before configuring it	2016-01-21 17:27:47 +00:00
sp804	Add SP804 delay timer driver	2015-06-18 16:06:26 +01:00
sp805	Add a simple ARM SP805 watchdog driver	2015-11-27 09:34:20 +00:00
tzc400	Remove the assert for TZC base during initialization	2015-12-08 15:32:43 +00:00