Boon Khai Ng 447e699f70 feat(intel): add macro to switch between different UART PORT ... HSD #1509626040: This patch is to add the flexibility for BL2 and BL31 to choose different UART output port at platform_def.h using parameter PLAT_INTEL_UART_BASE This patch also fixing the plat_helpers.S where the UART BASE is hardcoded to PLAT_UART0_BASE. It is then switched to CRASH_CONSOLE_BASE. Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com> Change-Id: Iccfa7ec64e4955b531905778be4da803045d3c8f		2022-04-05 14:25:30 +08:00
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plat_macros.S	intel: Platform common code refactor	2019-08-07 12:19:11 +00:00
platform_def.h	feat(intel): add macro to switch between different UART PORT	2022-04-05 14:25:30 +08:00
socfpga_emac.h	intel: Enable EMAC PHY in Intel FPGA platform	2020-02-25 10:19:51 +08:00
socfpga_fcs.h	feat(intel): add SMC support for ROM Patch SHA384 mailbox	2022-04-05 14:23:26 +08:00
socfpga_handoff.h	intel: Change boot source selection	2020-02-03 14:31:52 +08:00
socfpga_mailbox.h	feat(intel): add SMC support for ROM Patch SHA384 mailbox	2022-04-05 14:23:26 +08:00
socfpga_private.h	intel: stratix10: Enable uboot entrypoint support	2019-12-17 12:54:29 +08:00
socfpga_reset_manager.h	fix(intel): fix ECC Double Bit Error handling	2022-03-09 09:14:16 +08:00
socfpga_sip_svc.h	feat(intel): add SMC support for ROM Patch SHA384 mailbox	2022-04-05 14:23:26 +08:00
socfpga_system_manager.h	fix(intel): fix ECC Double Bit Error handling	2022-03-09 09:14:16 +08:00