Derek Basehore aa9ee82dc1 rockchip/rk3399: Change PD_CTR_LOOP to 10000 ... This brings ATF into line with the kernel on the timeout for power domains turning on. We could actually timeout (when we shouldn't) on resume when turning power domains on. The guaranteed maximum delay is now 10ms. Signed-off-by: Derek Basehore <dbasehore@chromium.org>		2018-01-23 17:42:47 -08:00
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arm	Merge pull request #1200 from robertovargas-arm/bl2-el3	2018-01-19 13:40:12 +00:00
common	bl2-el3: Add BL2_EL3 image	2018-01-18 09:42:35 +00:00
compat	Do not enable SVE on pre-v8.2 platforms	2017-11-30 17:45:23 +00:00
hisilicon	Merge pull request #1211 from Leo-Yan/remove_ca73_cpu_nap_state	2018-01-17 17:34:29 +00:00
mediatek	Merge pull request #1178 from davidcunado-arm/dc/enable_sve	2017-12-11 12:29:47 +00:00
nvidia/tegra	Do not enable SVE on pre-v8.2 platforms	2017-11-30 17:45:23 +00:00
qemu	Do not enable SVE on pre-v8.2 platforms	2017-11-30 17:45:23 +00:00
rockchip	rockchip/rk3399: Change PD_CTR_LOOP to 10000	2018-01-23 17:42:47 -08:00
rpi3	rpi3: Introduce AArch64 Raspberry Pi 3 port	2017-12-01 10:20:47 +00:00
socionext/uniphier	uniphier: simplify GZIP compress rule	2018-01-04 12:59:46 +09:00
xilinx/zynqmp	zynqmp: pm_service: use zynqmp_ipi APIs	2018-01-08 16:03:09 -08:00