Sieu Mun Tang ac097fdf07 fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD ... This patch is to add flash dcache after return response in INTEL_SIP_SMC_MBOX_SEND_CMD. Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: Ie9451e352f2b7c41ebb44a1f6be9da35f4600fb9		2022-05-11 17:46:00 +08:00
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aarch64	feat(intel): add macro to switch between different UART PORT	2022-04-05 14:25:30 +08:00
drivers	feat(intel): enable firewall for OCRAM in BL31	2022-04-28 19:08:35 +08:00
include	fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying	2022-05-11 17:45:57 +08:00
sip	fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying	2022-05-11 17:45:57 +08:00
soc	feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands	2022-05-11 17:45:37 +08:00
bl2_plat_mem_params_desc.c	intel: Platform common code refactor	2019-08-01 16:39:27 +08:00
socfpga_delay_timer.c	feat(intel): implement timer init divider via cpu frequency. (#1)	2022-05-06 17:37:45 +02:00
socfpga_image_load.c	intel: Implement platform specific system reset 2	2019-12-30 10:17:04 +08:00
socfpga_psci.c	fix(intel): fix ECC Double Bit Error handling	2022-03-09 09:14:16 +08:00
socfpga_sip_svc.c	fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD	2022-05-11 17:46:00 +08:00
socfpga_sip_svc_v2.c	feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands	2022-05-11 17:45:37 +08:00
socfpga_storage.c	intel: Refactor common platform code [2/5]	2019-11-28 12:47:58 +08:00
socfpga_topology.c	intel: Platform common code refactor	2019-08-01 16:39:27 +08:00