Hadi Asyrafi fea24b88e4 intel: stratix10: Fix reliance on hard coded clock information ... Extract clock information for UART, MMC & Watchdog from the platform rather than hard code it Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I2582bd34a6da97bd75d5ccba5f93840e65f26b03		2019-08-13 18:20:53 +08:00
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platform_def.h	intel: Platform common code refactor	2019-08-07 12:19:11 +00:00
s10_clock_manager.h	intel: stratix10: Fix reliance on hard coded clock information	2019-08-13 18:20:53 +08:00
s10_handoff.h	plat: intel: Add BL2 support for Stratix 10 SoC	2019-02-04 16:17:24 +08:00
s10_mailbox.h	Update intel platform to not rely on undefined overflow behaviour	2019-07-11 12:10:58 +01:00
s10_memory_controller.h	plat: intel: Fix faulty DDR calibration value	2019-02-13 14:39:31 +08:00
s10_noc.h	plat: intel: Add BL2 support for Stratix 10 SoC	2019-02-04 16:17:24 +08:00
s10_pinmux.h	plat: intel: Add BL2 support for Stratix 10 SoC	2019-02-04 16:17:24 +08:00
s10_reset_manager.h	plat: intel: Add BL2 support for Stratix 10 SoC	2019-02-04 16:17:24 +08:00
s10_system_manager.h	intel: stratix10: Fix reliance on hard coded clock information	2019-08-13 18:20:53 +08:00
stratix10_private.h	intel: stratix10: Fix reliance on hard coded clock information	2019-08-13 18:20:53 +08:00