Alex Leibovich b81444e843 ddr_phy: use smc calls to access ddr phy registers ... Added smc calls support to access ddr phy registers. Change-Id: Ibaa0a8e20b6398ab394c7e2e9ea61f9a28cdb870 Signed-off-by: Alex Leibovich <alexl@marvell.com> Reviewed-on: https://sj1git1.cavium.com/20791 Tested-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com>		2021-04-20 12:59:34 +02:00
..
aarch64	plat: marvell: ap806: implement workaround for errata-id FE-4265711	2020-10-04 15:20:55 +02:00
ble	plat/marvell: cn913x: allow CP1/CP2 mapping at BLE stage	2021-02-25 09:59:17 +00:00
include	plat: marvell: ap806: implement workaround for errata-id FE-4265711	2020-10-04 15:20:55 +02:00
mss	plat/marvell/armada/common/mss: use MSS SRAM in secure mode	2021-02-24 13:56:31 +00:00
a8k_common.mk	ddr_phy: use smc calls to access ddr phy registers	2021-04-20 12:59:34 +02:00
plat_bl1_setup.c	marvell: armada: add extra level in marvell platform hierarchy	2020-06-07 00:06:03 +02:00
plat_bl31_setup.c	plat: marvell: a8k: move address config of cp1/2 to BL2	2020-06-19 17:58:54 +02:00
plat_ble_setup.c	plat/marvell: cn913x: allow CP1/CP2 mapping at BLE stage	2021-02-25 09:59:17 +00:00
plat_pm.c	marvell: armada: add extra level in marvell platform hierarchy	2020-06-07 00:06:03 +02:00
plat_pm_trace.c	marvell: armada: add extra level in marvell platform hierarchy	2020-06-07 00:06:03 +02:00
plat_thermal.c	marvell: armada: add extra level in marvell platform hierarchy	2020-06-07 00:06:03 +02:00