60 lines
1.6 KiB
Makefile
60 lines
1.6 KiB
Makefile
#
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# Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# platform configs
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ENABLE_CONSOLE_SPE := 0
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$(eval $(call add_define,ENABLE_CONSOLE_SPE))
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ENABLE_STRICT_CHECKING_MODE := 1
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$(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE))
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RESET_TO_BL31 := 1
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PROGRAMMABLE_RESET_ADDRESS := 1
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COLD_BOOT_SINGLE_CPU := 1
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# platform settings
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TZDRAM_BASE := 0x40000000
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$(eval $(call add_define,TZDRAM_BASE))
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PLATFORM_CLUSTER_COUNT := 4
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$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
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PLATFORM_MAX_CPUS_PER_CLUSTER := 2
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$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
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MAX_XLAT_TABLES := 25
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$(eval $(call add_define,MAX_XLAT_TABLES))
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MAX_MMAP_REGIONS := 30
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$(eval $(call add_define,MAX_MMAP_REGIONS))
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# platform files
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PLAT_INCLUDES += -I${SOC_DIR}/drivers/include
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BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \
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lib/cpus/aarch64/denver.S \
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${COMMON_DIR}/drivers/bpmp_ipc/intf.c \
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${COMMON_DIR}/drivers/bpmp_ipc/ivc.c \
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${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \
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${COMMON_DIR}/drivers/smmu/smmu.c \
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${SOC_DIR}/drivers/mce/mce.c \
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${SOC_DIR}/drivers/mce/nvg.c \
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${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \
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${SOC_DIR}/drivers/se/se.c \
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${SOC_DIR}/plat_memctrl.c \
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${SOC_DIR}/plat_psci_handlers.c \
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${SOC_DIR}/plat_setup.c \
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${SOC_DIR}/plat_secondary.c \
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${SOC_DIR}/plat_sip_calls.c \
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${SOC_DIR}/plat_smmu.c \
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${SOC_DIR}/plat_trampoline.S
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ifeq (${ENABLE_CONSOLE_SPE},1)
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BL31_SOURCES += ${COMMON_DIR}/drivers/spe/shared_console.S
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endif
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