2015-08-25 12:33:14 +01:00
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#
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2019-01-03 18:44:22 +00:00
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# Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
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2018-06-13 00:55:06 +01:00
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# Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
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2015-08-25 12:33:14 +01:00
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#
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2017-05-03 09:38:09 +01:00
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# SPDX-License-Identifier: BSD-3-Clause
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2015-08-25 12:33:14 +01:00
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#
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# platform configs
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2016-03-12 01:18:51 +00:00
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ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS := 1
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$(eval $(call add_define,ENABLE_ROC_FOR_ORDERING_CLIENT_REQUESTS))
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2016-03-28 21:44:35 +01:00
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ENABLE_CHIP_VERIFICATION_HARNESS := 0
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$(eval $(call add_define,ENABLE_CHIP_VERIFICATION_HARNESS))
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2016-05-23 19:47:34 +01:00
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RESET_TO_BL31 := 1
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PROGRAMMABLE_RESET_ADDRESS := 1
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COLD_BOOT_SINGLE_CPU := 1
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2018-06-20 22:30:59 +01:00
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RELOCATE_BL32_IMAGE := 1
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2015-08-25 12:33:14 +01:00
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# platform settings
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2015-11-30 20:05:04 +00:00
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TZDRAM_BASE := 0x30000000
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2015-08-25 12:33:14 +01:00
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$(eval $(call add_define,TZDRAM_BASE))
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PLATFORM_CLUSTER_COUNT := 2
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$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))
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PLATFORM_MAX_CPUS_PER_CLUSTER := 4
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$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))
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2018-05-31 09:45:30 +01:00
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MAX_XLAT_TABLES := 25
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2015-08-25 12:33:14 +01:00
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$(eval $(call add_define,MAX_XLAT_TABLES))
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2018-05-31 09:45:30 +01:00
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MAX_MMAP_REGIONS := 27
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2015-08-25 12:33:14 +01:00
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$(eval $(call add_define,MAX_MMAP_REGIONS))
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# platform files
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PLAT_INCLUDES += -I${SOC_DIR}/drivers/include
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2017-11-15 23:46:38 +00:00
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BL31_SOURCES += drivers/ti/uart/aarch64/16550_console.S \
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lib/cpus/aarch64/denver.S \
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2015-08-25 12:33:14 +01:00
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lib/cpus/aarch64/cortex_a57.S \
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2018-05-31 09:45:30 +01:00
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${COMMON_DIR}/drivers/bpmp_ipc/intf.c \
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${COMMON_DIR}/drivers/bpmp_ipc/ivc.c \
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2017-06-28 22:38:19 +01:00
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${COMMON_DIR}/drivers/gpcdma/gpcdma.c \
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2017-01-02 14:41:32 +00:00
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${COMMON_DIR}/drivers/memctrl/memctrl_v2.c \
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2016-12-13 00:46:44 +00:00
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${COMMON_DIR}/drivers/smmu/smmu.c \
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2017-03-14 21:24:35 +00:00
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${SOC_DIR}/drivers/mce/mce.c \
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${SOC_DIR}/drivers/mce/ari.c \
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${SOC_DIR}/drivers/mce/nvg.c \
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${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \
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2018-07-19 08:37:23 +01:00
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$(SOC_DIR)/drivers/se/se.c \
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2017-01-02 14:12:31 +00:00
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${SOC_DIR}/plat_memctrl.c \
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2015-08-25 12:33:14 +01:00
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${SOC_DIR}/plat_psci_handlers.c \
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${SOC_DIR}/plat_setup.c \
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${SOC_DIR}/plat_secondary.c \
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2016-03-18 20:07:33 +00:00
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${SOC_DIR}/plat_sip_calls.c \
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2017-01-02 14:41:32 +00:00
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${SOC_DIR}/plat_smmu.c \
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2016-03-18 20:07:33 +00:00
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${SOC_DIR}/plat_trampoline.S
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2017-01-02 14:12:31 +00:00
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2017-07-25 21:29:52 +01:00
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# Enable workarounds for selected Cortex-A57 erratas.
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A57_DISABLE_NON_TEMPORAL_HINT := 1
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ERRATA_A57_806969 := 1
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ERRATA_A57_813419 := 1
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ERRATA_A57_813420 := 1
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ERRATA_A57_826974 := 1
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ERRATA_A57_826977 := 1
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ERRATA_A57_828024 := 1
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ERRATA_A57_829520 := 1
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ERRATA_A57_833471 := 1
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2018-06-13 00:55:06 +01:00
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# Enable higher performance Non-cacheable load forwarding
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A57_ENABLE_NONCACHEABLE_LOAD_FWD := 1
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