Commit Graph

4798 Commits

Author SHA1 Message Date
Antonio Nino Diaz 0709055ed6 Remove support for the SMC Calling Convention 2.0
This reverts commit 2f37046524 ("Add support for the SMC Calling
Convention 2.0").

SMCCC v2.0 is no longer required for SPM, and won't be needed in the
future. Removing it makes the SMC handling code less complicated.

The SPM implementation based on SPCI and SPRT was using it, but it has
been adapted to SMCCC v1.0.

Change-Id: I36795b91857b2b9c00437cfbfed04b3c1627f578
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-30 16:01:49 +00:00
Antonio Niño Díaz 7e9b0c8eef
Merge pull request #1791 from antonio-nino-diaz-arm/an/rk-gic
rockchip: Fix GICv2 interrupts
2019-01-30 09:53:07 +00:00
Antonio Niño Díaz 44b935c09c
Merge pull request #1789 from Anson-Huang/lpm
Add power optimization for i.MX8QM/i.MX8QX
2019-01-30 09:52:48 +00:00
Antonio Niño Díaz 7d3884000d
Merge pull request #1788 from laroche/rpi3_duplicate_initialization
rpi3: Remove duplicate initialization for BL32_IMAGE_ID and mark one more function as static.
2019-01-29 13:44:10 +00:00
Antonio Niño Díaz 5755a30b85
Merge pull request #1786 from laroche/static_vars_functions
Change some vars and functions to be static.
2019-01-29 13:43:46 +00:00
Antonio Niño Díaz e0ace7f5e3
Merge pull request #1794 from Andre-ARM/fiptool-fix
tools/fiptool: Fix UUID parsing in blob handling
2019-01-29 13:43:29 +00:00
Andre Przywara e56b8dc82b tools/fiptool: Fix UUID parsing in blob handling
Commit 033648652f ("Make TF UUID RFC 4122 compliant") changed the scanf
parsing string to handle endianness correctly.
However that changed the number of items sscanf handles, without
adjusting the sanity check just below.

Increase the expected return value from 11 to 16 to let fiptool handle
UUIDs given as blob parameters correctly again.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-01-29 09:25:14 +00:00
Anson Huang e6cf7a468e imx: power optimization for i.mx8qx
Current implementation of i.MX8QX power management related
features does NOT optimize power number, all system resources
like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
ON) when system suspend or CPU hotplug.

To lower the power number, OFF mode should be adopted for those
system resources whenever they can be OFF, A cluster will be OFF
if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
if system suspend, IRQ steer can be OFF if the wakeup source is
belonged to system controller partition, so wakeup source runtime
check is used to determine if IRQ steer can be OFF before system
suspend.

If resources are powered off for suspend, they should be restored
properly after system resume.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-01-29 09:26:41 +08:00
Anson Huang 3a2b51993d imx: power optimization for i.mx8qm
Current implementation of i.MX8QM power management related
features does NOT optimize power number, all system resources
like CCI, DDR, and A cluster etc. are kept in STBY mode (powered
ON) when system suspend or CPU hotplug.

To lower the power number, OFF mode should be adopted for those
system resources whenever they can be OFF, A cluster will be OFF
if the CPUs in the cluster are all off line, DDR/MU/DB can be OFF
if system suspend, IRQ steer can be OFF if the wakeup source is
belonged to system controller partition, so wakeup source runtime
check is used to determine if IRQ steer can be OFF before system
suspend.

If resources are powered off for suspend, they should be restored
properly after system resume.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-01-29 09:26:41 +08:00
Florian La Roche e77ccb657f rpi3: mark one more function as static
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2019-01-28 20:39:51 +01:00
Florian La Roche 92e862359d rpi3: remove duplicate initialization for BL32_IMAGE_ID
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2019-01-28 20:27:46 +01:00
Antonio Nino Diaz d31dcdc5f6 rockchip: Fix GICv2 interrupts
After the removal of deprecated interfaces in TF 2.0 the migration to
the new GIC driver interfaces was done incorrectly in rk3328 and rk3368:
2d6f1f01b1 ("rockchip: Migrate to new interfaces").

In the GICv2 driver it is mandated that all interrupts are Group 0
interrupts. This patch simply moves all Group 1 interrupts to Group 0.

Change-Id: I224c0135603eb5b81bd512976361500c0d129a91
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-28 14:35:50 +00:00
Antonio Niño Díaz e9b77791ab
Merge pull request #1780 from pmanish87/master
Make device tree pre-processing similar to U-boot/Linux
2019-01-28 12:04:28 +00:00
Antonio Niño Díaz d4dcadb067
Merge pull request #1773 from grandpaul/rpi3-gpio-driver
Rpi3 gpio driver
2019-01-28 12:04:13 +00:00
Antonio Niño Díaz 83a2285ec8
Merge pull request #1784 from antonio-nino-diaz-arm/an/includes-arm
plat/arm: Cleanup of includes and drivers
2019-01-28 10:53:29 +00:00
Antonio Niño Díaz bc15388199
Merge pull request #1778 from JoelHutton/jh/multiconsole
multi_console: Check functions are not NULL
2019-01-28 09:21:53 +00:00
Florian La Roche 9822852967 Change some vars and functions to be static.
Signed-off-by: Florian La Roche <Florian.LaRoche@gmail.com>
2019-01-27 14:30:12 +01:00
Joel Hutton e84c871391 multi_console: Check functions are not NULL
Change-Id: I2d67bb1bebd15e6a7d69ea5e7b6fda9c972f9d86
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
2019-01-25 16:23:54 +00:00
Ying-Chun Liu (PaulLiu) 2be86dd395 rpi3: Enable GPIO in BL2
This patch inits the GPIO in BL2 earlysetup. So BL2 can start operating
GPIO pins.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2019-01-26 00:13:49 +08:00
Ying-Chun Liu (PaulLiu) d604ac4831 rpi3: Add GPIO driver
This commit adds GPIO driver for RaspberryPi3. The GPIO driver for RPi3
also provides the way to do pinmux selections.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2019-01-26 00:13:49 +08:00
Antonio Nino Diaz 560293bb6f fvp: pwrc: Move to drivers/ folder
Change-Id: I670ea80e0331c2d4b2ccfa563a45469a43f6902d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 5932d194d7 plat/arm: sds: Move to drivers/ folder
Change-Id: Ia601d5ad65ab199e747fb60af4979b7db477d249
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 2d4135e08f plat/arm: scp: Move to drivers/ folder
Change-Id: Ida5dae39478654405d0ee31a6cbddb4579e76a7f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 0387aa42ac plat/arm: scpi: Move to drivers/ folder
Change-Id: Icc59cdaf2b56f6936e9847f1894594c671db2e94
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz c411396e55 plat/arm: mhu: Move to drivers/ folder
Change-Id: I656753a1825ea7340a3708b950fa6b57455e9056
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 14928b88ab plat/arm: scmi: Move to drivers/ folder
Change-Id: I8989d2aa0258bf3b50a856c5b81532d578600124
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz 3661d8e7ad plat/arm: Move dynamic xlat enable logic to makefile
The PLAT_XLAT_TABLES_DYNAMIC build option, defined in platform_def.h
in Arm platforms, is checked by several headers, affecting their
behaviour. To avoid issues around the include ordering of the headers,
the definition should be moved to the platform's makefile.

Change-Id: I0e12365c8d66309122e8a20790e1641a4f480a10
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:11 +00:00
Antonio Nino Diaz bd9344f670 plat/arm: Sanitise includes
Use full include paths like it is done for common includes.

This cleanup was started in commit d40e0e08283a ("Sanitise includes
across codebase"), but it only cleaned common files and drivers. This
patch does the same to Arm platforms.

Change-Id: If982e6450bbe84dceb56d464e282bcf5d6d9ab9b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-25 16:04:10 +00:00
Antonio Niño Díaz 7ca572d93c
Merge pull request #1761 from satheesbalya-arm/sb1/sb1_2661_bl31_overlay
plat/arm: Save BL2 descriptors to reserved memory.
2019-01-25 11:24:40 +00:00
Antonio Niño Díaz a1d1d24b78
Merge pull request #1781 from dtwlin/m2
spd: trusty: trusty_setup should bail on unknown image
2019-01-25 10:30:36 +00:00
Antonio Niño Díaz 72106f823c
Merge pull request #1766 from Anson-Huang/master
Add more SIP runtime service for i.MX8
2019-01-25 10:29:52 +00:00
Antonio Niño Díaz 6eee5864f8
Merge pull request #1777 from glneo/runtime-gicr
ti: k3: common: Add support for runtime detection of GICR base address
2019-01-25 09:21:42 +00:00
Antonio Niño Díaz 2501a03797
Merge pull request #1779 from Anson-Huang/a53_errata
Enable necessary A53 erratas for i.MX8QM and i.MX8MQ
2019-01-25 09:21:19 +00:00
Antonio Niño Díaz bc5e79cd73
Merge pull request #1776 from vwadekar/tf2.0-tegra-downstream-rebase-1.22.19
Tf2.0 tegra downstream rebase 1.22.19
2019-01-25 09:20:32 +00:00
David Lin d19c343854 spd: trusty: trusty_setup should bail on unknown image
When an unknown Trusty image is found, there's no point of still trying
to register the BL32 init handler. Instead, we just should bail out of
the trusty_setup() and allow the system to continue to boot.

Signed-off-by: David Lin <dtwlin@google.com>
2019-01-24 14:29:44 -08:00
Manish Pandey 7e94a699dd Make device tree pre-processing similar to U-boot/Linux
Following changes are done to make DT pre-processing similar to that of
U-boot/Linux kernel.

1. Creating seperate CPPFLAGS for DT preprocessing so that compiler
options specific to it can be accommodated.
e.g: "-undef" compiler option avoids replacing "linux" string(used in
device trees) with "1" as "linux" is a pre-defined macro in gnu99
standard.

2. Replace CPP with PP for DT pre-processing, as CPP in U-boot/Linux is
exported as "${CROSS_COMPILE}gcc -E" while in TF-A it is exported as
"${CROSS_COMPILE}cpp".

Change-Id: If4c61a249d51614d9f53ae30b602036d50c02349
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
2019-01-24 12:06:08 +00:00
Anson Huang cce904024d imx: enable necessary errata for i.mx8qm
NXP's i.MX8QM uses Cortex-A53 r0p4, enable necessary
erratas for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-01-24 11:00:50 +08:00
Anson Huang 218bdbe087 imx: enable necessary errata for i.mx8mq
NXP's i.MX8MQ uses Cortex-A53 r0p4, enable necessary
erratas for it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-01-24 11:00:47 +08:00
Varun Wadekar 8ec4562165 Tegra186: remove RELOCATE_TO_BL31_BASE config
This patch removes this unused config option from the Tegra186
platform makefiles.

Change-Id: Idcdf6854332a26599323a247289c2d3ce19f475f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:33:13 -08:00
Varun Wadekar fc5adf7d1b Tegra: memctrl_v2: remove usage of ENABLE_SMMU_DEVICE config
This patch removes the usage of this platform config, as it is always
enabled by all the supported platforms.

Change-Id: Ie7adb641adeb3604b177b6960b797722d60addfa
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:33:11 -08:00
Dilan Lee 3e1923d9cf Tegra: add 'late' platform setup handler
This patch adds a platform setup handler that gets called after
the MMU is enabled. Platforms wanting to make use of this handler
should declare 'plat_late_platform_setup' handler in their platform
files, to override the default weakly defined handler.

Change-Id: Ibc97a2e5a24608ddea856d0bd543a9d5876f604c
Signed-off-by: Dilan Lee <dilee@nvidia.com>
2019-01-23 10:33:08 -08:00
Varun Wadekar dd20f5b3d9 Tegra: spe: shared console for Tegra platforms
There are Tegra platforms which have limited UART ports and so
all the components have to share the console. The SPE helps out
by collecting all the logs in such cases and prints them on the
shared UART port.

This patch adds a driver to communicate with the SPE driver, which
in turn provides the console.

Change-Id: Ie750520b936b8bed0ab1d876f03fc0a3490a85a3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:33:06 -08:00
Varun Wadekar 4cba698567 Tegra: console driver compilation from platform makefiles
This patch includes the console driver from individual platform
makefiles and removes it from tegra_common.mk. This allows future
platforms to include consoles of their choice.

Change-Id: I7506562bfac78421a80fb6782ac8472fbef6cfb0
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:33:03 -08:00
Varun Wadekar 2ad1bddca9 Tegra: smmu: change exit criteria for context size calculation
Tegra SoCs currently do not have a SMMU register at address 0xFFFFFFFF.
This patch changes the search criteria, to look for this marker, to
calculate the size of the saved context.

Change-Id: I15d91945ecb78267f91c45f37985dbb2327ca3ae
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:33:00 -08:00
Steven Kao c63ec2639a Tegra: memctrl_v2: platform handler for TZDRAM setup
The Tegra memctrl driver sets up the TZDRAM fence during boot and
system suspend exit. This patch provides individual platforms with
handlers to perform custom steps during TZDRAM setup.

Change-Id: Iee094d6ca189c6dd24f1147003c33c99ff3a953b
Signed-off-by: Steven Kao <skao@nvidia.com>
2019-01-23 10:32:57 -08:00
Varun Wadekar 539c62d7b3 Tegra186: save system suspend entry marker to TZDRAM
This patch adds support to save the system suspend entry and exit
markers to TZDRAM to help the trampoline code decide if the current
warmboot is actually an exit from System Suspend.

The Tegra186 platform handler sets the system suspend entry marker
before entering SC7 state and the trampoline flips the state back to
system resume, on exiting SC7.

Change-Id: I29d73f1693c89ebc8d19d7abb1df1e460eb5558e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:32:55 -08:00
Varun Wadekar 889c07c7b1 Tegra186: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.

Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:32:53 -08:00
Varun Wadekar d7be5e2e3a Tegra: bpmp: return error if BPMP init fails
This patch returns error if BPMP initialization fails. The platform
code marks the cluster as "runnning" since we wont be able to get
it into the low power state without BPMP.

Change-Id: I86f51d478626240bb7b4ccede8907674290c5dc1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:32:51 -08:00
Steven Kao 601a8e5495 Tegra: rename secure scratch register macros
This patch renames all the secure scratch registers to reflect their
usage.

This is a list of all the macros being renamed:

- SECURE_SCRATCH_RSV1_* -> SCRATCH_RESET_VECTOR_*
- SECURE_SCRATCH_RSV6 -> SCRATCH_SECURE_BOOTP_FCFG
- SECURE_SCRATCH_RSV11_* -> SCRATCH_SMMU_TABLE_ADDR_*
- SECURE_SCRATCH_RSV53_* -> SCRATCH_BOOT_PARAMS_ADDR_*
- SECURE_SCRATCH_RSV55_* -> SCRATCH_TZDRAM_ADDR_*

NOTE: Future SoCs will have to define these macros to
      keep the drivers functioning.

Change-Id: Ib3ba40dd32e77b92b47825f19c420e6fdfa8b987
Signed-off-by: Steven Kao <skao@nvidia.com>
2019-01-23 10:32:48 -08:00
Varun Wadekar d5bd0de627 Tegra: memctrl_v2: platform handler for TZDRAM settings
The Tegra memctrl driver sets up the TZDRAM fence during boot and
system suspend exit. This patch provides individual platforms with
handlers to perform platform specific steps, e.g. enable encryption,
save base/size to secure scratch registers.

Change-Id: Ifaa2e0eac20b50f77ec734256544c36dd511bd63
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-23 10:32:46 -08:00