Commit Graph

5101 Commits

Author SHA1 Message Date
Madhukar Pappireddy c5f9d99a7e Merge "fix(st): don't try to read boot partition on SD cards" into integration 2022-03-11 18:00:38 +01:00
Uwe Kleine-König 9492b391a3 fix(st): don't try to read boot partition on SD cards
When trying to boot from an SD card with STM32MP_EMMC_BOOT enabled,
booting fails with:

	ERROR:   Got unexpected value for active boot partition, 0
	ASSERT: plat/st/common/bl2_stm32_io_storage.c:285

because SD cards don't provide a boot partition. So only try reading
from such a partition when booting from eMMC.

Fixes: 214c8a8d08 ("feat(plat/st): add STM32MP_EMMC_BOOT option")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Change-Id: I354b737a3ae3ea577e83dfeb7096df22275d852d
2022-03-11 10:39:57 +01:00
Joanna Farley 7d00e72a39 Merge "fix(brcm): allow build to specify mbedTLS absolute path" into integration 2022-03-11 10:31:16 +01:00
Olivier Deprez 7c6d460eff Merge "fix(fvp): op-tee sp manifest doesn't map gicd" into integration 2022-03-10 18:47:09 +01:00
Madhukar Pappireddy 61fa552362 Merge "fix(fvp): FCONF Trace Not Shown" into integration 2022-03-10 18:24:14 +01:00
Madhukar Pappireddy 955be19907 Merge changes from topic "uart_segregation" into integration
* changes:
  feat(sgi): add page table translation entry for secure uart
  feat(sgi): route TF-A logs via secure uart
  feat(sgi): deviate from arm css common uart related definitions
2022-03-10 16:36:29 +01:00
Manish V Badarkhe 903d574295 fix(brcm): allow build to specify mbedTLS absolute path
Updated makefile so that build can accept absolute mbedTLS path.

Change-Id: Ife73266a01d7ed938aafc5e370240023237ebf61
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-03-10 15:24:52 +00:00
Juan Pablo Conde 0c55c10305 fix(fvp): FCONF Trace Not Shown
Updating call order for arm_console_boot_init() and arm_bl31_early_platform_setup().

Signed-off-by:  Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: If932fff2ee4282a0aacf8751fa81e7665b886467
2022-03-10 16:03:41 +01:00
Joanna Farley 1842d1f48d Merge "fix(brcm): fix the build failure with mbedTLS config" into integration 2022-03-10 10:14:49 +01:00
Manish V Badarkhe 95b5c0126b fix(brcm): fix the build failure with mbedTLS config
Patch [1] introduces a mechanism to provide the platform
specified mbedTLS config file, but that result in build failure
for Broadcom platform.
This build failure is due to the absence of the mbedTLS configuration
file i.e. brcm_mbedtls_config.h in the TF-A source code repository.
"fatal error: brcm_mbedtls_config.h: No such file or directory"

This problem was resolved by removing the 'brcm_mbedtls_config.h' entry
from the broadcom platform makefile, allowing this platform to use
the default mbedtls_config.h file.

[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/13726

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I7cc2efc049aefd3ebce1ae513df9b265fe31ded6
2022-03-09 18:03:11 +00:00
Rohit Mathew 33d10ac8bf feat(sgi): add page table translation entry for secure uart
Add page table translation entry for secure uart so that logs from
secure partition can be routed via the same.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I8574b31d5d138d9f94972deb903124f8c5b70ce4
2022-03-09 15:32:55 +00:00
Rohit Mathew 987e2b7c20 feat(sgi): route TF-A logs via secure uart
Route the boot, runtime and crash stage logs via secure UART port
instead of the existing use of non-secure UART. This aligns with the
security state the PE is in when logs are put out. In addition to this,
this allows consolidation of the UART related macros across all the
variants of the Neoverse reference design platforms.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I8896ae05eaedf06dead520659375af0329f31015
2022-03-09 15:32:55 +00:00
Rohit Mathew f2ccccaa81 feat(sgi): deviate from arm css common uart related definitions
The Neoverse reference design platforms will migrate to use different
set of secure and non-secure UART ports. This implies that the board
specific macros defined in the common Arm platform code will no longer
be usable for Neoverse reference design platforms.

In preparation for migrating to a different set of UART ports, add a
Neoverse reference design platform specific copy of the board
definitions. The value of these definitions will be changed in
subsequent patches.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I39170848ecd81a7c1bbd3689bd905e45f9435f5c
2022-03-09 15:32:55 +00:00
Madhukar Pappireddy 5e29432ebe Merge changes I713f6e93,Iac4fbf4d,I43d02c77,Iadecd544,Ib31f9c4a, ... into integration
* changes:
  build(intel): enable access to on-chip ram in BL31 for N5X
  fix(intel): make FPGA memory configurations platform specific
  fix(intel): fix ECC Double Bit Error handling
  build(intel): define a macro for SIMICS build
  build(intel): add N5X as a new Intel platform
  build(intel): initial commit for crypto driver
2022-03-09 15:17:24 +01:00
Olivier Deprez 69cde5cd95 fix(fvp): op-tee sp manifest doesn't map gicd
Following I2d274fa897171807e39b0ce9c8a28824ff424534:
Remove GICD registers S2 mapping from OP-TEE partition when it runs in a
secure partition on top of Hafnium.
The partition is not meant to access the GIC directly but use the
Hafnium provided interfaces.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I1a38101f6ae9911662828734a3c9572642123f32
2022-03-09 10:40:32 +01:00
Boon Khai Ng 39f262cfb4 build(intel): enable access to on-chip ram in BL31 for N5X
This adds the ncore ccu access and enable access to the
on-chip ram for N5X device in BL31.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I713f6e93d33b6e91705547477ca32cfba5c8c13d
2022-03-09 09:14:26 +08:00
Sieu Mun Tang f571183b06 fix(intel): make FPGA memory configurations platform specific
Define FPGA_CONFIG_SIZE and FPGA_CONFIG_ADDR in
platform-specific header. This is due to different
allocated sizes between platforms.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Iac4fbf4d4940cdf31834a9d4332f9292870dee76
2022-03-09 09:14:21 +08:00
Sieu Mun Tang c703d752cc fix(intel): fix ECC Double Bit Error handling
SError and Abort are handled in Linux (EL1) instead of
EL3. This patch adds some functionality that complements the
use cases by Linux as follows:

- Provide SMC for ECC DBE notification to EL3
- Determine type of reset needed and service the request in
  place of Linux

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I43d02c77f28004a31770be53599a5a42de412211
2022-03-09 09:14:16 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 1f1c0206d8 build(intel): define a macro for SIMICS build
SIMICS builds have different UART configurations compared
to hardware build. Hence, this patch defines a macro to
differentiate between both.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Iadecd5445e06611486ac3c6a214a6d0dc8ccd27b
2022-03-09 09:14:06 +08:00
Sieu Mun Tang 325eb35d24 build(intel): add N5X as a new Intel platform
This commit adds a new Intel platform called N5X.
This preliminary patch only have Bl31 support.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ib31f9c4a5a0dabdce81c1d5b0d4776188add7195
2022-03-09 09:14:03 +08:00
Sieu Mun Tang 286b96f4bb build(intel): initial commit for crypto driver
This patch adds driver for Intel FPGA's Crypto Services.
These services are provided by Intel platform
Secure Device Manager(SDM) and are made accessible by
processor components (ie ATF).
Below is the list of enabled features:
- Send SDM certificates
- Efuse provision data dump
- Encryption/decryption service
- Hardware IP random number generator

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: If7604cd1cacf27a38a9a29ec6b85b07385e1ea26
2022-03-09 09:13:20 +08:00
Madhukar Pappireddy 4cb2ec2ad2 Merge changes I18d47384,Icc3c7424,I73f20d82,I07325644,Iff10ad26, ... into integration
* changes:
  fix(zynqmp): query node status to power up APU
  feat(zynqmp): pm_api_clock_get_num_clocks cleanup
  feat(zynqmp): add feature check support
  fix(zynqmp): use common interface for eemi apis
  feat(zynqmp): add support to get info of xilfpga
  feat(zynqmp): pass ioctl calls to firmware
2022-03-08 16:29:49 +01:00
Madhukar Pappireddy f083fe4abb Merge "fix(versal): fix the incorrect log message" into integration 2022-03-07 16:05:21 +01:00
Venkatesh Yadav Abbarapu ea04b3fe18 fix(versal): fix the incorrect log message
When the atf-handoff-params are updated we are returning
FSBL_HANDOFF_SUCCESS, but the return condition is wrongly
updated and added a error log which is incorrect.
Fixing the incorrect log message.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I44ebbb861831b86afcb87f09ddb2e23614393c28
2022-03-06 21:09:23 -07:00
Yann Gautier 99887cb904 refactor(st): configure UART baudrate
Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 115200.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I000df70c10b2b4dac1449556596f9820c36cf243
2022-03-04 14:55:18 +01:00
Manish Pandey a7ef8b31ce Merge "feat(mt8186): disable 26MHz clock while suspending" into integration 2022-03-03 13:57:27 +01:00
Ravi Patel b35b556718 fix(zynqmp): query node status to power up APU
If APU is in suspending state and if wakeup request comes then
PMUFW returns error which is not handled at ATF side.

To fix this, get the APU node status before calling wakeup and
return error if found in suspending state.

Here, we can not handle the error code of pm_req_wakeup() from PMUFW
because ATF is already calling pm_client_wakeup() before calling
pm_req_wakeup().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I18d47384e46e22ae49e804093ad0641b7a6349e2
2022-03-02 22:10:57 -08:00
Michal Simek e682d38b56 feat(zynqmp): pm_api_clock_get_num_clocks cleanup
There is no reason to have even one additional useless line that's why
remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Icc3c74249dfe64173aa5c88fb0f9ffe7576fc2aa
2022-03-02 22:10:49 -08:00
Ronak Jain 223a6284b8 feat(zynqmp): add feature check support
This API returns version of supported APIs.

Here, there are three cases to check API version by using feature
check implementation.

1. Completely implemented in TF-A: I mean the EEMI APIs which are
completely implemented in the TF-A only. So check those IDs and
return appropriate version for the same. Right now, it is base
version.

2. Completely implemented in firmware: I mean the EEMI APIs which are
completely implemented in the firmware only. Here, TF-A only passes
Linux request to the firmware to get the version of supported API. So
check those IDs and send request to firmware to get the version and
return to Linux if the version is supported or return the error code
if the feature is not supported.

3. Partially implemented (Implemented in TF-A and firmware both):
First check dependent EEMI API version with the expected version in
the TF-A. If the dependent EEMI API is supported in firmware then
return its version and check with the expected version in the TF-A.
If the version matches then check for the actual requested EEMI API
version. If the version is supported then return version of API
implemented in TF-A.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I73f20d8222c518df1cda7879548b408b130b5b2e
2022-03-02 22:10:26 -08:00
Ronak Jain a469c1e1f4 fix(zynqmp): use common interface for eemi apis
Currently all EEMI API has its own implementation in TF-A which is
redundant. Most EEMI API implementation in TF-A does same work. It
prepares payload received from kernel, sends payload to firmware,
receives response from firmware and send response back to kernel.

So use common interface for EEMI APIs which has similar functionality.
This will optimize TF-A code.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I07325644a1fae80211f2588d5807c21973f6d48f
2022-03-02 22:10:11 -08:00
Nava kishore Manne cc077c2227 feat(zynqmp): add support to get info of xilfpga
Adds support to get the xilfpga library version and feature list info.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Iff10ad2628a6a90230c18dc3aebf9dde89f53ecd
2022-03-02 22:10:04 -08:00
Rajan Vaja 76ff8c459e feat(zynqmp): pass ioctl calls to firmware
Firmware supports new IOCTL for different purposes. To avoid
maintaining new IOCTL IDs in ATF, pass IOCTL call to firmware
for IOCTL IDs implemented in firmware.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Ie14697c8da9581b0f695f4d33f05161ece558385
2022-03-02 22:09:33 -08:00
Madhukar Pappireddy cf86fa1bfa Merge "feat(zynqmp): increase the max xlat tables when debug build is enabled" into integration 2022-03-02 19:28:13 +01:00
Venkatesh Yadav Abbarapu 4c4b9615b1 feat(zynqmp): increase the max xlat tables when debug build is enabled
Update the MAX_XLAT_TABLES as the memory map has been
added for the dtb to accomodate in DDR address.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46225673f40f123cdab38efefb038604da119b58
2022-03-02 02:25:14 -07:00
Venkatesh Yadav Abbarapu 18e2a79f8a feat(versal): remove the time stamp configuration
Remove the time stamp and system counter configuration, as
this configuration is already done by the first stage bootloader.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I41554dc2e14d97954bff299df9740a5efa30fad9
2022-03-01 21:20:21 -07:00
Manish Pandey c73cb40033 Merge "feat(plat/zynqmp): fix section `coherent_ram' will not fit in region `RAM'" into integration 2022-03-01 14:58:41 +01:00
Madhukar Pappireddy a78c6c9666 Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration 2022-02-28 20:36:30 +01:00
Manish Pandey a8e06f040b Merge changes from topic "st-fix-enum" into integration
* changes:
  fix(stm32mp1): fix enum prints
  fix(st-clock): print enums as unsigned
2022-02-28 18:30:38 +01:00
Yann Gautier ceab2fc344 fix(stm32mp1): fix enum prints
With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. But the current version of
compiler used in CI states that this parameter is signed. Just cast the
value then.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic0655e5ba9c44fe6abcd9958d7a9972f5de3b7ef
2022-02-28 17:20:06 +01:00
Madhukar Pappireddy f83de3bba3 Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration
* changes:
  fix(intel): null pointer handling for resp_len
  fix(intel): define macros to handle buffer entries
  fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
  fix(intel): always set doorbell to SDM after sending command
  fix(intel): fix bit masking issue in intel_secure_reg_update
  fix(intel): fix ddr address range checker
  build(changelog): add new scope for Intel platform
2022-02-28 17:18:39 +01:00
Madhukar Pappireddy b5d2b4d532 Merge "fix(intel): enable HPS QSPI access by default" into integration 2022-02-28 16:37:06 +01:00
Sandrine Bailleux 92537e170d Merge "fix(measured-boot): add RMM entry to event_log_metadata" into integration 2022-02-28 10:39:59 +01:00
jason-ch chen 9457cec8c0 feat(mt8186): disable 26MHz clock while suspending
Change resource_req to 0 to disable 26MHz clock.
SPM firmware will pull-down SRCLKENA0 after 26MHz off while suspending.

TEST=verify 26MHz clock off using the oscilloscope.
BUG=b:215639203

Signed-off-by: Jason-ch Chen <jason-ch.chen@mediatek.com>
Change-Id: I05702d14a015cabccd6d4af0e3f2a534fbe4dd12
2022-02-24 15:56:50 +08:00
Madhukar Pappireddy 2c23b9c1b3 Merge "fix(a3k): fix comment about BootROM address range" into integration 2022-02-23 16:27:00 +01:00
Madhukar Pappireddy 80b895ca71 Merge "feat(board/rdedmunds): add support for rdedmunds variant" into integration 2022-02-23 16:25:44 +01:00
Madhukar Pappireddy 176717989f Merge changes from topic "bug-fix" into integration
* changes:
  fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
  build(changelog): add new scope for nxp crypto
  fix(lx2): drop erratum A-009810
2022-02-23 15:34:57 +01:00
Tamas Ban f4e3e1e85f fix(measured-boot): add RMM entry to event_log_metadata
Platforms which support Realm world cannot boot up
properly if measured boot is enabled at build time.
An assertions occurs due to the missing RMM entry
in the event_log_metadata array.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I172f10a440797f7c9e1bc79dc72242b40c2521ea
2022-02-23 12:41:19 +01:00
Sieu Mun Tang a250c04b0c fix(intel): null pointer handling for resp_len
Previous changes from commit #6a659448 updates resp_len from an integer
type to unsigned integer pointer type. This patch adds proper handling
in case resp_len is a null pointer. Resp_len with value 0 are also
changed to NULL to match the type change.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I75b3e3bfbb188d8e7b329ba3b948c23e31dec490
2022-02-23 16:30:30 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 7db1895f0b fix(intel): define macros to handle buffer entries
This patch defines a macro to handle Secure Device Manager's (SDM)
pointer to command & response buffer entries and convert them to the
correct physical address.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4cf9f1d90e0d5ae4e1a2ce84165864b48c2862e7
2022-02-23 16:30:25 +08:00
Sieu Mun Tang 108514ff71 fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return
mailbox status and the argument's length back to the caller

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Change-Id: I50d2ae74845794cab7bf0858e742b5a70e0ea868
2022-02-23 16:29:12 +08:00