Commit Graph

29 Commits

Author SHA1 Message Date
Madhukar Pappireddy 91e6bef9f5 synquacer: Fix compilation fail for SPM support build config
Fix the header file path

Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
Change-Id: I73a92a3f0049ecbda7eade452405927c04048e01
2019-07-12 09:12:11 -05:00
Ambroise Vincent 5b6ebeec9c Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Masahisa Kojima cf6c30e08b plat/arm: mhu: make mhu driver generic
MHU doorbell driver requires arm platform specific
macro "PLAT_CSS_MHU_BASE".
Rename it to "PLAT_MHUV2_BASE", so that platforms other than arm
can use generic MHU doorbell driver.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2019-03-13 09:54:35 +09:00
Masahisa Kojima b67d20297f plat/synquacer: enable SCMI support
Enable the SCMI protocol support in SynQuacer platform.
Aside from power domain, system power and apcore management protocol,
this commit adds the vendor specific protocol(0x80).
This vendor specific protocol is used to get the dram mapping information
from SCP.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2019-03-13 09:54:15 +09:00
Antonio Nino Diaz 8855e52ec5 SPM: Rename SPM_DEPRECATED flag to SPM_MM
The SPM implementation based on MM is going to be kept for the
foreseeable future.

Change-Id: I11e96778a4f52a1aa803e7e048d9a7cb24a53954
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
2019-01-22 09:20:59 +00:00
Ard Biesheuvel 434454a271 plat/synquacer: enable SPM support
Enable the deprecated SPM framework for the SynQuacer platform.
It involves creating a memory layout in secure DRAM, and wiring
up the SPM infrastructure so that the secure partition payload
that is loaded into this region by the SCP firmware is dispatched
appropriately.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2019-01-15 17:51:23 +01:00
Ard Biesheuvel e373b6a28c plat/synquacer: enable OP-TEE logic only if SPD_opteed is set
The logic that initializes the BL32 entry point data structure
should only be executed if we are in fact loading OP-TEE, and
not if BL32_BASE is set for other reasons (i.e., when enabling
SPM)

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2019-01-15 17:51:23 +01:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Antonio Nino Diaz c3cf06f1a3 Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-08 10:20:19 +00:00
Antonio Nino Diaz ce1f43ac34 synquacer: Migrate to new interfaces
- Remove references to removed build options.
- Update Makefile paths.
- Migrate to bl31_early_platform_setup2().

Change-Id: I51cbf09a0297ac1ee645a959063238c9d556d8e1
Tested-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:31:53 +01:00
Antonio Nino Diaz c9512bca3b Fix MISRA defects in BL31 common code
Change-Id: I5993b425445ee794e6d2a792c244c0af53640655
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-30 09:22:33 +01:00
Antonio Nino Diaz 93c78ed231 libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.

Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-22 10:26:05 +01:00
danh-arm 60e062fb0e
Merge pull request #1486 from antonio-nino-diaz-arm/an/psci-misra
Fix several MISRA defects in PSCI library
2018-07-25 16:09:54 +01:00
Sumit Garg 6cb2a39703 synquacer: Enable optional OP-TEE support
OP-TEE loading is optional on Developerbox controlled via SCP
firmware. To check if OP-TEE is loaded or not, we use DRAM1 region
info passed by SCP firmware.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
2018-07-24 17:12:22 +05:30
Antonio Nino Diaz 1083b2b315 PSCI: Fix types of definitions
Also change header guards to fix defects of MISRA C-2012 Rule 21.1.

Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-20 13:49:22 +01:00
Sumit Garg 150c38e84d synquacer: Add platform makefile and documentation
Add Makefile and plaform definations file.
My thanks to Daniel Thompson and Ard Biesheuvel for the bits and pieces
I've taken from their earlier work regarding build and deploy steps for
Developerbox based on Synquacer SoCs. They deserve much of the credit
for this work although, since I assembled and tested things, any blame
is probably mine.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Tested-by: Daniel Thompson <daniel.thompson@linaro.org>
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2018-06-21 14:18:37 +05:30
Sumit Garg 753701ccb0 synquacer: Enable PSCI framework
PSCI framework uses SCPI driver to communicate to SCP firmware for
various power management operations. Following PSCI operations are
supported:
- CPU ON
- CPU OFF
- CPU STANDBY
- SYSTEM RESET
- SYSTEM OFF

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:32:54 +05:30
Ard Biesheuvel cfe19f85c9 synquacer: Retrieve DRAM info from SCP firmware
Retrieve DRAM info from SCP firmware using SCPI driver. Board supports
multiple DRAM slots so its required to fetch DRAM info from SCP firmware
and pass this info to UEFI via non-secure SRAM.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:32:34 +05:30
Sumit Garg b7ad044493 synquacer: Add SCPI driver
Add System Control and Power Interface (SCPI) driver which provides APIs
for PSCI framework to work. SCPI driver uses MHU driver APIs to communicate
with SCP firmware for various system control and power operations.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:23:13 +05:30
Sumit Garg 0537710040 synquacer: Add MHU driver
Add Message Handling Unit (MHU) driver used to communicate among
Application Processors (AP) and System Control Processor (SCP).

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:23:09 +05:30
Sumit Garg 8cd37d7ba1 synquacer: Enable MMU using xlat_tables_v2 library
BL31 runs from SRAM which is a non-coherent memory on synquacer. So
enable MMU with SRAM memory marked as Non-Cacheable and mark page tables
kept on SRAM as Non-Cacheable via XLAT_TABLE_NC flag. Also add page tables
for Device address space.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:23:03 +05:30
Sumit Garg 5931fdac63 synquacer: Enable System level Generic timer
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:57 +05:30
Sumit Garg b529799ff1 synquacer: Enable GICv3 support
synquacer uses GICv3 compliant GIC500. So enable proper GICv3 driver
initialization.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:52 +05:30
Sumit Garg 0eb275c9a2 synquacer: Enable CCN driver support
synquacer has CCN-512 interconnect. So enable proper CCN driver
initialization.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:48 +05:30
Sumit Garg 007a7a3358 synquacer: Implement topology functions
These functions describe the layout of the cores and clusters in order
to support the PSCI framework.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:42 +05:30
Sumit Garg 5e5cfc21f0 synquacer: Populate BL32 and BL33 entrypoints
As this platform supports direct entry to BL31 and no BL2, so
populate BL32 and BL33 entrypoints with static memory load info.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:36 +05:30
Sumit Garg 67b400705f synquacer: Enable PL011 UART Console
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:32 +05:30
Sumit Garg 85427debb1 synquacer: Add platform core management helpers
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:27 +05:30
Sumit Garg c35d59a3d8 synquacer: Introduce basic platform support
synquacer supports direct entry to BL31 without BL1 and BL2 as
SCP firmware does similar work. So this patch adds BL31 stub APIs.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2018-06-21 11:22:23 +05:30