Commit Graph

4894 Commits

Author SHA1 Message Date
Varun Wadekar 596929b971 locks: linker variables to calculate per-cpu bakery lock size
This patch introduces explicit linker variables to mark the start and
end of the per-cpu bakery lock section to help bakery_lock_normal.c
calculate the size of the section. This patch removes the previously
used '__PERCPU_BAKERY_LOCK_SIZE__' linker variable to make the code
uniform across GNU linker and ARM linker.

Change-Id: Ie0c51702cbc0fe8a2076005344a1fcebb48e7cca
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 09:00:52 -08:00
Varun Wadekar 5e2fe3a3b5 Tegra186: trampoline: include bl_common.h
This patch includes bl_common.h from plat_trampoline.S to link with
the __BL31_END__ symbol.

Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:51 -08:00
Varun Wadekar b8c7e54d2c Tegra186: use common 'BL31_BASE' variable
This patch modfies the 'tegra_soc_pwr_domain_power_down_wfi' handler
to use BL31_BASE variable, provided by bl_common.h

Change-Id: I9747228d0193c1ae6999284458b9f866955a61a2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:42 -08:00
Varun Wadekar 1242b9a9d0 lib: aarch64: misc_helpers: include bl_common.h
This patch includes bl_common.h to get access to the linker
defined symbols.

Change-Id: I9aa4a6e730273d75a53438854f69971e485bc904
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:32 -08:00
Varun Wadekar e095ba34d7 Remove unused function symbols
This patch removes the unused functions that are marked as .global
in code but not defined anywhere in the code.

Change-Id: Ia5057a77c0b0b4a61043eab868734cd3437304cc
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:21 -08:00
Varun Wadekar bf52f40e2a lib: aarch64: fix non-code symbol errors flagged by armlink
This patch modifies the code to turn __1printf and __2printf into proper
functions to fix the following errors flagged by armlink.

Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.

Change-Id: I89126bc2b9db44ce8b8fc9fb1e3fc4c8c60c47a4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:09 -08:00
Varun Wadekar 9c2eda0193 Tegra: remove circular dependency with common_def.h
This patch stops including common_def.h from platform_def.h to
fix a circular depoendency between them.

This means platform_def.h now has to define the linker macros:
* PLATFORM_LINKER_FORMAT
* PLATFORM_LINKER_ARCH

Change-Id: Icd540b1bd32fb37e0e455e9146c8b7f4b314e012
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:01 -08:00
Kalyani Chidambaram 636fcb0ba5 Tegra: define CACHE_WRITEBACK_GRANULE for scatterfile
The scatterfile to support armlink, does not seem to support
shift operator. To handle this define CACHE_WRITEBACK_GRANULE with
the direct value.

Change-Id: I19afc7cb9c55a08cb0703f284d91018d3214353f
Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>
2019-02-07 08:46:52 -08:00
Antonio Niño Díaz 30490b15fe
Merge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19
Tf2.0 tegra downstream rebase 1.25.19
2019-02-06 10:20:25 +00:00
Antonio Niño Díaz d636f67e60
Merge pull request #1805 from antonio-nino-diaz-arm/an/generic-timer
drivers: generic_delay_timer: Assert presence of Generic Timer
2019-02-06 10:20:12 +00:00
Antonio Nino Diaz 29a24134c1 drivers: generic_delay_timer: Assert presence of Generic Timer
The Generic Timer is an optional extension to an ARMv7-A implementation.
The generic delay timer can be used from any architecture supported by
the Trusted Firmware. In ARMv7 it is needed to check that this feature
is present. In ARMv8 it is always present.

Change-Id: Ib7e8ec13ffbb2f64445d4ee48ed00f26e34b79b7
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-06 09:54:42 +00:00
Varun Wadekar a474d3d700 docs: add Tegra186 information to nvidia-tegra.rst
This patch adds information about the Tegra186 platforms to the
docs.

Change-Id: I69525c60a0126030dc15505ec7f02ccf8250be6f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 9a861d0f15 Tegra186: remove ENABLE_AFI_DEVICE macro usage
This patch removes this macro and its usage as it is used only
within the Tegra186 files and all derived platforms keep the
macro enabled.

Change-Id: Ib831b3c002ba4dedc3d5fafbb7d321daa28fa9ea
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 15440c5280 spd: trusty: memmap trusty's code memory before peeking
This patch dynamically maps the first page of trusty's code memory,
before accessing it to find out if we are running a 32-bit or 64-bit
image.

On Tegra platforms, this means we have to increase the mappings to
accomodate the new memmap entry.

Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 500fc9e10b Tegra: initialise per-CPU GIC interface(s)
This patch initilises the per-CPU GIC bits during cold boot and
secondary CPU power up. Commit 80c50ee accidentally left out this
part.

Change-Id: I73ce59dbc83580a84b827cab89fe7e1f65f9f130
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 843d0aad80 Tegra: spe: prepend '\r' to '\n'
This patch udpates the SPE console driver to prepend '\r' to
'\n'. This fixes the alignment of prints seen by the host
machines on their UART ports.

Tested by collecting the logs from host PC using Cutecom

Reported by: Mustafa Bilgen <mbilgen@nvidia.com>

Change-Id: I6e0b412bd71ff5eb889582071df8c157da5175ed
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Vignesh Radhakrishnan 07faf4d8c5 Tegra: Enable irq as wake-up event for cpu_standby
As per ARM ARM D1.17.2, any physical IRQ interrupt received by the PE
will be treated as a wake-up event, if SCR_EL3.IRQ is set to '1',
irrespective of the value of the PSTATE.I bit value.

This patch programs the SCR_EL3.IRQ bit before entering CPU standby
state, to allow an IRQ to wake the PE. On waking up, the previous
SCR_EL3 value is restored.

Change-Id: Ie81cf3a7668f5ac35f4bf2ecc461b91b9b60650c
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
2019-02-05 08:27:43 -08:00
Anthony Zhou b695af1dfc Tegra: remove unused libc files from makefile
This patch redefines the variable LIBC_SRCS for Tegra platforms,
to remove unused libc files from the list. This patch is a building
block to eventually use other libc implementations in the future.

Change-Id: Iccde5a75f5e2d6f4e2dbc6274beb423b80e846fd
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 77f1f7a117 Introduce build option to override libc
This patch introduces a build option 'OVERRIDE_LIBC' that platforms
can set to override libc from the BL image. The default value is '0'
to keep the library.

Change-Id: I10a0b247f6a782eeea4a0359e30a8d79b1e9e4e1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:32 -08:00
Antonio Niño Díaz a45ccf135e
Merge pull request #1804 from antonio-nino-diaz-arm/an/cleanup
Minor cleanup
2019-02-05 11:31:15 +00:00
Antonio Niño Díaz 49dd04815f
Merge pull request #1806 from thomas-arm/master
sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms
2019-02-05 11:31:05 +00:00
Thomas Abraham e64044ba8f sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms
Add a second maintainer for Arm's SGI and SGM platform support in
trusted firmware to handle the review and maintenance of
existing and upcoming platforms.

Change-Id: Ie7fa8da280d9351f7543122fb261d6ac6c7e15ad
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
2019-02-05 14:03:50 +05:30
Antonio Niño Díaz 5c8a7732e1
Merge pull request #1799 from soby-mathew/sm/gicr_probe
GICv3: Allow probe for fewer GICR interfaces than exposed by the frame
2019-02-04 18:19:07 +00:00
Antonio Niño Díaz 6ce3034688
Merge pull request #1783 from thloh85-intel/integration_v2
plat: intel: Add BL2 support for Stratix 10 SoC
2019-02-04 18:14:58 +00:00
Soby Mathew 5dc2c3f95c GICv3: Allow probe for fewer GICR interfaces than exposed by the frame
Previously the GICv3 redistributor probe function
(gicv3_rdistif_base_addrs_probe()) asserted that the number of
per-CPU redistributor interfaces expected to be probed by the
platform is equal to the number exported by the redistributor
frame. This is a problem in case the number of CPUs in the
platform is less than the number of redistributor interfaces
in the frame. Hence this patch removes the assertion check
and allows probe for fewer redistributor interfaces as required
by the platform.

Change-Id: I3449763a3ad70817224442cbe184d001030c9874
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2019-02-04 15:42:36 +00:00
Antonio Niño Díaz c57abde6f5
Merge pull request #1803 from sandrine-bailleux-arm/sb/arm-bl33-fixes
Fixes related to BL33 image on Arm platforms
2019-02-04 11:27:35 +00:00
Antonio Niño Díaz 5735057d15
Merge pull request #1796 from grandpaul/rpi3-sdhost-driver
RPi3 SDHost driver
2019-02-04 11:26:00 +00:00
Loh Tien Hock 9d82ef26c6 plat: intel: Add BL2 support for Stratix 10 SoC
This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
2019-02-04 16:17:24 +08:00
Antonio Nino Diaz 5e447816c7 Remove unneeded include paths in PLAT_INCLUDES
Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00
Antonio Nino Diaz 702b600ff3 xlat v2: Fix comment
Change-Id: Id7c22d76b896d1dcac18cdb0e564ce4e02583e33
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00
Antonio Nino Diaz f660533729 Remove duplicated definitions of linker symbols
Many parts of the code were duplicating symbols that are defined in
include/common/bl_common.h. It is better to only use the definitions in
this header.

As all the symbols refer to virtual addresses, they have to be
uintptr_t, not unsigned long. This has also been fixed in bl_common.h.

Change-Id: I204081af78326ced03fb05f69846f229d324c711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00
Antonio Niño Díaz 0d8453564b
Merge pull request #1800 from sandrine-bailleux-arm/sb/load-img-v2
Remove dead code related to LOAD_IMAGE_V2=0
2019-02-01 11:43:17 +00:00
Antonio Niño Díaz 48eccbc2ca
Merge pull request #1802 from oscardagrach/master
hikey960: EDMAC: leave channel 0 as secure
2019-02-01 11:42:09 +00:00
Sandrine Bailleux d57d2b3158 Arm platforms: Fix max size of BL33 image
The BL33 image must not go past the end of DRAM.

Change-Id: I56668ab760d82332d69a8904d125d9a055aa91d5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-01 10:48:34 +01:00
Sandrine Bailleux ece6fd2dac Arm platforms: Rename PLAT_ARM_NS_IMAGE_OFFSET
PLAT_ARM_NS_IMAGE_OFFSET is in fact not an offset relative to some base
address, it is an absolute address. Rename it to avoid any confusion.

Change-Id: I1f7f5e8553cb267786afe7e5f3cd4d665b610d3f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-01 10:48:34 +01:00
Ying-Chun Liu (PaulLiu) 92d2f49121 maintainers: Add maintainter for Raspberry Pi 3 platform.
This patch adds myself to co-maintainer list of Raspberry Pi 3
platform.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2019-02-01 05:28:48 +08:00
Ying-Chun Liu (PaulLiu) 968377fcba rpi3: Enable SDHost driver in BL2
This patch inits SDHost in BL2 earlysetup. BL2 can start operating mmc
commands to read/write MMC raw blocks.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2019-02-01 04:09:31 +08:00
Ying-Chun Liu (PaulLiu) 0503adf4f3 rpi3: Add SDHost driver
This commit adds SDHost driver for RaspberryPi3. SDHost driver uses the
GPIO driver to connect the SDCard and SDHost. By using this driver it is
able to read/write raw blocks on SDCard.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2019-02-01 04:09:31 +08:00
Antonio Niño Díaz f7bf9b0d95
Merge pull request #1801 from sandrine-bailleux-arm/sb/doc
User Guide: Move ARM_PLAT_MT doc to Arm build flags
2019-01-31 17:03:17 +00:00
Varun Wadekar a01b0f1619 Tegra: restrict non-secure PMC accesses
Platforms that do not support bpmp firmware, do not need access
to the PMC block from outside of the CPU complex. The agents
running on the CPU can always access the PMC through the EL3
exception space.

This patch restricts non-secure world access to the PMC block on
such platforms.

Change-Id: I2c4318dc07ddf6407c1700595e0f4aac377ba258
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:50:52 -08:00
Krishna Reddy a7f4e89b27 Tegra186: memctrl: disable stream id writes for MC clients
As per the latest recommendations from the hardware team, write access
needs to be disabled for APE, BPMP, NvDec and SCE clients. This patch
disables stream id register writes for these MC clients to implement
those recommendations.

Change-Id: I8887c0f2cc5bc3fc5bba42074810ba5c1d3f121f
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
2019-01-31 08:50:43 -08:00
Varun Wadekar e6712cf547 Tegra: bpmp: mark device "not present" on boot timeout
This patch updates the state machine to "not present" if the bpmp
firmware is not found in the system during boot. The suspend
handler also checks now if the interface exists, before updating
the internal state machine.

Reported by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>

Change-Id: If8fd7f8e412bb603944555c24826855226e7f48c
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:50:31 -08:00
Varun Wadekar 6a397d1d44 Tegra210: toggle ring oscillator across cluster idle
This patch toggles the ring oscillator state across cluster idle
as DFLL loses its state. We dont want garbage values being written
to the pmic when we enter cluster idle state, so enable "open loop"
when we enter CC6 and restore the state to "closed loop" on exit.

Change-Id: I56f4649f57bcc651d6c415a6dcdc978e9444c97b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:50:22 -08:00
kalyani chidambaram da0f474375 Tegra210: clear PMC_DPD registers on resume
This patch clears the PMC's DPD registers on resuming from System
Suspend, for all Tegra210 platforms that support the sc7entry-fw.

Change-Id: I7881ef0a5f609ed28b158bc2f4016abea3c7f305
Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>
2019-01-31 08:50:13 -08:00
Varun Wadekar e275ae7ae5 Tegra210: suspend/resume bpmp interface across System Suspend
The BPMP firmware takes some time to initialise its state on exiting
System Suspend state. The CPU needs to synchronize with the BPMP during
this process to avoid any race conditions. This patch suspends and resumes
the BPMP interface across a System Suspend cycle, to fix this race.

Change-Id: I82a61d12ef3eee267bdd8d4386bed23397fbfd2d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:50:02 -08:00
Varun Wadekar d37a1322a0 Tegra: bpmp: suspend/resume handlers
This patch adds suspend and resume handlers for the BPMP
interface. Mark the interface as "suspended" before entering
System Suspend and verify that BPMP is alive on exit.

Change-Id: I74ccbc86125079b46d06360fc4c7e8a5acfbdfb2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:49:50 -08:00
Stephen Wolfe 1ffaaec9ec spd: trusty: pass max affinity level to Trusty
During System Suspend, the entire system loses its state. To allow Trusty
to save/restore its context and allow its TAs to participate in the suspend
process, it needs to look at the max affinity level being suspended. This
patch passes the max affinity level to Trusty to enable to do so.

Change-Id: If7838dae10c3f5a694baedb15ec56fbad41f2b36
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:49:38 -08:00
Varun Wadekar c33473d527 Tegra210: skip past sc7entry-fw signature header
This patch skips past the signature header added to the sc7entry-fw
binary by the previous level bootloader. Currently, the size of
the header is 1KB, so adjust the start address and the binary size
at the time of copy.

Change-Id: Id0494548009749035846d54df417a960c640c8f9
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:49:28 -08:00
Varun Wadekar 7350277ba8 Tegra210: move sc7entry-fw inside the TZDRAM fence
This patch uses the sc7entry-fw base/size values to calculate the
TZDRAM fence, so as to move sc7entry-fw inside the TZDRAM fence.

Change-Id: I91aeeeece857076c478cdc4c18a6ad70dc265031
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-01-31 08:49:18 -08:00
kalyani chidambaram fdc08e2ecb Tegra210: SiP handlers to allow PMC access
This patch adds SiP handler for Tegra210 platforms to service
read/write requests for PMC block. None of the secure registers
are accessible to the NS world though.

Change-Id: I7dc1f10c6a6ee6efc642ddcfb1170fb36d3accff
Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>
2019-01-31 08:49:05 -08:00