This patch enables the Exception Handling Framework to service the WDT
interrupts on all Tegra platforms.
Verified that the watchdog timer interrupt fires after migrating to
the EHF.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I6b2e33da7841aa064e3a8f825c26fadf168cd0d5
This patch changes the prototype cm_setup_context() to use struct entry_point_info
rather than the typedef'ed version of it. This fixes the following compilation error
seen with EL3_EXCEPTION_HANDLING = 1.
<snip>
In file included from bl31/ehf.c:19:
include/lib/el3_runtime/context_mgmt.h:35:49: error: unknown type name 'entry_point_info_t'
35 | void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep);
| ^~~~~~~~~~~~~~~~~~
<snip>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I73b059ff2dade2259cefd0f9a097c7ea4a88055d
We simulate the PSCI CPU_OFF operation by reseting the core via RMR.
For secondaries, that already puts them in the holding pen waiting for a
"warm boot" request as part of PSCI CPU_ON. For the BSP, we have to add
logic to distinguish a regular boot from a CPU_OFF state, where, like the
secondaries, the BSP needs to wait foor a "warm boot" request as part
of CPU_ON.
Testing done:
- ACS suite now passes more tests (since it repeatedly
calls code on secondaries via CPU_ON).
- Linux testing including offlining/onlineing CPU0, e.g.
"echo 0 > /sys/devices/system/cpu/cpu0/online".
Change-Id: Id0ae11a0ee0721b20fa2578b54dadc72dcbd69e0
Link: https://developer.trustedfirmware.org/T686
Signed-off-by: Andrei Warkentin <andrey.warkentin@gmail.com>
[Andre: adapt to unified plat_helpers.S, smaller fixes]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
When writing to arbitrary locations in memory using a constructed
pointer, there is no guarantee that the compiler does not optimise away
the access, since it cannot detect any dependency.
One typical solution is to use the "volatile" keyword, but using MMIO
accessors in usually the better answer, to avoid torn writes.
Replace the usage of an array with such an MMIO accessor function in
rpi3_pwr_domain_on(), to make sure the write is really happening.
Change-Id: Ia18163c95e92f1557471089fd18abc6dc7fee0c7
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The plat_helpers.S file was almost identical between its RPi3 and RPi4
versions. Unify the two files, moving it into the common/ directory.
This adds a plat_rpi_get_model() function, which can be used to trigger
RPi4 specific action, detected at runtime. We use that to do the RPi4
specific L2 cache initialisation.
Change-Id: I2295704fd6dde7c76fe83b6d98c7bf998d4bf074
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
BL2 for this platform uses mmap_add_dynamic_region(), but BL31 and
BL32 (TSP) only use static mapping. So, BL31 and BL32 can make the
tables read-only after enabling MMU.
Enable ALLOW_RO_XLAT_TABLES by default.
Change-Id: Ib59c44697163629119888bb6abd47fa144f09ba3
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, enable_mmu_el1() or enable_mmu_el3() is kept outside the
common function because the appropriate one must be chosen.
Use enable_mmu() and move it to the common function.
Change-Id: If2fb651691a7b6be05674f5cf730ae067ba95d4b
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Update the plantuml diagrams to match the latest modification in fconf.
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Change-Id: I90f55bba0fd039a3f7e1bd39661cf849fccd64f5
Enable MTE support by adding memory tag option in Makefile
This option is available only when ARMv8.5-MemTag is implemented
MTE options are added in latest clang and armclang compiler which
support below options:
for clang <version 11.0.0>
1. -march=arm8.5-a+memtag
2. -fsanitize=memtag
for armclang <version 6.12>
1. -march=arm8.5-a+memtag
2. -mmemtag-stack
Set the option SUPPORT_STACK_MEMTAG=yes to enable memory stack tagging.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I4e0bbde4e9769ce03ead6f550158e22f32c1c413
At the moment, OP-TEE has no support to receive a DTB in Secure Memory
so it cannot receive TOS_FW_CONFIG_ID as it is supposed to happen on
any BL32 image. Instead, when OP-TEE is enable as BL32 payload,
NT_FW_CONFIG_ID is passed.
This MUST be reverted as soon as OP-TEE has support for receiving
DTBs from Secure Memory.
Change-Id: I9a873f42e94f2f99a60b638333e7afba1505aec9
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
The file README.odroid-c2 has been moved in the U-Boot repository.
Reference the official uplink repository.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Change-Id: Ie72c7aefd6363a406f88ad2c87faee1c7a2125a3
Unless specified in the environment, $(CC) expands to some generic
host C compiler like cc or c99. We set our own value for $(CC), but
only few lines later.
Move the first use of the $(CC) variable behind the definition to
correct this.
Change-Id: I45344e063d21ddfe22b7ad77954e85c1c46087bd
Fixes: 1684b8733 ("Use clang assembler when clang compiler is used")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
fconf_dyn_cfg_getter.c calls FCONF_REGISTER_POPULATOR(), which populates
the fconf_populator structure.
However, bl1/bl1.ld.S does not have:
__FCONF_POPULATOR_START__ = .;
KEEP(*(.fconf_populator))
__FCONF_POPULATOR_END__ = .;
So, this is not linked to bl1.elf
We could change either bl1/bl1.lds.S or lib/fconf/fconf.mk to make
them consistent.
I chose to fix up fconf.mk to keep the current behavior.
This is a groundwork to factor out the common code from linker scripts.
Change-Id: I07b7ad4db4ec77b57acf1588fffd0b06306d7293
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
sp_min.ld.S is used for aarch32.
ALIGN(4) is used for alignment of the other structures. I do not think
struct fconf_populator is a special case. Let's use ALIGN(4) here too.
Perhaps, this is just a copy-paste mistake of commit 26d1e0c330
("fconf: necessary modifications to support fconf in BL31 & SP_MIN").
Change-Id: I29f4c68680842c1b5ef913934b4ccf378e9bfcfb
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
-D is a preprocessor flag that defines a macro. So, adding it to
BL*_CPPFLAGS makes more sense. You can reference it not only from
.c files but also from .S files.
Change-Id: Ib4f2f27a3ed3eae476a6a32da7ab5225ad0649de
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, BL*_CFLAGS and BL*_LDFLAGS are supported.
For completion, this adds BL*_CPPFLAGS and BL*_ASFLAGS.
My main motivation is to pass -D<macro> to BL*_CPPFLAGS so that
the macro can be used from all source files.
Change-Id: I0ca1e4e26386bef7fed999af140ee7cce7c2f8ef
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
enable_mmu_* has a different function name, so it is not handy in the
shared code. enable_mmu() calls an appropriate one depending on the
exception level.
Change-Id: I0657968bfcb91c32733f75f9259f550a5c35b1c3
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
There are some cases where we want to run EL-dependent code in the
shared code.
We could use #ifdef, but it leaves slight possibility where we do not
know the exception level at the build-time (e.g. library code).
The counter approach is to use get_current_el(), but it is run-time
detection, so all EL code is linked, some of which might be unneeded.
This commit adds get_current_el_maybe_constant(). This is a static
inline function that returns a constant value if we know the exception
level at build-time. This is mostly the case.
if (get_current_el_maybe_constant() == 1) {
/* do something for EL1 */
} else if (get_current_el_maybe_constant() == 3) {
/* do something for EL3 */
}
If get_current_el_maybe_constant() is build-time constant, the compiler
will optimize out the unreachable code.
If such code is included from the library code, it is not built-time
constant. In this case, it falls back to get_current_el(), so it still
works.
Change-Id: Idb03c20342a5b5173fe2d6b40e1fac7998675ad3
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The build system defines the IMAGE_BL* macro when compiling each image.
This is useful to distinguish which image the current file is being
built for by using #if defined(IMAGE_BL2) or #if defined(IMAGE_BL31),
or whatever.
There are some cases where we are more interested in which exception
level the current file is being built for.
include/lib/cpus/{aarch32,aarch64}/cpu_macros.S defines IMAGE_AT_EL3,
but we do not have it globally.
Pass IMAGE_AT_EL1 or IMAGE_AT_EL3 to BL*_CFLAGS so that it is available
from all C code.
The library code (libc.a, libmbedtls.a, etc.) is exceptional cases,
where the code can be shared between BL images.
Other than that, we know the exception level at the build time, and
this macro will be useful in the shared code.
Change-Id: I7c8a1da10726906adfba981cfe8464dff111d6b0
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
1. Necessary changes to platform makefile to include fw_config
device tree and package it in fip.bin
2. Removed hw_config node from fw_config dts as there is no
HW_CONFIG device tree source for sgm775
3. Added mbedtls_heap related properties for TBBR functionality
Change-Id: I26b940c65b17ad2fb5537141f8649785bb0fd4ad
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
* changes:
stm32mp1: use stm32mp_get_ddr_ns_size() function
stm32mp1: set XN attribute for some areas in BL2
stm32mp1: dynamically map DDR later and non-cacheable during its test
stm32mp1: add a function to get non-secure DDR size
Moved SMCCC defines from plat_arm.h to new <smccc_def.h> header
and include this header in all ARM platforms.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I4cbc69c7b9307461de87b7c7bf200dd9b810e485
This patch moves all GICv3 driver files into new added
'gicv3.mk' makefile for the benefit of the generic driver
which can evolve in the future without affecting platforms.
The patch adds GICv3 driver configuration flags
'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and
'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in
'GICv3 driver options' section of 'build-option.rst'
document.
NOTE: Platforms with GICv3 driver need to be modified to
include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles.
Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Use ARRAY_SIZE macro instead of sizeof operator to obtain the maximum
number of SCMI channels supported on the platform.
Change-Id: Id922bb548af98ac99b4ac0c34e38e589e5a80b2d
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
* changes:
plat/arm/board/arm_fpga: Compile with additional CPU libraries
plat/arm/board/arm_fpga: Enable position-independent execution
plat/arm/board/arm_fpga: Enable port for alternative cluster configurations
plat/arm/board/arm_fpga: Initialize the Generic Interrupt Controller
plat/arm/board/arm_fpga: Initialize the System Counter
plat/arm/board/arm_fpga: Add PSCI implementation for FPGA images
plat/arm/board/arm_fpga: Use preloaded BL33 alternative boot flow
plat/arm/board/arm_fpga: Enable basic BL31 port for an FPGA image
Manish Pandey
Mark Dykes
Varun Wadekar
Alexei Fedorov
Andrei Warkentin
Andre Przywara
Masahiro Yamada
Louis Mayencourt
Manish V Badarkhe
Javier Almansa Sobrino
Sandrine Bailleux
laurenw-arm
Heinrich Schuchardt
Olivier Deprez
Ahmad Fatoum
Madhukar Pappireddy
Aditya Angadi