Commit Graph

3593 Commits

Author SHA1 Message Date
Sandrine Bailleux 6c77e74915 Fix some violations to MISRA rule 8.3
Wherever we use 'struct foo' and 'foo_t' interchangeably in a
function's declaration and definition, use 'struct foo' consistently
for both, as per the TF-A coding guidelines [1].

[1] https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firmware-Coding-Guidelines#avoid-anonymous-typedefs-of-structsenums-in-header-files

Change-Id: I7998eb24a26746e87e9b6425529926406745b721
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-07-11 17:33:29 +02:00
Dimitris Papastamos df4c512d47
Merge pull request #1474 from dp-arm/dp/cpus
Add initial CPU support for Cortex-Deimos and Cortex-Helios
2018-07-11 14:22:22 +01:00
Joel Hutton 46e8870385 Add initial CPU support for Cortex-Helios
Change-Id: Ic0486131c493632eadf329f80b0b5904aed5e4ef
Signed-off-by: Joel Hutton <joel.hutton@arm.com>
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-07-11 13:26:52 +01:00
Joel Hutton c84b6cb1aa Add initial CPU support for Cortex-Deimos
Change-Id: I2c4b06423fcd96af9351b88a5e2818059f981f1b
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-07-11 13:26:48 +01:00
Dimitris Papastamos 6cbf17d114
Merge pull request #1473 from robertovargas-arm/misra
Misra
2018-07-11 13:15:52 +01:00
Dimitris Papastamos 9a93d8ccff
Merge pull request #1460 from robertovargas-arm/clang
Make TF compatible with Clang assembler and linker
2018-07-11 11:13:36 +01:00
Roberto Vargas 4a98f0ef4c Update documentation about how to use clang toolchain
Change-Id: Ie65eb779b048940cf32ed5744ff40610b3c5499d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:23:07 +01:00
Roberto Vargas 7040155e58 Use clang as preprocessor when clang toolchain is selected
Change-Id: I562c5de91e12fe384245df41225dfb9122a13a85
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:23:06 +01:00
Roberto Vargas 1684b8733d Use clang assembler when clang compiler is used
Change-Id: Ib90b767e46360ef07c1f22526e3f3eb5fe366d5d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:23:05 +01:00
Roberto Vargas 9fdad69909 Remove integrity check in declare_cpu_ops_base
This check was added to ensure the correct behaviour of fill_constants
macro. This macro has been verified and it is known his correct
behaviour. The check generates an error when the clang assembler is
used, so it is better to remove the check.

Change-Id: I3447ff9e9e5ee5cf0502f65e53c3d105d9396b8b
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:23:04 +01:00
Roberto Vargas f21b9f6d6e Remove .struct directive
This directive is not implemented by clang assembler. The traditional
way to implement structs in assembly is using two macros for every field,
one for the offset, and another one for the size. For every field, the
offset can be calculated using the size and offset of the previous field.

Change-Id: Iacc6781e8f302fb925898737b8e85ab4e88a51cc
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:23:02 +01:00
Roberto Vargas be7d7f9f51 Remove string concatenation in assembler files
Clang assembler doesn't support concatenation of adjacent strings.

Change-Id: I092a1e30c137d431c6adcc13519fc2d595f92f14
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:23:01 +01:00
Roberto Vargas a9203edae7 Add end_vector_entry assembler macro
Check_vector_size checks if the size of the vector fits
in the size reserved for it. This check creates problems in
the Clang assembler. A new macro, end_vector_entry, is added
and check_vector_size is deprecated.

This new macro fills the current exception vector until the next
exception vector. If the size of the current vector is bigger
than 32 instructions then it gives an error.

Change-Id: Ie8545cf1003a1e31656a1018dd6b4c28a4eaf671
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:23:00 +01:00
Roberto Vargas b2805dabaa Remove .func and .endfunc assembler directives
These directives are only used when stabs debugging information
is used, but we use ELF which uses DWARF debugging information.
Clang assembler doesn't support these directives, and removing
them makes the code more compatible with clang.

Change-Id: I2803f22ebd24c0fe248e04ef1b17de9cec5f89c4
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:22:56 +01:00
Roberto Vargas 2adee763f1 Allow overriding the linker
This patch allows the user to override the value of the LD Makefile
variable. This feature can be used to force the use of the new Clang
linker.

Change-Id: I97ffeb18e48fa75346702a479d7dc1e8abcb3621
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:22:51 +01:00
Roberto Vargas ad92509476 Add .extab and .exidx sections
These sections are required by clang when the code is compiled for
aarch32. These sections are related to the unwind of the stack in
exceptions, but in the way that clang defines and uses them, the
garbage collector cannot get rid of them.

Change-Id: I085efc0cf77eae961d522472f72c4b5bad2237ab
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:21:04 +01:00
Roberto Vargas 5629b2b11c Use ALIGN instead of NEXT in linker scripts
Clang linker doesn't support NEXT. As we are not using the MEMORY command
to define discontinuous memory for the output file in any of the linker
scripts, ALIGN and NEXT are equivalent.

Change-Id: I867ffb9c9a76d4e81c9ca7998280b2edf10efea0
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:21:02 +01:00
Roberto Vargas 00b7db3038 Add documentation about clang version supported
The user guide didn't contain any information about the
requirements of the clang version needed by TF, which is
at least 4.0.

Change-Id: I1ea120aca0fb2c0950fbeaf6978c654ec277afde
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:20:59 +01:00
Dimitris Papastamos 89a793425b
Merge pull request #1469 from satheesbalya-arm/dtc_doc
Add device-tree-compiler to the list of packages
2018-07-11 09:18:38 +01:00
Sathees Balya befcbdffc9 Added device-tree-compiler to the list of packages
Change-Id: Ia7800dae52f152b2c3a3b41f1078ab7499d2f4b6
Signed-off-by: Sathees Balya <sathees.balya@arm.com>
2018-07-10 14:49:38 +01:00
Roberto Vargas 311a1a8ee8 Fix MISRA rule 8.4
Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
	make DEBUG=1 PLAT=juno SPD=tspd CSS_USE_SCMI_SDS_DRIVER=1 all

Change-Id: Id732c8df12ef3e20903c41b7ab9a9b55341d68ac
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-10 13:54:48 +01:00
Roberto Vargas 0fbb7a4afe Fix MISRA rule 8.3
Rule 8.3: All declarations of an object or function shall
              use the same names and type qualifiers.

Fixed for:
make DEBUG=1 PLAT=juno SPD=tspd CSS_USE_SCMI_SDS_DRIVER=1 all

Change-Id: Id9dcc6238b39fac6046abc28141e3ef5e7aa998d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-10 13:33:05 +01:00
Roberto Vargas a9b5b4aea1 Fix MISRA rule 8.4
Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
	make DEBUG=1 PLAT=juno ARCH=aarch32 AARCH32_SP=sp_min RESET_TO_SP_MIN=1 JUNO_AARCH32_EL3_RUNTIME=1 bl32

Change-Id: I3ac25096b55774689112ae37bdf1222f9a9ecffb
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-10 11:17:53 +01:00
Roberto Vargas c96f297f8d Fix MISRA rule 8.3
Rule 8.3: All declarations of an object or function shall
              use the same names and type qualifiers.

Fixed for:
	make DEBUG=1 PLAT=juno ARCH=aarch32 AARCH32_SP=sp_min RESET_TO_SP_MIN=1 JUNO_AARCH32_EL3_RUNTIME=1 bl32

Change-Id: Ia34f5155e1cdb67161191f69e8d1248cbaa39e1a
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-10 11:17:51 +01:00
Dimitris Papastamos bcf50ed0e7
Merge pull request #1468 from grandpaul/paulliu-fix-cert-create-ftbfs
tools/cert_create: fix makefile to build build_msg.o by HOSTCC
2018-07-09 13:14:42 +01:00
Ying-Chun Liu (PaulLiu) aba0c7ae8e tools/cert_create: fix makefile to build build_msg.o by HOSTCC
Previously build_msg.o is built by CC. It causes FTBFS when CC
is not equal to HOSTCC.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2018-07-06 23:20:08 +08:00
Dimitris Papastamos b6c07bbb2e
Merge pull request #1463 from grandpaul/paulliu-rpi3-tbb0
rpi3: Add support for Trusted Board Boot
2018-07-06 13:03:57 +01:00
Dimitris Papastamos 0a15eb9cac
Merge pull request #1465 from Andre-ARM/allwinner/h6-support
allwinner: Add H6 SoC support
2018-07-05 15:34:19 +01:00
Ying-Chun Liu (PaulLiu) ebbdbb1fd6 docs: rpi3: add description for Trusted Board Boot
Add paragraph for how to enable Trusted Board Boot for rpi3

Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2018-07-05 14:59:05 +08:00
Ying-Chun Liu (PaulLiu) 6a2c3c7fd8 docs: rpi3: fix the size of BL1
For Trusted Board Boot we enlarge the BL1 size from 64k to 128k.

Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2018-07-05 14:59:02 +08:00
Ying-Chun Liu (PaulLiu) 14368498da rpi3: Add support for Trusted Board Boot
This patch adds support for TBB to rpi3. The ROTPK is generated at build
time and is included into BL1/BL2. The key and content certificates are
read over semihosting.

Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2018-07-05 14:58:51 +08:00
Dimitris Papastamos 5775b9e752
Merge pull request #1461 from antonio-nino-diaz-arm/an/xlat-docs
xlat v2: Update documentation
2018-07-04 15:09:49 +01:00
Dimitris Papastamos d22507a0b6
Merge pull request #1396 from ruchi393/multiple_fip
Extend FIP io driver to support multiple FIP devices
2018-07-04 11:46:51 +01:00
Andre Przywara 0d0380c2fd maintainers: allwinner: add missing link to github page
A proper link to Samuel's github page was missing. Add this to make
the link actually work.

Change-Id: I68b116935bf045df60b2e9309b5fd58a1c694d47
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-07-04 11:38:48 +01:00
Dimitris Papastamos 46b6766495
Merge pull request #1462 from sandrine-bailleux-arm/topics/sb/no-unaligned-access
Fixes related to unaligned accesses
2018-07-04 10:34:54 +01:00
Andre Przywara bed42a5d28 allwinner: Add Allwinner H6 SoC support
The H6 is Allwinner's most recent SoC. It shares most peripherals with the
other ARMv8 Allwinner SoCs (A64/H5), but has a completely different memory
map.

Introduce a separate platform target, which includes a different header
file to cater for the address differences. Also add the new build target
to the documentation.

The new ATF platform name is "sun50i_h6".

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-07-03 17:06:30 +01:00
Sandrine Bailleux 43b8fa8e98 Fix incorrect pointer conversion in SMC_UUID_RET()
Casting a pointer to a struct uuid into a pointer to uint32_t may
result in a pointer that is not correctly aligned, which constitutes
an undefined behaviour. In the case of TF, this also generates a data
abort because alignment fault checking is enabled (through the SCTLR.A
bit).

This patch modifies the SMC_UUID_RET() macro to read the uuid
structure without any pointer aliasing. A helper function then
combines every set of 4 bytes into a 32-bit value suitable to be
returned through the x0-x3 registers.

This fixes a violation of MISRA rule 11.3.

Change-Id: I53ee73bb4cb332f4d8286055ceceb6f347caa080
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-07-03 17:35:08 +02:00
Sandrine Bailleux a9c4dde364 AArch32: Force compiler to align memory accesses
Alignment fault checking is always enabled in TF (by setting the
SCTLR.A bit). Thus, all instructions that load or store one or more
registers have an alignment check that the address being accessed is
aligned to the size of the data element(s) being accessed. If this
check fails it causes an Alignment fault, which is taken as a Data
Abort exception.

The compiler needs to be aware that it must not emit load and store
instructions resulting in unaligned accesses. It already is for
AArch64 builds (see commit fa1d37122c "Add -mstrict-align to the gcc
options"), this patch does the same for AArch32 builds.

Change-Id: Ic885796bc6ed0ff392aae2d49f3a13f517e0169f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-07-03 17:35:08 +02:00
Antonio Nino Diaz 5cff8823a7 xlat v2: Update documentation
Update documentation to reflect the current state of the library.

Change-Id: Ic72f90ee322d2ebd6ea7f4296315700d6bc434e6
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-03 14:56:31 +01:00
Dimitris Papastamos 700b6da722
Merge pull request #1459 from antonio-nino-diaz-arm/an/xlat-refactor
Refactor of the xlat tables v2 library
2018-07-03 14:38:01 +01:00
Dimitris Papastamos c2f27cedb3
Merge pull request #1458 from Andre-ARM/allwinner/fixes
allwinner: various smaller fixes
2018-07-03 14:36:55 +01:00
Dimitris Papastamos 73b1a02fba
Merge pull request #1447 from Amit-Radur/bl32_v1
allwinner: Add BL32 (corresponds to Trusted OS) support
2018-07-03 14:36:46 +01:00
Antonio Nino Diaz 6a086061ad xlat v2: Make get/set attrs functions less verbose
It is useful to have LOG_LEVEL_VERBOSE because it prints the memory map
of each image, but that also means that the change_mem_attributes and
get_mem_attributes functions have verbose prints, and generate a too
long text output that hides other useful information.

As they were mostly there for debug purposes, this patch removes them.

Change-Id: I2986537377d1f78be2b79cc8a6cf230c380bdb55
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-03 13:41:08 +01:00
Antonio Nino Diaz f9d58d1752 xlat v2: Clean debug xlat tables descriptor print
The previous debug output for EL1&0 translation regimes was too verbose,
which makes it hard to read and hides the intent behind the parameters
assigned to each region. This patch simplifies this output and makes the
outputs for EL3 and EL1&0 mostly the same. The difference is that in
EL1&0 it is specified whether the region is exclusively accessible from
EL1 (PRIV) or both EL0 and EL1 (USER).

For example:

    MEM-RW(PRIV)-NOACCESS(USER)-XN(PRIV)-XN(USER)-S
    MEM-RO(PRIV)-NOACCESS(USER)-EXEC(PRIV)-EXEC(USER)-S

After the change, it becomes this:

    MEM-RW-XN-PRIV-S
    MEM-RO-EXEC-PRIV-S

Change-Id: I15f4b99058429d42107fbf89e15f4838a9b559a5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-03 13:41:08 +01:00
Antonio Nino Diaz fd2299e6b0 xlat v2: Split code into separate files
Instead of having one big file with all the code, it's better to have
a few smaller files that are more manageable:

- xlat_tables_core.c: Code related to the core functionality of the
  library (map and unmap regions, initialize xlat context).
- xlat_tables_context.c: Instantiation of the active image context
  as well as APIs to manipulate it.
- xlat_tables_utils.c: Helper code that isn't part of the core
  functionality (change attributes, debug print messages).

Change-Id: I3ea956fc1afd7473c0bb5e7c6aab3b2e5d88c711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-03 13:41:07 +01:00
Dimitris Papastamos 6c5e196be3
Merge pull request #1456 from robertovargas-arm/make_cert
make_cert: return error when invalid options are used
2018-07-02 11:39:22 +01:00
Dimitris Papastamos 08c2f2641e
Merge pull request #1452 from glneo/fixups-for-k3
Couple of fixups for K3 platform
2018-07-02 11:39:06 +01:00
Ruchika Gupta d4d598e92f Extend FIP io driver to support multiple FIP devices
Platform can define MAX_NUM_FIP_DEVICES in platform_def.h
to define the number of FIP io devices.

The FIP driver doesn't support muliple open file.
So only one single file can be open at a time across
multiple FIP devices.

For any FIP device, an image should be loaded
fully before moving on to the next image.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
2018-07-02 09:51:59 +05:30
Andrew F. Davis deed2b8398 ti: k3: common: Enable interrupts before entering standby state
To wake a core from wfi interrupts must be enabled, in some cases they
may not be and so we can lock up here. Unconditionally enable interrupts
before wfi and then restore interrupt state.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-06-29 16:49:21 -05:00
Andrew F. Davis 79a1a84957 ti: k3: common: Add root domain node to platform topology
Actions may need to be taken by the last core when all clusters
have been shutdown. Add a top level root domain node to coordinate
this between clusters.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-06-29 16:49:21 -05:00