Commit Graph

5261 Commits

Author SHA1 Message Date
Franck LENORMAND 77850c96f2 feat(plat/imx8m): do not release JR0 to NS if HAB is using it
In case JR0 is used by the HAB for secure boot, it can be used later
for authenticating kernel or other binaries.

We are checking if the HAB is using the JR by the DID set.

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6e9595012262ffabfc3f3d4841f446f34e48e059
2022-05-06 17:53:15 +02:00
Sandrine Bailleux 2c87fabab5 Merge "fix(st): fix NULL pointer dereference issues" into integration 2022-05-06 16:53:24 +02:00
Olivier Deprez 44b9d577c0 Merge changes from topic "ffa_el3_spmc" into integration
* changes:
  feat(spmc): enable checking of execution ctx count
  feat(spmc): enable parsing of UUID from SP Manifest
  feat(spmc): add partition mailbox structs
  feat(plat/arm): allow BL32 specific defines to be used by SPMC_AT_EL3
  feat(plat/fvp): add EL3 SPMC #defines
  test(plat/fvp/lsp): add example logical partition
  feat(spmc/lsp): add logical partition framework
2022-05-06 15:58:03 +02:00
Manish Pandey fad4a7175b Merge changes from topic "xlnx_zynqmp_misra" into integration
* changes:
  fix(zynqmp): resolve misra R14.4 warnings
  fix(zynqmp): resolve misra R16.3 warnings
  fix(zynqmp): resolve misra R15.7 warnings
  fix(zynqmp): resolve misra R15.6 warnings
  fix(zynqmp): resolve misra 7.2 warnings
  fix(zynqmp): resolve misra R10.3
2022-05-06 15:51:25 +02:00
Manish Pandey e8ad39759b Merge "feat(brbe): add BRBE support for NS world" into integration 2022-05-06 12:46:03 +02:00
Olivier Deprez 78c82cd099 Merge changes from topic "ja/boot_protocol" into integration
* changes:
  fix(sptool): update Optee FF-A manifest
  feat(sptool): delete c version of the sptool
  feat(sptool): use python version of sptool
  feat(sptool): python version of the sptool
  refactor(sptool): use SpSetupActions in sp_mk_generator.py
  feat(sptool): add python SpSetupActions framework
2022-05-06 11:52:55 +02:00
Yann Gautier 2deff904a9 fix(st): fix NULL pointer dereference issues
The get_bl_mem_params_node() function could return NULL. Add asserts to
check the return value is not NULL.
This corrects coverity issues:
	pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "pager_mem_params", which is known to be "NULL".

	paged_mem_params = get_bl_mem_params_node(BL32_EXTRA2_IMAGE_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "paged_mem_params", which is known to be "NULL".

	tos_fw_mem_params = get_bl_mem_params_node(TOS_FW_CONFIG_ID);
>>>     CID 378360:    (NULL_RETURNS)
>>>     Dereferencing "tos_fw_mem_params", which is known to be "NULL".


Do the same for other occurrences of get_bl_mem_params_node() return not
checked, in the functions plat_get_bl_image_load_info() and
bl2_plat_handle_pre_image_load().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I79165b1628fcee3da330f2db4ee5e1dafcb1b21f
2022-05-06 11:00:15 +02:00
Venkatesh Yadav Abbarapu dd1fe7178b fix(zynqmp): resolve misra R14.4 warnings
MISRA Violation: MISRA-C:2012 R.14.4
The controlling expression of an if statement and the controlling
expression of an iteration-statement shall have essentially Boolean type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I8f3f6f956d1d58ca201fb5895f12bcaabf2afd3b
2022-05-06 13:45:27 +05:30
Venkatesh Yadav Abbarapu e7e5d30308 fix(zynqmp): resolve misra R16.3 warnings
MISRA Violation: MISRA-C:2012 R.16.3
- An unconditional break statement shall terminate every switch-clause.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I96a8b627c593ff1293b725d443531e42368923c5
2022-05-06 13:45:22 +05:30
Venkatesh Yadav Abbarapu 16de22d037 fix(zynqmp): resolve misra R15.7 warnings
MISRA Violation: MISRA-C:2012 R.15.7
- All if . . else if constructs shall be terminated
with an else statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: If921ca7c30b2feea6535791aa15f4de7101c3134
2022-05-06 13:45:16 +05:30
Venkatesh Yadav Abbarapu eb0d2b1772 fix(zynqmp): resolve misra R15.6 warnings
MISRA Violation: MISRA-C:2012 R.15.6
- The body of an iteration-statement or a selection-statement shall be
  a compound statement.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I0fc8eeac0e592f00297a1ac42a1ba3df1144733b
2022-05-06 13:45:07 +05:30
Venkatesh Yadav Abbarapu 5bcbd2de12 fix(zynqmp): resolve misra 7.2 warnings
MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ieeff81ed42155c03aebca75b2f33f311279b9ed4
2022-05-06 13:43:34 +05:30
Venkatesh Yadav Abbarapu 2b57da6c91 fix(zynqmp): resolve misra R10.3
MISRA Violation: MISRA-C:2012 R.10.3
- The value of an expression shall not be assigned to an object with a
  narrower essential type or of a different essential type category.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5a60c66788d59e45f41ceb81758b42ef2df9f5f7
2022-05-06 13:43:28 +05:30
Sandrine Bailleux be96158fbb Merge "fix(fvp): fix NULL pointer dereference issue" into integration 2022-05-06 10:08:54 +02:00
johpow01 744ad97445 feat(brbe): add BRBE support for NS world
This patch enables access to the branch record buffer control registers
in non-secure EL2 and EL1 using the new build option ENABLE_BRBE_FOR_NS.
It is disabled for all secure world, and cannot be used with ENABLE_RME.

This option is disabled by default, however, the FVP platform makefile
enables it for FVP builds.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I576a49d446a8a73286ea6417c16bd0b8de71fca0
2022-05-05 19:43:10 +02:00
Madhukar Pappireddy 8d6502183d Merge "fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS)" into integration 2022-05-05 16:12:04 +02:00
Manish V Badarkhe a42b426b85 fix(fvp): fix NULL pointer dereference issue
Fixed below NULL pointer dereference issue reported by coverity scan
by asserting the hw_config_info is not NULL.

*** CID 378361:  Null pointer dereferences  (NULL_RETURNS)
/plat/arm/board/fvp/fvp_bl2_setup.c: 84 in plat_get_next_bl_params()
78
79       /* To retrieve actual size of the HW_CONFIG */
80       param_node = get_bl_mem_params_node(HW_CONFIG_ID);
81       assert(param_node != NULL);
82
83       /* Copy HW config from Secure address to NS address */
>>>     CID 378361:  Null pointer dereferences  (NULL_RETURNS)
>>>     Dereferencing "hw_config_info", which is known to be "NULL".
84       memcpy((void *)hw_config_info->ns_config_addr,
85              (void *)hw_config_info->config_addr,
86              (size_t)param_node->image_info.image_size);

Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: Iaf584044cfc3b2583862bcc1be825966eaffd38e
2022-05-05 11:33:40 +01:00
Marc Bonnici 44639ab73e feat(plat/fvp): add EL3 SPMC #defines
Introduce additional #defines for running with the EL3
SPMC on the FVP.

The increase in xlat tables has been chosen to allow
the test cases to complete successfully and may need
adjusting depending on the desired usecase.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I7f44344ff8b74ae8907d53ebb652ff8def2d2562
2022-05-05 09:47:30 +01:00
Marc Bonnici a34ccd4c20 test(plat/fvp/lsp): add example logical partition
Add an example logical partition to the FVP platform that
simply prints and echos the contents of a direct request
with the appropriate direct response.

Change-Id: Ib2052c9a63a74830e5e83bd8c128c5f9b0d94658
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
2022-05-05 09:46:39 +01:00
Sandrine Bailleux d6fbcc57f9 Merge changes from topic "mp/delete_platforms" into integration
* changes:
  refactor(mt6795): remove mediatek's mt6795 platform
  refactor(sgm775): remove Arm sgm775 platform
2022-05-05 10:30:26 +02:00
J-Alves ca0fdbd8e0 fix(sptool): update Optee FF-A manifest
Change the OPTEE FF-A manifest to comply with changes to the sp pkg [1].
The sptool packs the image at the default offset of 0x4000, if it is not
provided in the arguments.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/14507

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I647950410114f7fc24926696212bb7f8101390ac
2022-05-04 15:38:48 +01:00
Manish Pandey a150486c97 refactor(mt6795): remove mediatek's mt6795 platform
Mediatek's mt6795 platform was deprecated in 2.5 release and as per [1]
a platform which has been marked deprecated should be removed from repo
after 2 release cycle.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/plat/deprecated.html?highlight=deprecated

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic427a3071316a13f34a726a1eb086b679e1671a1
2022-05-04 12:23:29 +02:00
Manish Pandey 15e5414861 refactor(sgm775): remove Arm sgm775 platform
Arm's sgm775 platform was deprecated in 2.5 release and as per [1] a
platform which has been marked deprecated should be removed from repo
after 2 release cycle.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/plat/deprecated.html?highlight=deprecated

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I3cce6f330a1def725188eefd558bd0e4ec559725
2022-05-04 11:15:29 +01:00
Andre Przywara 436cd754f2 feat(allwinner): add SMCCC SOCID support
The Allwinner SID device holds a 16-bit SoC identifier, which we already
use in our code.

Export this number through the generic SMCCC SOCID interface, to allow
an architectural identification of an Allwinner SoC. This enables access
to this information from non-secure world, simplifies generic drivers
(ACPI comes to mind), and gives easy and precise access to the SoC ID
from userland in OSes like Linux.

Change-Id: I91753046b2ae5408ca7bc0b864fcd97d24c8267c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-04 02:30:08 +02:00
André Przywara 3e0a087f30 Merge changes from topic "allwinner-idle" into integration
* changes:
  feat(allwinner): provide CPU idle states to the rich OS
  feat(allwinner): simplify CPU_SUSPEND power state encoding
  feat(allwinner): choose PSCI states to avoid translation
  feat(fdt): add the ability to supply idle state information
  fix(allwinner): improve DTB patching error handling
  refactor(allwinner): patch the DTB after setting up PSCI
  refactor(allwinner): move DTB change code into allwinner/common
2022-05-04 02:10:02 +02:00
Lauren Wehrmeister 1ced6cad52 Merge changes from topic "refactor-hw-config-load" into integration
* changes:
  docs(fvp): update loading addresses of HW_CONFIG
  docs(fconf): update device tree binding for FCONF
  feat(fvp): update HW_CONFIG DT loading mechanism
  refactor(st): update set_config_info function call
  refactor(fvp_r): update set_config_info function call
  refactor(arm): update set_config_info function call
  feat(fconf): add NS load address in configuration DTB nodes
2022-05-03 17:06:49 +02:00
Venkatesh Yadav Abbarapu be73459a94 feat(xilinx): add SPP/EMU platform support for versal
This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibdadec4d00cd33ea32332299e7a00de31dc9d60b
2022-05-02 22:49:24 +02:00
Sieu Mun Tang 52ed157fd6 fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS)
This patch is to add size checking to make sure that
each certificate and encryption/decryption request
are 4-byte align as this driver is expecting. Unaligned
size may indicate invalid/corrupted request hence will
be rejected.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ib6f97849ec470e45679c5adc4fbfa3afd10eda90
2022-04-30 09:24:03 +08:00
Venkatesh Yadav Abbarapu 1277af9bac fix(zynqmp): update the log message to verbose
Changing the log message from notice to verbose, to save some space
and that leads to successfull compilation.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Iee5a808febf211464eb8ba6f0377f79378333f5d
2022-04-28 23:23:50 +02:00
Manish Pandey 06796a08d3 Merge "feat(smmu): configure SMMU Root interface" into integration 2022-04-28 23:20:16 +02:00
Manish Pandey 942b039221 Merge changes I80661161,I82c1fa93,I018ccbb9,Ibc23734d,I97406abe, ... into integration
* changes:
  feat(intel): add SMC support for HWMON voltage and temp sensor
  feat(intel): add SMC support for Get USERCODE
  fix(intel): extend SDM command to return the SDM firmware version
  feat(intel): add SMC for enquiring firmware version
  fix(intel): configuration status based on start request
  fix(intel): bit-wise configuration flag handling
  fix(intel): get config status OK status
  fix(intel): use macro as return value
  fix(intel): fix fpga config write return mechanism
  feat(intel): add SiP service for DCMF status
  feat(intel): add RSU 'Max Retry' SiP SMC services
  feat(intel): enable SMC SoC FPGA bridges enable/disable
  feat(intel): add SMC/PSCI services for DCMF version support
  feat(intel): allow to access all register addresses if DEBUG=1
  fix(intel): modify how configuration type is handled
  feat(intel): support SiP SVC version
  feat(intel): enable firewall for OCRAM in BL31
  feat(intel): create source file for firewall configuration
  fix(intel): refactor NOC header
2022-04-28 18:51:50 +02:00
Olivier Deprez 52a314af25 feat(smmu): configure SMMU Root interface
This change performs a basic configuration of the SMMU root registers
interface on an RME enabled system. This permits enabling GPC checks
for transactions originated from a non-secure or secure device upstream
to an SMMU. It re-uses the boot time GPT base address and configuration
programmed on the PE.
The root register file offset is platform dependent and has to be
supplied on a model command line.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I4f889be6b7afc2afb4d1d147c5c1c3ea68f32e07
2022-04-28 18:50:24 +02:00
Manish Pandey 9b9a21f297 Merge "feat(qemu): add support for measured boot" into integration 2022-04-28 17:18:47 +02:00
Kris Chaplin 52cf9c2cd4 feat(intel): add SMC support for HWMON voltage and temp sensor
Add support to read temperature and voltage using SMC command

Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I806611610043906b720b5096728a5deb5d652b1d
2022-04-28 22:46:56 +08:00
Sieu Mun Tang 93a5b97ec9 feat(intel): add SMC support for Get USERCODE
This patch adds SMC support for enquiring FPGA's User Code.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I82c1fa9390b6f7509b2284d51e199fb8b6a9b1ad
2022-04-28 22:45:26 +08:00
Sieu Mun Tang c026dfe38c fix(intel): extend SDM command to return the SDM firmware version
Updates intel_smc_fw_version function to read SDM
firmware version in major/minor ACDS release number.
Update CONFIG_STATUS Response Data [1] bit0-23.

Return INTEL_SIP_SMC_STATUS_ERROR if unexpected
firmware version is being retrieved.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I018ccbb961786a75dc6eb873b0f232e71341e1d2
2022-04-28 22:44:27 +08:00
Abdul Halim, Muhammad Hadi Asyrafi c34b2a7a1a feat(intel): add SMC for enquiring firmware version
This command allows non-secure world software to enquire the
version of currently running Secure Device Manager (SDM) firmware.

This will be useful in maintaining backward-compatibility as well
as ensuring software cross-compabitility.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibc23734d1135db74423da5e29655f9d32472a3b0
2022-04-28 22:44:21 +08:00
Abdul Halim, Muhammad Hadi Asyrafi e40910e2dc fix(intel): configuration status based on start request
Configuration status command now returns the result based on the last
config start command made to the runtime software. The status type can
be either:
- NO_REQUEST (default)
- RECONFIGURATION
- BITSTREAM_AUTH

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I97406abe09b49b9d9a5b43e62fe09eb23c729bff
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-04-28 22:44:14 +08:00
Sieu Mun Tang 276a43663e fix(intel): bit-wise configuration flag handling
Change configuration type handling to bit-wise flag. This is to align
with Linux's FPGA Manager definitions and promotes better compatibility.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I5aaf91d3fec538fe3f4fe8395d9adb47ec969434
2022-04-28 22:40:58 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 07915a4fd5 fix(intel): get config status OK status
Config status have different OK requirement between MBOX_CONFIG_STATUS
and MBOX_RECONFIG_STATUS request. This patch adds the checking to
differentiate between both command.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I45a4c3de460b031757dbcbd0b3a8055cb0a55aff
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-04-28 22:30:59 +08:00
Abdul Halim, Muhammad Hadi Asyrafi e0fc2d1907 fix(intel): use macro as return value
SMC function should strictly return INTEL_SIP_SMC_STATUS macro. Directly
returning value of variable status might cause confusion in calling
software.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Iea17f4feaa5c917e8b995471f3019dba6ea8dcd3
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-04-28 22:29:23 +08:00
Manish Pandey 357dd7f69e Merge changes from topic "vendor_makefile_extension" into integration
* changes:
  feat(plat/mediatek/build_helpers): introduce mtk makefile
  build(makefile): add extra makefile variable for extension
2022-04-28 16:25:34 +02:00
Abdul Halim, Muhammad Hadi Asyrafi ef51b097bf fix(intel): fix fpga config write return mechanism
This revert commit 279c8015fefcb544eb311b9052f417fc02ab84aa.
The previous change breaks this feature compatibility with Linux driver.
Hence, the fix for the earlier issue is going to be fixed in uboot instead.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I93220243bad65ed53322050d990544c7df4ce66b
2022-04-28 22:25:05 +08:00
Sieu Mun Tang 984e236e0d feat(intel): add SiP service for DCMF status
This patch adds 2 additional RSU SiP services for Intel SoCFPGA
platforms:
- INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS stores current DCMF status in
  BL31
- INTEL_SIP_SMC_RSU_DCMF_STATUS is calling function for non-secure
  software to retrieve stored DCMF status

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ic7a3e6988c71ad4bf66c58a1d669956524dfdf11
2022-04-28 22:21:01 +08:00
Manish Pandey 23bf1adbf9 Merge changes from topic "qemu-measured-boot" into integration
* changes:
  fix(arm): fix fvp and juno build with USE_ROMLIB option
  feat(fdt-wrappers): add function to find or add a sudnode
2022-04-28 16:17:00 +02:00
Chee Hong Ang 4c26957be2 feat(intel): add RSU 'Max Retry' SiP SMC services
Add SiP SMC services to store/retrieve 'Max Retry' counter
for Remote System Update (RSU).

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I17c1f0107ead64e6160954d26407f399003bcbd9
2022-04-28 22:14:34 +08:00
Ruchika Gupta 5e690269d5 feat(qemu): add support for measured boot
Add helper functions to generate event log for qemu
when MEASURED_BOOT=1.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Change-Id: I17a098cb614a3a89fe0fe9577bed6edda8bfd070
2022-04-28 14:55:36 +01:00
Manish V Badarkhe 861250c3b2 fix(arm): fix fvp and juno build with USE_ROMLIB option
Change-Id: I8a9b30a952be594435003f0d684e3faad484e8b8
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-04-28 14:55:25 +01:00
Abdul Halim, Muhammad Hadi Asyrafi b7f3044e87 feat(intel): enable SMC SoC FPGA bridges enable/disable
Enable SoC FPGA bridges enable/disable from non-secure world
through secure monitor calls

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4474abab9731923a61ff0e7eb2c2fa32048001cb
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-04-28 19:50:01 +08:00
Chee Hong Ang 44eb782e15 feat(intel): add SMC/PSCI services for DCMF version support
Support get/store RSU DCMF version:
INTEL_SIP_SMC_RSU_DCMF_VERSION - Get current DCMF version
INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION - Store current DCMF version

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I85ffbc0efc859736899d4812f040fd7be17c8d8d
2022-04-28 19:23:48 +08:00