Commit Graph

8146 Commits

Author SHA1 Message Date
Ravi Patel b05d2792ae xilinx: versal: Do not pass ACPU0 always in set_wakeup_source()
Existing code passes ACPU0 to LibPM as node_id in set_wakeup_source()
call because last suspending core will be ACPU0 in most of the case.

Now it may be possible that user may disable the ACPU0 using hot-plug
and after that it suspends Linux. So in that case ACPU0 will not be
last suspending core.

To overcome above scenario, pass the current running processor ID
while calling set_wakeup_source().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: If15354c2150b5bb1305b5f93ca4e8c7a81d59f0a
2020-12-07 11:07:24 +00:00
Madhukar Pappireddy 7fc19b8ea9 Merge "qemu/qemu_sbsa: increase SHARED_RAM_SIZE" into integration 2020-12-07 03:40:39 +00:00
Madhukar Pappireddy 307f3b90c7 Merge "plat: xilinx: zynqmp: Include GICv2 makefile" into integration 2020-12-05 23:28:25 +00:00
Venkatesh Yadav Abbarapu 84f2e34fee plat: xilinx: zynqmp: Include GICv2 makefile
Update the xilinx platform makefile to include GICv2 makefile
instead of adding the individual files. Updating this change
as per the latest changes done in the commit #1322dc94f7.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I79d8374c47a7f42761d121522b32ac7a5021ede8
2020-12-03 20:30:37 -07:00
Madhukar Pappireddy 79df6ea430 Merge "plat: xilinx: Use fno-jump-tables flag in CPPFLAGS" into integration 2020-12-03 16:58:59 +00:00
Manish Pandey 49462851aa Merge ".editorconfig: set max line length to 100" into integration 2020-12-03 16:14:40 +00:00
Madhukar Pappireddy 5e5c399de0 Merge "plat: marvell: Update SUBVERSION to match Marvell's forked version" into integration 2020-12-03 15:51:50 +00:00
Yann Gautier 279f77b492 .editorconfig: set max line length to 100
Relax the 80 character line length, as done in checkpatch,
since Linux 5.7.

Change-Id: I093a2e6a45336339193173f7ff6a461279cf411d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-12-03 15:39:23 +00:00
Manish Pandey 99ddfc0e46 Merge "Aarch64: Add support for FEAT_PANx extensions" into integration 2020-12-03 13:08:02 +00:00
Olivier Deprez 5e8911a035 Merge "Aarch64: Add support for FEAT_MTE3" into integration 2020-12-03 11:02:26 +00:00
Madhukar Pappireddy 0888694076 Merge "rockchip: Add support for the stack protector" into integration 2020-12-02 18:26:47 +00:00
Alexei Fedorov 0563ab08e8 Aarch64: Add support for FEAT_MTE3
This patch provides the following changes:
- Adds definition for FEAT_MTE3 value in ID_AA64PFR1_EL1 register
- Enables Memory Tagging Extension for FEAT_MTE3.

Change-Id: I735988575466fdc083892ec12c1aee89b5faa472
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-12-02 13:53:03 +00:00
Manish Pandey 91cc872c64 Merge "Add myself and Venkatesh Yadav Abbarapu as code owners for Xilinx platforms" into integration 2020-12-02 12:18:02 +00:00
Lauren Wehrmeister 9dd2896e65 Merge "Add support for Neoverse-N2 CPUs." into integration 2020-12-01 17:06:46 +00:00
Masato Fukumori 54b590ec0d qemu/qemu_sbsa: increase SHARED_RAM_SIZE
Increase SHARED_RAM_SIZE in sbsa_qemu platform from 4KB to 8KB.

sbsa_qemu uses SHARED_RAM for mail box and hold state of each cpus. If
qemu is configured with 512 cpus, region size used by qemu is greater
than 4KB.

Signed-off-by: Masato Fukumori <masato.fukumori@linaro.org>
Change-Id: I639e44e89335249d385cdc339350f509e9bd5e36
2020-12-01 14:01:24 +00:00
Christoph Müllner 826ba363c4 rockchip: Add support for the stack protector
It uses the system timer as "entropy" source in the same
way as QEMU, layerscape and others.

Change-Id: Icda17b78e85255bea96109ca2ee0e091187d62ac
Signed-off-by: Christoph Müllner <christophm30@gmail.com>
2020-12-01 11:54:57 +01:00
Javier Almansa Sobrino 25bbbd2d63 Add support for Neoverse-N2 CPUs.
Enable basic support for Neoverse-N2 CPUs.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I498adc2d9fc61ac6e1af8ece131039410872e8ad
2020-11-30 19:12:56 +00:00
Alexei Fedorov a83103c824 Aarch64: Add support for FEAT_PANx extensions
This patch provides the changes listed below:
- Adds new bit fields definitions for SCTLR_EL1/2 registers
- Corrects the name of SCTLR_EL1/2.[20] bit field from
SCTLR_UWXN_BIT to SCTLR_TSCXT_BIT
- Adds FEAT_PANx bit field definitions and their possible
values for ID_AA64MMFR1_EL1 register.
- Adds setting of SCTLR_EL1.SPAN bit to preserve PSTATE.PAN
on taking an exception to EL1 in spm_sp_setup() function
(services\std_svc\spm_mm\spm_mm_setup.c)

Change-Id: If51f20e7995c649126a7728a4d0867041fdade19
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-11-30 15:24:52 +00:00
Manish Pandey 9acf573621 Merge changes from topic "xilinx-pm-mainline-linux" into integration
* changes:
  zynqmp: pm: update error codes to match Linux and PMU Firmware
  zynqmp: pm: Filter errors related to clock gate permissions
2020-11-30 12:05:11 +00:00
Manish Pandey 441e7f489f Merge "mediatek: mt8183: add timer V20 compensation" into integration 2020-11-27 11:11:39 +00:00
Manish Pandey 38f7e32eac Merge changes I5ad52909,Iea3214a2 into integration
* changes:
  fdts: Add VirtIO network device to Morello FVP
  fdts: Remove "virtio-rng" from Morello FVP
2020-11-24 12:04:42 +00:00
Manish Pandey 9272a8fd7b Merge "plat:qti Mandate SMC implementaion" into integration 2020-11-23 10:29:48 +00:00
Jessica Clarke de7091a1f5 fdts: Add VirtIO network device to Morello FVP
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Change-Id: I5ad5290925f637b94168b507b3dcbdd5e1b82e5a
2020-11-23 09:35:39 +05:30
Jessica Clarke 5c336e0636 fdts: Remove "virtio-rng" from Morello FVP
This is not a standard string that any kernel recognises, nor do any of
the FDTs embedded in kernels specify this, nor does QEMU's virt machine.
Whilst its presence does no harm, it's not a thing code should consult
as a result, and so drop it in order to not cause confusion and risk
incorrect code being written to search for it.

Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Change-Id: Iea3214a23181c54e600cf8f4f12dfc822140c23d
2020-11-23 09:35:21 +05:30
Madhukar Pappireddy 7cf307d209 Merge "plat/nvidia: tegra: Rename SMC API" into integration 2020-11-20 15:36:37 +00:00
Manish Pandey a68626070e Merge "plat/qemu_sbsa: Include libraries for Cortex-A72" into integration 2020-11-20 12:30:10 +00:00
Tanmay Jagdale 5f14ca9937 plat/qemu_sbsa: Include libraries for Cortex-A72
Include libraries needed to emulate Cortex-A72 on
sbsa-ref target of QEMU.

Signed-off-by: Tanmay Jagdale <tanmay.jagdale@linaro.org>
Change-Id: I98cf17b1662c70898977a841af07e07b5cfca8ba
2020-11-20 16:39:49 +05:30
Manish V Badarkhe 840fa94aa3 plat/nvidia: tegra: Rename SMC API
Renamed SMC API from "plat_smccc_feature_available" to
"plat_is_smccc_feature_available" as per the current implementation.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ib0fa400816fba61039c2029a9e127501a6a36811
2020-11-19 20:09:28 +00:00
Saurabh Gorecha 7a0f795ee7 plat:qti Mandate SMC implementaion
renamed smcc api with correct name  plat_is_smccc_feature_available

Change-Id: I277ece02bffc2caa065256576c1a047dfcde1c92
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
2020-11-20 01:09:52 +05:30
Manish Pandey 20c378920e Merge changes from topic "mrvl_bootimage" into integration
* changes:
  docs: marvell: Update build documentation to reflect mrvl_bootimage and mrvl_flash changes
  plat: marvell: armada: Add new target mrvl_bootimage
  plat: marvell: armada: a3k: Add support for building $(DOIMAGETOOL)
2020-11-19 11:18:26 +00:00
Pali Rohár d22db1b050 plat: marvell: Update SUBVERSION to match Marvell's forked version
Marvell's TF-A fork has SUBVERSION set to devel-18.12.2.

The only differences between Marvell's devel-18.12.0 and devel-18.12.2
versions are documentation updates and cherry-picked patches from TF-A
upstream repository.

So upstream TF-A has already all changes from Marvell's TF-A devel-18.12.2
fork and therefore update SUBVERSION to reflect this state.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5ce946a5176a5cbf124acd8037392463d586b072
2020-11-19 10:17:39 +00:00
Pali Rohár f20cb7e54e docs: marvell: Update build documentation to reflect mrvl_bootimage and mrvl_flash changes
Also add example how to build TF-A for A3720 Turris MOX board and also fix
style/indentation issues and information about default values.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I2dc957307b1b627b403a8d960e85f5ac9e15aee5
2020-11-19 10:17:33 +00:00
Pali Rohár 91bc2da73c plat: marvell: armada: Add new target mrvl_bootimage
This new target builds boot-image.bin binary as described in documentation.
This image does not contain WTMI image and therefore WTP repository is not
required for building.

Having ability to build just this boot-image.bin binary without full
flash-image.bin is useful for A3720 Turris MOX board which does not use
Marvell's WTP and a3700_utils.

To reduce duplicity between a8k and a3k code, define this new target and
also definitions for $(BUILD_PLAT)/$(BOOT_IMAGE) in common include file
marvell_common.mk.

For this purpose it is needed to include plat/marvell/marvell.mk file from
a3700_common.mk unconditionally (and not only when WTP is defined). Now
when common file plat/marvell/marvell.mk does not contain definition for
building $(DOIMAGETOOL), it is possible to move its inclusion at the top of
the a3700_common.mk file.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ic58303b37a1601be9a06ff83b7a279cb7cfc8280
2020-11-19 10:17:28 +00:00
Pali Rohár c6a7ab7787 plat: marvell: armada: a3k: Add support for building $(DOIMAGETOOL)
Current binary wtptp/linux/tbb_linux which is specified in $(DOIMAGETOOL)
variable points to external pre-compiled Marvell x86_64 ELF linux binary
from A3700-utils-marvell WTP repository.

It means that currently it is not possible to compile TF-A for A3720 on
other host platform then linux x86_64.

Part of the A3700-utils-marvell WTP repository is also source code of
$(DOIMAGETOOL) TBB_Linux tool.

This change adds support for building $(DOIMAGETOOL) also for a3k platform.

After running $(MAKE) at appropriate subdirectory of A3700-utils-marvell
WTP repository, compiled TBB_linux tool will appear in WTP subdirectory
wtptp/src/TBB_Linux/release/. So update also $(DOIMAGETOOL) variable to
point to the correct location where TBB_linux was built.

To build TBB_linux it is required to compile external Crypto++ library
which is available at: https://github.com/weidai11/cryptopp.git

User needs to set CRYPTOPP_PATH option to specify path to that library.

After this change it is now possible to build whole firmware for A3720
platform without requirement to use pre-compiled/proprietary x86_64
executable binaries from Marvell.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6f26bd4356778a2f8f730a223067a2e550e6c8e0
2020-11-19 10:17:21 +00:00
Madhukar Pappireddy 7b12a8d673 Merge "Revert workaround for A77 erratum 1800714" into integration 2020-11-19 01:30:49 +00:00
Madhukar Pappireddy b9ad2bb83e Merge "Revert workaround for A76 erratum 1800710" into integration 2020-11-19 01:30:42 +00:00
Madhukar Pappireddy 7096a45ae0 Merge "Fix typos and misspellings" into integration 2020-11-19 00:31:29 +00:00
Madhukar Pappireddy 730495c7c5 Merge "TSP: Fix GCC 11.0.0 compilation error." into integration 2020-11-18 18:14:14 +00:00
Manish Pandey e2c509a39c Merge "Makefile: Update the minor version to indicate 2.4 release" into integration 2020-11-17 16:43:51 +00:00
Manish V Badarkhe 5edddf3a0f Makefile: Update the minor version to indicate 2.4 release
Updated the minor version to '4' to indicate 2.4 release

Change-Id: Ib142fa15baeb43025fae371c7649199b8121c18f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-11-17 16:06:49 +00:00
Joanna Farley 5ca9754a63 Merge "docs: Update changelog for v2.4 release" into integration 2020-11-17 14:32:01 +00:00
Chris Kay 0bd1a2e94d docs: Update changelog for v2.4 release
Change-Id: I67c9db2fc6d4b83fec2d001745b9305102d4a2ae
Signed-off-by: Chris Kay <chris.kay@arm.com>
2020-11-17 11:49:03 +00:00
Alexei Fedorov caff3c8724 TSP: Fix GCC 11.0.0 compilation error.
This patch fixes the following compilation error
reported by aarch64-none-elf-gcc 11.0.0:

bl32/tsp/tsp_main.c: In function 'tsp_smc_handler':
bl32/tsp/tsp_main.c:393:9: error: 'tsp_get_magic'
 accessing 32 bytes in a region of size 16
 [-Werror=stringop-overflow=]
  393 |         tsp_get_magic(service_args);
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~
bl32/tsp/tsp_main.c:393:9: note: referencing argument 1
 of type 'uint64_t *' {aka 'long long unsigned int *'}
In file included from bl32/tsp/tsp_main.c:19:
bl32/tsp/tsp_private.h:64:6: note: in a call to function 'tsp_get_magic'
   64 | void tsp_get_magic(uint64_t args[4]);
      |      ^~~~~~~~~~~~~

by changing declaration of tsp_get_magic function from
void tsp_get_magic(uint64_t args[4]);
to
uint128_t tsp_get_magic(void);
which returns arguments directly in x0 and x1 registers.

In bl32\tsp\tsp_main.c the current tsp_smc_handler()
implementation calls tsp_get_magic(service_args);
, where service_args array is declared as
uint64_t service_args[2];
and tsp_get_magic() in bl32\tsp\aarch64\tsp_request.S
copies only 2 registers in output buffer:
	/* Store returned arguments to the array */
	stp	x0, x1, [x4, #0]

Change-Id: Ib34759fc5d7bb803e6c734540d91ea278270b330
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-11-13 18:47:58 +00:00
johpow01 9bbc03a6e0 Revert workaround for A77 erratum 1800714
This errata workaround did not work as intended and was revised in
subsequent SDEN releases so we are reverting this change.

This is the patch being reverted:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4686

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I8554c75d7217331c7effd781b5f7f49b781bbebe
2020-11-12 14:15:41 -06:00
johpow01 95ed9a9e0d Revert workaround for A76 erratum 1800710
This errata workaround did not work as intended and was revised in
subsequent SDEN releases so we are reverting this change.

This is the patch being reverted:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4684

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I560749a5b55e22fbe49d3f428a8b9545d6bdaaf0
2020-11-12 13:55:43 -06:00
David Horstmann 5d9101b39c Fix typos and misspellings
Fix a number of typos and misspellings in TF-A
documentation and comments.

Signed-off-by: David Horstmann <david.horstmann@arm.com>
Change-Id: I34c5a28c3af15f28d1ccada4d9866aee6af136ee
2020-11-12 15:21:11 +00:00
Michal Simek 942d0c7c1c Add myself and Venkatesh Yadav Abbarapu as code owners for Xilinx platforms
Jolly left the company and Siva (DP) has moved to different possition
that's why it is necessary to change code ownership.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I546d9a0f7a2abd0c7a65be807725bc609160f3b2
2020-11-12 11:25:15 +01:00
Venkatesh Yadav Abbarapu e9930d42c7 plat: xilinx: Use fno-jump-tables flag in CPPFLAGS
From GCC-9 implementation of switch case was generated through jump tables,
because of which we are seeing 1MB increase in rodata section. To reduce
the size we are recommending to use fno-jump-tables.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I069733610809b8299fbf641f0ae35b359a8afd69
2020-11-12 10:40:16 +01:00
Davorin Mista a8b10c6490 zynqmp: pm: update error codes to match Linux and PMU Firmware
All EEMI error codes start with value 2000.

Note: Legacy error codes ARGS (=1) and NOTSUPPORTED (=4) returned by
current ATF code have been left in place.

Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I939afa85957cac88025d82a80f9f6dd49be993b6
2020-11-12 10:27:14 +01:00
Mirela Simonovic c23cf05303 zynqmp: pm: Filter errors related to clock gate permissions
Linux clock framework cannot properly deal with these errors. When the
error is related to the lack of permissions to control the clock we
filter the error and report the success to linux. Before recent changes
in clock framework across the stack, this was done in the PMU-FW as a
workaround. Since the PMU-FW now handles clocks and the permissions to
control them using general principles rather than workarounds, it can
no longer distinguish such exceptions and it has to return no-access
error.

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
Acked-by: Will Wong <WILLW@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I1491a80e472f44e322a542b29a20eb1cb3319802
2020-11-12 10:26:57 +01:00