Commit Graph

1635 Commits

Author SHA1 Message Date
Yann Gautier e58a53fb72 stm32mp1: save boot information in backup registers
This will be used by BL33 to get boot device and instance.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:14:22 +02:00
Yann Gautier 6a339a4952 stm32mp1: Add GPIO support
The management of pinctrl nodes of device tree is also added.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2018-07-24 17:14:08 +02:00
Yann Gautier 7839a05090 stm32mp1: Add clock and reset support
The clock driver is under dual license, BSD and GPLv2.
The clock driver uses device tree, so a minimal support for this is added.
The required files for driver and DTS files are in include/dt-bindings/.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:13:36 +02:00
Yann Gautier 4353bb20cc Introduce STMicroelectronics STM32MP1 platform
STM32MP1 is a microprocessor designed by STMicroelectronics,
based on a dual Arm Cortex-A7.
It is an Armv7-A platform, using dedicated code from TF-A.

STM32MP1 uses BL2 compiled with BL2_AT_EL3.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Pascal Paillet <p.paillet@st.com>
2018-07-24 17:11:43 +02:00
danh-arm cffb003428
Merge pull request #1488 from b49020/integration
synquacer: Enable optional OP-TEE support
2018-07-24 14:37:23 +01:00
danh-arm 790e6c5b96
Merge pull request #1485 from jeenu-arm/ras
Double-fault and fatal error handling support
2018-07-24 14:36:43 +01:00
Sumit Garg 6cb2a39703 synquacer: Enable optional OP-TEE support
OP-TEE loading is optional on Developerbox controlled via SCP
firmware. To check if OP-TEE is loaded or not, we use DRAM1 region
info passed by SCP firmware.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
2018-07-24 17:12:22 +05:30
Haojian Zhuang 99eb5ae86d hikey: include TBB in BL1
BL1 is used in recovery mode on HiKey. The TBB implementation
on HiKey is in BL2. It means that user need to build ATF BL2
with TBB and ATF BL1 with non-TBB. It's inconvenient.

So include TBB in BL1, too.

Signed-off-by: Teddy Reed <teddy@prosauce.org>
Signed-off-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-07-22 09:35:44 +08:00
danh-arm ba0248b52d
Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6
Marvell support for Armada 8K SoC family
2018-07-19 17:11:32 +01:00
danh-arm 992a353613
Merge pull request #1483 from antonio-nino-diaz-arm/an/rpi3-psci
rpi3: PSCI and Linux boot improvements
2018-07-19 15:37:54 +01:00
danh-arm e4686fd860
Merge pull request #1449 from theopolis/hikey-tbb
hikey: Add experimental TBB support
2018-07-19 11:49:56 +01:00
danh-arm 8ff0dfa79c
Merge pull request #1482 from sandrine-bailleux-arm/sb/fix-hcptr
Misc arch.h fixes and cleanup
2018-07-19 11:36:58 +01:00
Jeenu Viswambharan eaeaa4d048 RAS: Introduce handler for EL3 EAs
External Aborts while executing in EL3 is fatal in nature. This patch
allows for the platform to define a handler for External Aborts received
while executing in EL3. A default implementation is added which falls
back to platform unhandled exception.

Change-Id: I466f2c8113a33870f2c7d2d8f2bf20437d9fd354
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2018-07-19 10:13:18 +01:00
Jeenu Viswambharan d5a23af50f RAS: Introduce handler for Double Faults
Double fault is when the PE receives another error whilst one is being
handled. To detect double fault condition, a per-CPU flag is introduced
to track the status of error handling. The flag is checked/modified
while temporarily masking external aborts on the PE.

This patch routes double faults to a separate platform-defined handler.

Change-Id: I70e9b7ba4c817273c55a0af978d9755ff32cc702
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2018-07-19 10:13:18 +01:00
Jeenu Viswambharan b56dc2a98c RAS: Introduce handler for Uncontainable errors
Uncontainable errors are the most severe form of errors, which typically
mean that the system state can't be trusted any more. This further means
that normal error recovery process can't be followed, and an orderly
shutdown of the system is often desirable.

This patch allows for the platform to define a handler for Uncontainable
errors received. Due to the nature of Uncontainable error, the handler
is expected to initiate an orderly shutdown of the system, and therefore
is not expected to return. A default implementation is added which falls
back to platform unhandled exception.

Also fix ras_arch.h header guards.

Change-Id: I072e336a391a0b382e77e627eb9e40729d488b55
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2018-07-19 10:13:17 +01:00
Konstantin Porotchkin 34ec7ec310 plat: marvell: Add board support for A8K platform
Add support for A8K platform boards

Change-Id: Ife025d930d2ab6cabbc13bbe19b2273cc1c938c8
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
2018-07-18 18:48:30 +03:00
Konstantin Porotchkin 486f868bab plat: marvell: Add common ARMADA platform components
Add common Marvell ARMADA platform components.
This patch also includes common components for Marvell
ARMADA 8K platforms.

Change-Id: I42192fdc6525a42e46b3ac2ad63c83db9bcbfeaf
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
2018-07-18 18:48:30 +03:00
Soby Mathew 2e4eea1b11
Merge pull request #1471 from Anson-Huang/master
Add i.MX8QX/i.MX8QM power management feature
2018-07-18 13:35:29 +01:00
Antonio Nino Diaz 30399885f5 Fix types of arch.h definitions
Define the values as unsigned int or unsigned long long based on the
actual size of the register. This prevents subtle issues caused by
having a type that is too small. For example:

    #define OPTION_ENABLE 0x3
    #define OPTION_SHIFT  32

    uint64_t mask = OPTION_ENABLE << OPTION_SHIFT;

Because OPTION_ENABLE fits in an int, the value is considered an int.
This means that, after shifting it 32 places to the left, the final
result is 0. The correct way to define the values is:

    #define OPTION_ENABLE ULL(0x3)
    #define OPTION_SHIFT  U(32)

In this case, the compiler is forced to use a 64 bit value from the
start, so shifting it 32 places to the left results in the expected
value.

Change-Id: Ieaf2ffc2d8caa48c622db011f2aef549e713e019
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-18 11:09:54 +01:00
Soby Mathew 344e40379c
Merge pull request #1480 from sandrine-bailleux-arm/topics/sb/debug-macros
Always compile debug macros
2018-07-18 10:48:03 +01:00
Antonio Nino Diaz aa49bde8a3 rpi3: Move NS-DRAM out of the protected region
The Non-secure DRAM region shouldn't be protected in the range specified
in the Linux command line with memmap.

This change also increases the size of the Secure DRAM region.

Change-Id: I306e9e443a84b834c99739f54a534a3ca3be2424
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-16 15:56:42 +01:00
Antonio Nino Diaz 76c944a48d rpi3: Add support for direct Linux kernel boot
This option allows the Trusted Firmware to pass the correct arguments to
a 32 or 64-bit Linux kernel without the need of an intermediate loader
such as U-Boot.

Change-Id: I2b22e8933fad6a614588ace559f893e97329801f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-16 15:56:42 +01:00
Antonio Nino Diaz 6d924ca91b rpi3: Don't wire mailbox 3 to FIQ line
FIQs shouldn't be used at all as long as the interrupt routing doesn't
support them properly.

Change-Id: Ib1db7b523a62de2035d41197bc791048337cf791
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-16 15:56:42 +01:00
Antonio Nino Diaz 6297d6feb0 rpi3: Fix warm entrypoint setup for PSCI_CPU_ON
Remove unused variable and set the secure entrypoint correctly.

Change-Id: I7447ea62771092de6be35704077ae28c519d6993
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-16 15:56:42 +01:00
Antonio Nino Diaz 1aad932ce6 rpi3: Add support for the stack protector
It uses the hardware RNG in a similar way as Juno (it gets 128 bits of
entropy and does xor on them).

It is disabled by default.

Change-Id: I8b3adb61f5a5623716e0e8b6799404c68dd94c60
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-16 15:56:42 +01:00
Antonio Nino Diaz 4ad2696d88 rpi3: Introduce hardware RNG driver
Note that this is a non-secure RNG. This is only useful for educational
purposes.

Change-Id: If359c8d0f755ef8e416986de7fbca34679a523e1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-16 15:56:42 +01:00
Antonio Nino Diaz 98967fb14a rpi3: Remove broken support of RESET_TO_BL31
There is no way to boot BL31 at the addresses specified in the platform
memory map unless an extra loader is used at address 0x00000000. It is
better to remove it to prevent confusion. Having it enabled was a bug.

Change-Id: I3229fbc080f5996cff47efce8e799bae94e0d5cb
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-16 15:56:42 +01:00
Soby Mathew f9d2808a1c
Merge pull request #1478 from antonio-nino-diaz-arm/an/rpi3-improvements
rpi3: A few improvements
2018-07-16 14:22:10 +01:00
Antonio Nino Diaz 4f2f66a280 rpi3: Detect board revision
Implement VideoCore mailbox interface driver and use it to get the board
revision identifier.

For now it is only used to print the model for debug purposes.

This wiki contains the documentation of the mailbox interface:

https://github.com/raspberrypi/firmware/wiki

Change-Id: I11943b99b52cc1409f4a195ebe58eb44ae5b1d6c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-14 02:15:55 +01:00
Antonio Nino Diaz 42ba8f747b rpi3: Implement PSCI_SYSTEM_OFF
This implementation doesn't actually turn the system off, it simply
reboots it and prevents it from booting while keeping it in a low power
mode.

Change-Id: I7f72c9f43f25ba0341db052bc2be4774c88a7ea3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-14 02:15:51 +01:00
Antonio Nino Diaz 64fe343c03 rpi3: Concatenate BL1 and FIP automatically
Add a new default makefile target to concatenate BL1 and the FIP and
generate armstub8.bin. This way it isn't needed to do it manually.

Documentation updated to reflect the changes.

Change-Id: Id5b5b1b7b9f87767db63fd01180ddfea855a7207
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-13 15:27:01 +01:00
Dimitris Papastamos 9ceda8b907
Merge pull request #1477 from dp-arm/dp/css-ap-core
CSS: Add support for SCMI AP core config protocol
2018-07-13 15:23:29 +01:00
Sandrine Bailleux c426fd709f Tegra: Fix up INFO() message
With commit cf24229e6e ("Run compiler on debug macros for type
checking"), the compiler will now always evaluate INFO() macro
calls, no matter the LOG_LEVEL value. Therefore, any variable
referenced in the macro has to be be defined.

Address this issue by removing the local variable and using the
expression it was assigned directly in the INFO() call.

Change-Id: Iedc23b3538c1e162372e85390881e50718e50bf3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-07-13 11:31:17 +02:00
Dimitris Papastamos 6e779ace0a
Merge pull request #1476 from grandpaul/paulliu-rpi3-modify-size
rpi3: enlarge SEC_DRAM0_SIZE for optee_test to pass
2018-07-12 11:53:37 +01:00
Dimitris Papastamos 1be2f666dd
Merge pull request #1464 from antonio-nino-diaz-arm/an/rpi3-ints
rpi3: Implement simple interrupt routing
2018-07-12 11:52:53 +01:00
Dimitris Papastamos 2a246d2e32 CSS: Use SCMI AP core protocol to set the warm boot entrypoint
Change-Id: Iaebbeac1a1d6fbd531e5694b95ed068b7a193e62
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-07-12 10:09:12 +01:00
Dimitris Papastamos bfe3c449a7 Add support for SCMI AP core configuration protocol v1.0
Change-Id: If07000b6b19011e960336a305a784dd643301b97
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-07-12 10:09:12 +01:00
Anson Huang 8ef9f860c0 imx: imx8qm: add domain suspend/resume support
Add domain suspend/resume support, Linux kernel
can "echo mem > /sys/power/state" to put system
into suspend mode, all CPUs and cluster will be
powered off and can be waked up if irq pending
in GIC, tested on i.MX8QM MEK board.

Since the power state has been implemented, switch
to use standard power state for CCI operations
instead of private cpu use count in i.MX8QM.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 16:16:55 +08:00
Anson Huang 0f53bca05c imx: imx8qm: add domain off support
Add domain off support for Linux kernel's cpu
hot-plug feature, when there are cpu off request
from Linux kernel, TF-A will send command to
system controller to do CPU power gate accordingly,
tested on i.MX8QM MEK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 16:15:56 +08:00
Anson Huang d31ffcf0f7 imx: imx8qm: add system reset support
Add system reset support for i.MX8QM,
when Linux kernel issues "reboot" command,
TF-A will send command to inform system
controller to reset whole board according
to board design, tested on i.MX8QM MEK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 16:15:51 +08:00
Anson Huang db81c59252 imx: imx8qm: add system off support
Add system power off support for i.MX8QM,
when Linux kernel issues "poweroff" command,
TF-A will send command to inform system
controller to power off whole board according
to board design, tested on i.MX8QM MEK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 16:15:39 +08:00
Anson Huang 762688bff2 imx: imx8qx: add domain suspend/resume support
Add domain suspend/resume support, Linux kernel
can "echo mem > /sys/power/state" to put system
into suspend mode, all CPUs and cluster will be
powered off and can be waked up if irq pending
in GIC, tested on i.MX8QX MEK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 16:15:32 +08:00
Ying-Chun Liu (PaulLiu) 8ebf806fc5 rpi3: enlarge SEC_DRAM0_SIZE for optee_test to pass
Running optee_test failed because SEC_DRAM0_SIZE is too small. Previous
is 2 MB. We enlarge it to 11 MB for passing the test. Also we reduce
the NS_DRAM0_SIZE from 13MB to 4MB so that the whole section is still
fit in 16MB.

This commit also modified the document to reflect the changes we've
made in code.

Tested-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
2018-07-12 13:51:35 +08:00
Anson Huang 3260f5c7c8 imx: imx8qx: add domain off support
Add domain off support for Linux kernel's cpu
hot-plug feature, when there are cpu off request
from Linux kernel, TF-A will send command to
system controller to do CPU power gate accordingly.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 11:12:39 +08:00
Anson Huang 351e3731ca imx: imx8qx: add system reset support
Add system reset support for i.MX8QX,
when Linux kernel issues "reboot" command,
TF-A will send command to inform system
controller to reset whole board according
to board design, tested on i.MX8QX MEK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 11:05:21 +08:00
Anson Huang 8972694e93 imx: imx8qx: add system off support
Add system power off support for i.MX8QX,
when Linux kernel issues "poweroff" command,
TF-A will send command to inform system
controller to power off whole board according
to board design, tested on i.MX8QX MEK board.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-07-12 11:00:41 +08:00
Antonio Nino Diaz d35de55e55 rpi3: Implement simple interrupt routing
Implement minimal interrupt routing functions. All interrupts are
treated as non-secure interrupts to be handled by the non-secure world.

Add note to the documentation about disabling FIQs qhen using OP-TEE
with Linux.

Change-Id: I937096542d973925e43ae946c5d0b306d0d95a94
Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-11 21:00:32 +01:00
Sandrine Bailleux ed8c3743ef ARM platforms: Remove some duplicate declarations
The plat_arm_mmap variable is already declared in plat_arm.h, which is
included from plat/arm/common/arm_common.c.

Similarly, plat_arm.h declares the 'plat_arm_psci_pm_ops' variable, which
does not need to be declared again in plat/arm/common/arm_pm.c.

The duplication was not compliant with MISRA rule 8.5.

Change-Id: Icc42547cc025023226b1078a7ec4f06d093364b7
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-07-11 17:33:29 +02:00
Sandrine Bailleux 6c77e74915 Fix some violations to MISRA rule 8.3
Wherever we use 'struct foo' and 'foo_t' interchangeably in a
function's declaration and definition, use 'struct foo' consistently
for both, as per the TF-A coding guidelines [1].

[1] https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firmware-Coding-Guidelines#avoid-anonymous-typedefs-of-structsenums-in-header-files

Change-Id: I7998eb24a26746e87e9b6425529926406745b721
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-07-11 17:33:29 +02:00
Joel Hutton c84b6cb1aa Add initial CPU support for Cortex-Deimos
Change-Id: I2c4b06423fcd96af9351b88a5e2818059f981f1b
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-07-11 13:26:48 +01:00