Commit Graph

5069 Commits

Author SHA1 Message Date
Venkatesh Yadav Abbarapu ea04b3fe18 fix(versal): fix the incorrect log message
When the atf-handoff-params are updated we are returning
FSBL_HANDOFF_SUCCESS, but the return condition is wrongly
updated and added a error log which is incorrect.
Fixing the incorrect log message.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I44ebbb861831b86afcb87f09ddb2e23614393c28
2022-03-06 21:09:23 -07:00
Madhukar Pappireddy cf86fa1bfa Merge "feat(zynqmp): increase the max xlat tables when debug build is enabled" into integration 2022-03-02 19:28:13 +01:00
Venkatesh Yadav Abbarapu 4c4b9615b1 feat(zynqmp): increase the max xlat tables when debug build is enabled
Update the MAX_XLAT_TABLES as the memory map has been
added for the dtb to accomodate in DDR address.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46225673f40f123cdab38efefb038604da119b58
2022-03-02 02:25:14 -07:00
Venkatesh Yadav Abbarapu 18e2a79f8a feat(versal): remove the time stamp configuration
Remove the time stamp and system counter configuration, as
this configuration is already done by the first stage bootloader.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I41554dc2e14d97954bff299df9740a5efa30fad9
2022-03-01 21:20:21 -07:00
Manish Pandey c73cb40033 Merge "feat(plat/zynqmp): fix section `coherent_ram' will not fit in region `RAM'" into integration 2022-03-01 14:58:41 +01:00
Madhukar Pappireddy a78c6c9666 Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration 2022-02-28 20:36:30 +01:00
Manish Pandey a8e06f040b Merge changes from topic "st-fix-enum" into integration
* changes:
  fix(stm32mp1): fix enum prints
  fix(st-clock): print enums as unsigned
2022-02-28 18:30:38 +01:00
Yann Gautier ceab2fc344 fix(stm32mp1): fix enum prints
With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. But the current version of
compiler used in CI states that this parameter is signed. Just cast the
value then.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic0655e5ba9c44fe6abcd9958d7a9972f5de3b7ef
2022-02-28 17:20:06 +01:00
Madhukar Pappireddy f83de3bba3 Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration
* changes:
  fix(intel): null pointer handling for resp_len
  fix(intel): define macros to handle buffer entries
  fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
  fix(intel): always set doorbell to SDM after sending command
  fix(intel): fix bit masking issue in intel_secure_reg_update
  fix(intel): fix ddr address range checker
  build(changelog): add new scope for Intel platform
2022-02-28 17:18:39 +01:00
Madhukar Pappireddy b5d2b4d532 Merge "fix(intel): enable HPS QSPI access by default" into integration 2022-02-28 16:37:06 +01:00
Sandrine Bailleux 92537e170d Merge "fix(measured-boot): add RMM entry to event_log_metadata" into integration 2022-02-28 10:39:59 +01:00
Madhukar Pappireddy 2c23b9c1b3 Merge "fix(a3k): fix comment about BootROM address range" into integration 2022-02-23 16:27:00 +01:00
Madhukar Pappireddy 80b895ca71 Merge "feat(board/rdedmunds): add support for rdedmunds variant" into integration 2022-02-23 16:25:44 +01:00
Madhukar Pappireddy 176717989f Merge changes from topic "bug-fix" into integration
* changes:
  fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
  build(changelog): add new scope for nxp crypto
  fix(lx2): drop erratum A-009810
2022-02-23 15:34:57 +01:00
Tamas Ban f4e3e1e85f fix(measured-boot): add RMM entry to event_log_metadata
Platforms which support Realm world cannot boot up
properly if measured boot is enabled at build time.
An assertions occurs due to the missing RMM entry
in the event_log_metadata array.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I172f10a440797f7c9e1bc79dc72242b40c2521ea
2022-02-23 12:41:19 +01:00
Sieu Mun Tang a250c04b0c fix(intel): null pointer handling for resp_len
Previous changes from commit #6a659448 updates resp_len from an integer
type to unsigned integer pointer type. This patch adds proper handling
in case resp_len is a null pointer. Resp_len with value 0 are also
changed to NULL to match the type change.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I75b3e3bfbb188d8e7b329ba3b948c23e31dec490
2022-02-23 16:30:30 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 7db1895f0b fix(intel): define macros to handle buffer entries
This patch defines a macro to handle Secure Device Manager's (SDM)
pointer to command & response buffer entries and convert them to the
correct physical address.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4cf9f1d90e0d5ae4e1a2ce84165864b48c2862e7
2022-02-23 16:30:25 +08:00
Sieu Mun Tang 108514ff71 fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return
mailbox status and the argument's length back to the caller

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Change-Id: I50d2ae74845794cab7bf0858e742b5a70e0ea868
2022-02-23 16:29:12 +08:00
Siew Chin Lim e93551bb3b fix(intel): always set doorbell to SDM after sending command
This patch fixes the mailbox stall issue when sending mailbox command
that is larger than mailbox command FIFO size.

Large mailbox command will be sent to SDM in multiple chunks. HPS will
set doorbell to SDM when command FIFO full (is_doorbell_triggered will
be set to 1) to notify SDM to read the command data from FIFO, so that
HPS can continue to send the next chunk of command data.

However, HPS will not set the doorbell to SDM at the end if the doorbell
have been set earlier due to FIFO full. This will cause SDM mailbox
service stall because it is still waiting for last chunk of command data.

This patch fixes the code to always set the doorbell to SDM at the end
to get rid of stall issue.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: Idbe62410a00d92a30c7aeaa26d53d79a910cac0a
2022-02-23 16:29:03 +08:00
Siew Chin Lim c9c070994c fix(intel): fix bit masking issue in intel_secure_reg_update
intel_secure_reg_update function should apply mask to the value before
write into register.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I84bbd06e24b8666528b53030e8359743d438eb5b
2022-02-23 16:28:59 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 12d71ac662 fix(intel): fix ddr address range checker
This patch fix address range checker to make sure that it does not
errors out on NULL address with size 0. Non-secure software will send
this NULL address if the SMC call doesn't need to pass any address buffer.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I7e492c562a311ba989570c4ed465f845333ec865
2022-02-23 16:28:56 +08:00
Madhukar Pappireddy 1776d4091b Merge changes from topic "paulliu-imx8m-eventlog" into integration
* changes:
  docs(imx8m): update for measured boot for imx8mm
  feat(plat/imx/imx8m/imx8mm): add support for measured boot
2022-02-21 16:41:38 +01:00
Siew Chin Lim 35fe7f400a fix(intel): assert if bl_mem_params is NULL pointer
This patch fixes the code issue detected by Klocwork scan. Pointer
'bl_mem_params' returned from call to function 'get_bl_mem_params_node'
may be NULL and the NULL pointer may be caused the system crash. Update
the code to assert if unexpected NULL pointer is returned.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I00f3132a6104618cadce26aa303c0b46b5921d5b
2022-02-21 15:35:47 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 000267be22 fix(intel): enable HPS QSPI access by default
Request ownership and direct access to QSPI by default in BL2.
Previously, this is only done on QSPI boot mode.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ie222bbf9d719f2f70f89d4739c285efe6df4c955
2022-02-21 15:18:54 +08:00
Jiafei Pan e36b0e4910 fix(lx2): drop erratum A-009810
The erratum A-009810 should not be applied to LX2, the impaction is
that it can cause system reboot when linux tried to power down, so remove
it.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I5e24229cf8512eff28b315ebcdf18de555c40c74
2022-02-18 11:55:27 +08:00
Madhukar Pappireddy 1b33b58b66 Merge changes from topic "ls1046a" into integration
* changes:
  docs(layerscape): add ls1046a soc and board support
  feat(ls1046aqds): add board ls1046aqds support
  feat(ls1046afrwy): add ls1046afrwy board support
  feat(ls1046ardb): add ls1046ardb board support
  feat(ls1046a): add new SoC platform ls1046a
  fix(nxp-tools): fix tool location path for byte_swape
  fix(nxp-qspi): fix include path for QSPI driver
  build(changelog): add new scopes for NXP layerscape platforms
2022-02-17 19:15:55 +01:00
Olivier Deprez 23ac80cc8b Merge "fix(fvp): extend memory map to include all DRAM memory regions" into integration 2022-02-17 11:10:40 +01:00
Madhukar Pappireddy 8d9c1b3ca5 Merge changes from topic "st-format-signedness" into integration
* changes:
  feat(stm32mp1): enable format-signedness warning
  fix(stm32mp1): correct types in messages
  fix(st-pmic): correct verbose message
  fix(st-sdmmc2): correct cmd_idx type in messages
  fix(st-fmc): fix type in message
  fix(mtd): correct types in messages
  fix(usb): correct type in message
  fix(tzc400): correct message with filter
  fix(psci): correct parent_node type in messages
  fix(libc): correct some messages
  fix(fconf): correct image_id type in messages
  fix(bl2): correct messages with image_id
2022-02-17 00:35:52 +01:00
Federico Recanati e80354212f fix(fvp): extend memory map to include all DRAM memory regions
Currently only the lowest 2 DRAM region were configured in the
TrustZone Controller, but the platform supports 6 regions spanning the
whole address space.
Configuring all of them to allow tests to access memory also in those
higher memory regions.

FVP memory map:
https://developer.arm.com/documentation/100964/1116/Base-Platform/Base---memory/Base-Platform-memory-map
Note that last row is wrong, describing a non-existing 56bit address,
all region labels should be shifted upward.
Issue has been reported and next release will be correct.

Change-Id: I695fe8e24aff67d75e74635ba32a133342289eb4
Signed-off-by: Federico Recanati <federico.recanati@arm.com>
2022-02-16 20:22:16 +01:00
Tony K Nadackal ef515f0d34 feat(board/rdedmunds): add support for rdedmunds variant
Add initial support for RD-Edmunds platform. This platform is considered
as a variant of RD-N2 platform with only major change being the CPU
which is Demeter instead of Neoverse-N2.

Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com>
Change-Id: I939d9eac652fa9e76ad002ee5e6107aa79baa013
2022-02-16 13:42:24 +00:00
Madhukar Pappireddy 22bbb34afa Merge "refactor(stm32mp1): move PIE flag to SP_min" into integration 2022-02-15 23:41:24 +01:00
Yann Gautier cff26c1916 feat(stm32mp1): enable format-signedness warning
Add the flag -Wformat-signedness to TF_CFLAGS for STM32MP1.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6af18778902b0a4dae1c08735d2d070ef3d137ce
2022-02-15 18:09:51 +01:00
Yann Gautier 43bbdca04f fix(stm32mp1): correct types in messages
Avoid warnings when -Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0ca41cb96826b4f7f9bcf77909fad110325c1e91
2022-02-15 18:09:51 +01:00
Satish Kumar cf89fd57ed feat(corstone1000): identify bank to load fip
Secure enclave decides the boot bank based on the firmware update
state of the system and updates the boot bank information at a given
location in the flash. In this commit, bl2 reads the given flash
location to indentify the bank from which it should load fip from.

Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: I7f0f4ffc97189c9deb99db44afcd966082ffbf21
2022-02-15 13:26:35 +00:00
Pali Rohár 5a60efa12a fix(a3k): fix comment about BootROM address range
A53 AP BootROM is just 16 kB long and is mapped to address range
0xFFFF0000-0xFFFF4000. RVBAR_EL3 register has value 0xFFFF0000.
A53 AP BootROM itself is in the BootROM window which is 1 MB long and
mapped to address range 0xFFF00000-0xFFFFFFFF.

CM3 BootROM is not accessible from A53 core.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5d4a4c7b1e7550c4738c67a872d341f945d48bbc
2022-02-15 13:21:42 +01:00
Satish Kumar 1559450132 fix(corstone1000): change base address of FIP in the flash
More space in the flash is reserved up front for metadata
parser and UEFI variables. That requires change in the flash
base address of where images are present.

Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: Ieaabe09374d707de18d36505c69b6c9a8c2ec2e9
2022-02-15 09:12:32 +00:00
Emekcan Aras a599c80d06 feat(corstone1000): implement platform specific psci reset
This change implements platform specific psci reset
for the corstone1000.

Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: I25f77234506416c3376ff4a028f6ea40ebe68437
2022-02-15 09:11:59 +00:00
Jiafei Pan 16662dc40d feat(ls1046aqds): add board ls1046aqds support
ls1046aqds board is full function board to evaluate ls1046a platform.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Id1befe37a25f7c379e76791538348fd03bba78f7
2022-02-15 08:59:58 +08:00
Jiafei Pan b51dc56ab9 feat(ls1046afrwy): add ls1046afrwy board support
The LS1046A Freeway board (FRWY) is a high-performance computing,
evaluation, and development platform that supports the LS1046A
architecture processor capable of support more than 32,000 CoreMark
performance. The FRWY-LS1046A board supports the LS1046A processor,
onboard DDR4 memory, multiple Gigabit Ethernet, USB3.0 and M2_Type_E
interfaces for Wi-Fi, FRWY-LS1046A-AC includes the Wi-Fi card.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I9a9680689e6f17bf4cc76fd5d1883eed6ace5149
2022-02-15 08:59:58 +08:00
Jiafei Pan bb52f7560b feat(ls1046ardb): add ls1046ardb board support
The LS1046A reference design board (RDB) is a high-performance
computing, evaluation, and development platform that supports
the Layerscape LS1046A architecture processor.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ib7a01b309e0b0acc7f38e22b138e9e181dff244a
2022-02-15 08:59:58 +08:00
Jiafei Pan cc708597fa feat(ls1046a): add new SoC platform ls1046a
The LS1046A is a cost-effective, power-efficient, and highly
integrated system-on-chip (SoC) design that extends the reach
of the NXP value-performance line of QorIQ communications
processors. Featuring power-efficient 64-bit Arm Cortex A72
cores with ECC-protected L1 and L2 cache memories for high
reliability, running up to 1.8 GHz.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Change-Id: I208d9bf1702410463c2b2630d31d0cd4eb7e8837
2022-02-15 08:59:58 +08:00
Arpita S.K 854d1c103a feat(corstone1000): made changes to accommodate 3MB for optee
These changes are required to accommodate 3MB for OP-TEE and this
is required for SP's part of optee
Added size macro's for better readability of the code
Moved uboot execution memory from CVM to DDR

Change-Id: I16657c6e336fe7c0fffdee1617d10af8a2c76732
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
2022-02-14 10:34:46 +00:00
Vishnu Banavath 0260eb0d15 build(corstone1000): rename diphda to corstone1000
diphda platform is now being renamed to corstone1000.
These changes are to replace all the instances and traces
of diphda  corstone1000.

Change-Id: I330f3a112d232b99b4721b6bf0236253b068dbba
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
2022-02-14 10:32:16 +00:00
Ying-Chun Liu (PaulLiu) cb2c4f93c1 feat(plat/imx/imx8m/imx8mm): add support for measured boot
Add helper functions to generate event log for imx8mm
when MEASURED_BOOT=1.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Change-Id: Ifc947d749055787fbda0b39170aa2eb8865b7802
2022-02-14 02:36:35 +08:00
Manish Pandey 2ba3085b8c Merge "refactor(measured-boot): cleanup Event Log makefile" into integration 2022-02-11 17:57:26 +01:00
Yann Gautier 56e8952fc0 refactor(stm32mp1): move PIE flag to SP_min
The PIE compilation is used only for BL32, move the ENABLE_PIE to
sp_min-stm32mp1.mk file. Override PIE flags, as sp_min.mk file is
included after the flags are set in Makefile.
The BL2_IN_XIP_MEM was added for a feature not yet upstreamed.
It is then removed from platform.mk file.

Change-Id: If055e51e0f160f99cd4e4cf68ca718d4d693119c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
2022-02-11 17:43:31 +01:00
Madhukar Pappireddy 2165f97e88 Merge "feat(common): add SZ_* macros" into integration 2022-02-11 17:19:55 +01:00
Nicolas Toromanoff c870188d27 refactor(stm32mp1): update tamp_bkpr return type
tamp_bkpr() returns a register address. So use uintptr_t instead of
uin32_t.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I5eddfa525465313dadfec18d128248a968ba74e2
2022-02-11 11:05:30 +01:00
Yann Gautier 1af59c4570 feat(common): add SZ_* macros
Add the SZ_* macros from 32 to 2G.
This allows removing some defines in raw NAND driver
and STM32MP1 boot device selection code.

Change-Id: I3c4d4959b0f43e785eeb37a43d03b2906b7fcfbc
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
2022-02-08 10:49:36 +01:00
Madhukar Pappireddy 0e1c3f8cb7 Merge "feat(rdn2): add board support for rdn2cfg2 variant" into integration 2022-02-07 16:24:39 +01:00