Commit Graph

5164 Commits

Author SHA1 Message Date
Andrew F. Davis b3ca8aabbd ti: k3: drivers: ti_sci: Add exclusive device accessors
When a device is requested with TI-SCI its control can be made exclusive
to the requesting host. This was currently the default but is not what
is needed most of the time. Add _exclusive versions of the request
functions and remove the exclusive flag from the default version.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-11 16:13:30 -06:00
Andrew F. Davis 33baa1e33c ti: k3: drivers: ti_sci: Internalize raw get/set state functions
The raw get and set state functions for both devices and clocks
are only meant for use internal to the TI-SCI driver, the same
functionality is available from the other API that call into
these. Remove them from the external interface and make them
static scope to the driver.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-02-11 16:13:30 -06:00
Ryan Grachek c8ab47d42d hikey960: enable IOMCU DMAC
There exists a third DMA controller on the hi3660
SoC called the IOMCU DMAC. This controller is used by
peripherals like SPI2 and UART3. Initialize channels 4-7
as non-secure, while 0-3 remain reserved and secure.

Signed-off-by: Ryan Grachek <ryan@edited.us>
2019-02-11 11:50:49 -06:00
Antonio Nino Diaz 1a74e4a895 cpus: Add casts to all definitions in CPU headers
There are some incorrect casts and some missing casts in the headers.
This patch fixes the ones that were 64-bit or 32-bit wide wrongly and
adds casts where they were missing.

Note that none of the changes of the patch actually changes the values
of the definitions. This patch is just for correctness.

Change-Id: Iad6458021bad521922ce4f91bafff38b116b49eb
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-11 13:34:57 +00:00
Antonio Nino Diaz a69817eda2 cpus: Fix some incorrect definitions in CPU headers
There are some values that should be 64-bit immediates but that resolve
to 0 because the type of the value is 32-bit wide. This patch casts the
expressions to 64-bit before the shift so that the definition has the
correct value.

The definitions are only used in assembly so far, so the code is not
actually affected by this bug. The assembler treats all values as 64-bit
values, so there are no overflows.

Change-Id: I965e4be631c1d28787c0913661d224c82a6b9155
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-11 13:34:54 +00:00
Antonio Niño Díaz 873e394b3b
Merge pull request #1810 from antonio-nino-diaz-arm/an/setjmp
Make setjmp/longjmp compliant with the C standard and move them to libc
2019-02-11 09:58:53 +00:00
Antonio Niño Díaz 9beee98acc
Merge pull request #1808 from sandrine-bailleux-arm/sb/maintainers
maintainers: Fix broken links to some Github accounts
2019-02-11 09:58:43 +00:00
Antonio Niño Díaz 66c031b3c3
Merge pull request #1811 from sandrine-bailleux-arm/sb/doc-fixes
Miscellaneous documentation fixes
2019-02-11 09:58:34 +00:00
Paul Beesley dd4e9a7da0 doc: Fix broken external links
Using Sphinx linkcheck on the TF-A docs revealed some broken
or permanently-redirected links. These have been updated where
possible.

Change-Id: Ie1fead47972ede3331973759b50ee466264bd2ee
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-02-08 16:52:24 +00:00
Sandrine Bailleux f3cacadae3 Doc: Remove useless escape characters
Just like has been done in the porting guide a couple of patches
earlier, kill all escaped underscore characters in all documents.

Change-Id: I7fb5b806412849761d9221a6ce3cbd95ec43d611
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:33:21 +01:00
Sandrine Bailleux 337e2f1f2b Miscellaneous doc fixes/enhancements
Change-Id: I915303cea787d9fb188428b98ac6cfc610cc4470
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:33:17 +01:00
Sandrine Bailleux 9aa6b6371f Porting Guide: Fix some broken links
Fix links to SCC and FreeBSD. Direct links do not need any special
formatting.

Change-Id: I00f7343d029a30ec02dfaa0ef393b3197260cab9
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:21:24 +01:00
Sandrine Bailleux ab4a90cd0f Porting Guide: Remove useless escape characters
Replace all occurences of escaped underscore characters by plain ones.
This makes the text version of the porting guide easier to read and
grep into.

Change-Id: I7bf3b292b686be4c6d847a467b6708ac16544c90
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-08 16:21:24 +01:00
Antonio Niño Díaz 32bcba0020
Merge pull request #1809 from antonio-nino-diaz-arm/an/fix-trusty
trusty: Require dynamic translation tables
2019-02-08 13:53:15 +00:00
Antonio Niño Díaz f41a9126d5
Merge pull request #1759 from vwadekar/armlink-support
Armlink support
2019-02-08 13:48:47 +00:00
Antonio Nino Diaz 70b0f2789e libc: Move setjmp to libc folder
Now that setjmp() and longjmp() are compliant with the standard they can
be moved with the other libc files.

Change-Id: Iea3b91c34eb353ace5e171e72f331602d57774d5
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-08 13:42:38 +00:00
Antonio Nino Diaz e056630516 Make setjmp.h prototypes comply with the C standard
Instead of having a custom implementation of setjmp() and longjmp() it
is better to follow the C standard.

The comments in setjmp.h are no longer needed as there are no deviations
from the expected one, so they have been removed.

All SDEI code that relied on them has been fixed to use the new function
prototypes and structs.

Change-Id: I6cd2e21cb5a5bcf81ba12283f2e4c067bd5172ca
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-08 13:42:38 +00:00
Varun Wadekar a1d00bb3ce xlat_tables_v2: mark 'xlat_clean_dcache_range' unused
The armclang compiler can warn if a variable is declared but
is never referenced. The '__attribute__((unused))' attribute
informs the compiler to expect an unused variable, and tells
it not to issue a warning.

This patch marks the 'xlat_clean_dcache_range' function as
"unused" to fix this armclang compiler warning.

Change-Id: I7623f61c2975a01db4d1b80554dd4f9a9e0f7eb6
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 09:01:12 -08:00
Varun Wadekar 596929b971 locks: linker variables to calculate per-cpu bakery lock size
This patch introduces explicit linker variables to mark the start and
end of the per-cpu bakery lock section to help bakery_lock_normal.c
calculate the size of the section. This patch removes the previously
used '__PERCPU_BAKERY_LOCK_SIZE__' linker variable to make the code
uniform across GNU linker and ARM linker.

Change-Id: Ie0c51702cbc0fe8a2076005344a1fcebb48e7cca
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 09:00:52 -08:00
Varun Wadekar 5e2fe3a3b5 Tegra186: trampoline: include bl_common.h
This patch includes bl_common.h from plat_trampoline.S to link with
the __BL31_END__ symbol.

Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:51 -08:00
Varun Wadekar b8c7e54d2c Tegra186: use common 'BL31_BASE' variable
This patch modfies the 'tegra_soc_pwr_domain_power_down_wfi' handler
to use BL31_BASE variable, provided by bl_common.h

Change-Id: I9747228d0193c1ae6999284458b9f866955a61a2
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:42 -08:00
Varun Wadekar 1242b9a9d0 lib: aarch64: misc_helpers: include bl_common.h
This patch includes bl_common.h to get access to the linker
defined symbols.

Change-Id: I9aa4a6e730273d75a53438854f69971e485bc904
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:32 -08:00
Varun Wadekar e095ba34d7 Remove unused function symbols
This patch removes the unused functions that are marked as .global
in code but not defined anywhere in the code.

Change-Id: Ia5057a77c0b0b4a61043eab868734cd3437304cc
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:21 -08:00
Varun Wadekar bf52f40e2a lib: aarch64: fix non-code symbol errors flagged by armlink
This patch modifies the code to turn __1printf and __2printf into proper
functions to fix the following errors flagged by armlink.

Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.
Error: L6318W: backtrace.o(.text.backtrace) contains branch to a non-code symbol __2printf.

Change-Id: I89126bc2b9db44ce8b8fc9fb1e3fc4c8c60c47a4
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:09 -08:00
Varun Wadekar 9c2eda0193 Tegra: remove circular dependency with common_def.h
This patch stops including common_def.h from platform_def.h to
fix a circular depoendency between them.

This means platform_def.h now has to define the linker macros:
* PLATFORM_LINKER_FORMAT
* PLATFORM_LINKER_ARCH

Change-Id: Icd540b1bd32fb37e0e455e9146c8b7f4b314e012
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-07 08:47:01 -08:00
Kalyani Chidambaram 636fcb0ba5 Tegra: define CACHE_WRITEBACK_GRANULE for scatterfile
The scatterfile to support armlink, does not seem to support
shift operator. To handle this define CACHE_WRITEBACK_GRANULE with
the direct value.

Change-Id: I19afc7cb9c55a08cb0703f284d91018d3214353f
Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>
2019-02-07 08:46:52 -08:00
Sandrine Bailleux 1f0d710535 maintainers: Fix broken links to some Github accounts
Change-Id: I89a451fa22d517f9c59dfa0a74f28deb6d750b8f
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-02-07 17:23:23 +01:00
Antonio Nino Diaz 37d9458f11 trusty: Require dynamic translation tables
Trusty requires dynamic translation tables support, so the makefile of
Trusty itself should request it. Not doing so causes platforms such as
FVP to fail to build with Trusty. Other platforms like Tegra still build
because they use dynamic translation tables by default.

Change-Id: Id67d3b9e1f7d0547fa81e81cefa3faf1e0e6f876
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-06 13:35:15 +00:00
Antonio Niño Díaz 30490b15fe
Merge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19
Tf2.0 tegra downstream rebase 1.25.19
2019-02-06 10:20:25 +00:00
Antonio Niño Díaz d636f67e60
Merge pull request #1805 from antonio-nino-diaz-arm/an/generic-timer
drivers: generic_delay_timer: Assert presence of Generic Timer
2019-02-06 10:20:12 +00:00
Antonio Nino Diaz 29a24134c1 drivers: generic_delay_timer: Assert presence of Generic Timer
The Generic Timer is an optional extension to an ARMv7-A implementation.
The generic delay timer can be used from any architecture supported by
the Trusted Firmware. In ARMv7 it is needed to check that this feature
is present. In ARMv8 it is always present.

Change-Id: Ib7e8ec13ffbb2f64445d4ee48ed00f26e34b79b7
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-06 09:54:42 +00:00
Varun Wadekar a474d3d700 docs: add Tegra186 information to nvidia-tegra.rst
This patch adds information about the Tegra186 platforms to the
docs.

Change-Id: I69525c60a0126030dc15505ec7f02ccf8250be6f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 9a861d0f15 Tegra186: remove ENABLE_AFI_DEVICE macro usage
This patch removes this macro and its usage as it is used only
within the Tegra186 files and all derived platforms keep the
macro enabled.

Change-Id: Ib831b3c002ba4dedc3d5fafbb7d321daa28fa9ea
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 15440c5280 spd: trusty: memmap trusty's code memory before peeking
This patch dynamically maps the first page of trusty's code memory,
before accessing it to find out if we are running a 32-bit or 64-bit
image.

On Tegra platforms, this means we have to increase the mappings to
accomodate the new memmap entry.

Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 500fc9e10b Tegra: initialise per-CPU GIC interface(s)
This patch initilises the per-CPU GIC bits during cold boot and
secondary CPU power up. Commit 80c50ee accidentally left out this
part.

Change-Id: I73ce59dbc83580a84b827cab89fe7e1f65f9f130
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 843d0aad80 Tegra: spe: prepend '\r' to '\n'
This patch udpates the SPE console driver to prepend '\r' to
'\n'. This fixes the alignment of prints seen by the host
machines on their UART ports.

Tested by collecting the logs from host PC using Cutecom

Reported by: Mustafa Bilgen <mbilgen@nvidia.com>

Change-Id: I6e0b412bd71ff5eb889582071df8c157da5175ed
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Vignesh Radhakrishnan 07faf4d8c5 Tegra: Enable irq as wake-up event for cpu_standby
As per ARM ARM D1.17.2, any physical IRQ interrupt received by the PE
will be treated as a wake-up event, if SCR_EL3.IRQ is set to '1',
irrespective of the value of the PSTATE.I bit value.

This patch programs the SCR_EL3.IRQ bit before entering CPU standby
state, to allow an IRQ to wake the PE. On waking up, the previous
SCR_EL3 value is restored.

Change-Id: Ie81cf3a7668f5ac35f4bf2ecc461b91b9b60650c
Signed-off-by: Vignesh Radhakrishnan <vigneshr@nvidia.com>
2019-02-05 08:27:43 -08:00
Anthony Zhou b695af1dfc Tegra: remove unused libc files from makefile
This patch redefines the variable LIBC_SRCS for Tegra platforms,
to remove unused libc files from the list. This patch is a building
block to eventually use other libc implementations in the future.

Change-Id: Iccde5a75f5e2d6f4e2dbc6274beb423b80e846fd
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:43 -08:00
Varun Wadekar 77f1f7a117 Introduce build option to override libc
This patch introduces a build option 'OVERRIDE_LIBC' that platforms
can set to override libc from the BL image. The default value is '0'
to keep the library.

Change-Id: I10a0b247f6a782eeea4a0359e30a8d79b1e9e4e1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-02-05 08:27:32 -08:00
Antonio Niño Díaz a45ccf135e
Merge pull request #1804 from antonio-nino-diaz-arm/an/cleanup
Minor cleanup
2019-02-05 11:31:15 +00:00
Antonio Niño Díaz 49dd04815f
Merge pull request #1806 from thomas-arm/master
sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms
2019-02-05 11:31:05 +00:00
Thomas Abraham e64044ba8f sgi/sgm: add a second maintainer for Arm's SGI and SGM platforms
Add a second maintainer for Arm's SGI and SGM platform support in
trusted firmware to handle the review and maintenance of
existing and upcoming platforms.

Change-Id: Ie7fa8da280d9351f7543122fb261d6ac6c7e15ad
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
2019-02-05 14:03:50 +05:30
Antonio Niño Díaz 5c8a7732e1
Merge pull request #1799 from soby-mathew/sm/gicr_probe
GICv3: Allow probe for fewer GICR interfaces than exposed by the frame
2019-02-04 18:19:07 +00:00
Antonio Niño Díaz 6ce3034688
Merge pull request #1783 from thloh85-intel/integration_v2
plat: intel: Add BL2 support for Stratix 10 SoC
2019-02-04 18:14:58 +00:00
Soby Mathew 5dc2c3f95c GICv3: Allow probe for fewer GICR interfaces than exposed by the frame
Previously the GICv3 redistributor probe function
(gicv3_rdistif_base_addrs_probe()) asserted that the number of
per-CPU redistributor interfaces expected to be probed by the
platform is equal to the number exported by the redistributor
frame. This is a problem in case the number of CPUs in the
platform is less than the number of redistributor interfaces
in the frame. Hence this patch removes the assertion check
and allows probe for fewer redistributor interfaces as required
by the platform.

Change-Id: I3449763a3ad70817224442cbe184d001030c9874
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2019-02-04 15:42:36 +00:00
Antonio Niño Díaz c57abde6f5
Merge pull request #1803 from sandrine-bailleux-arm/sb/arm-bl33-fixes
Fixes related to BL33 image on Arm platforms
2019-02-04 11:27:35 +00:00
Antonio Niño Díaz 5735057d15
Merge pull request #1796 from grandpaul/rpi3-sdhost-driver
RPi3 SDHost driver
2019-02-04 11:26:00 +00:00
Loh Tien Hock 9d82ef26c6 plat: intel: Add BL2 support for Stratix 10 SoC
This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
2019-02-04 16:17:24 +08:00
Antonio Nino Diaz 5e447816c7 Remove unneeded include paths in PLAT_INCLUDES
Also, update platform_def.h guidelines about includes in the porting
guide.

Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00
Antonio Nino Diaz 702b600ff3 xlat v2: Fix comment
Change-Id: Id7c22d76b896d1dcac18cdb0e564ce4e02583e33
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-02-01 12:24:57 +00:00