Abdul Halim, Muhammad Hadi Asyrafi 12d71ac662 fix(intel): fix ddr address range checker ... This patch fix address range checker to make sure that it does not errors out on NULL address with size 0. Non-secure software will send this NULL address if the SMC call doesn't need to pass any address buffer. Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I7e492c562a311ba989570c4ed465f845333ec865		2022-02-23 16:28:56 +08:00
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aarch64	intel: Implement platform specific system reset 2	2019-12-30 10:17:04 +08:00
drivers	plat: intel: Fix CCU initialization for Agilex	2020-06-08 22:03:48 +00:00
include	intel: common: Fix non-MISRA compliant code v2	2020-10-27 11:21:00 +08:00
soc	intel: common: Fix non-MISRA compliant code v2	2020-10-27 11:21:00 +08:00
bl2_plat_mem_params_desc.c	intel: Platform common code refactor	2019-08-01 16:39:27 +08:00
socfpga_delay_timer.c	plat: intel: Additional instruction required to enable global timer	2020-06-08 22:03:54 +00:00
socfpga_image_load.c	intel: Implement platform specific system reset 2	2019-12-30 10:17:04 +08:00
socfpga_psci.c	intel: Fix argument type for mailbox driver	2020-02-25 16:41:47 +08:00
socfpga_sip_svc.c	fix(intel): fix ddr address range checker	2022-02-23 16:28:56 +08:00
socfpga_storage.c	intel: Refactor common platform code [2/5]	2019-11-28 12:47:58 +08:00
socfpga_topology.c	intel: Platform common code refactor	2019-08-01 16:39:27 +08:00