The F1 CAS latency setting was not bit shifted, which resulted in setting the DRAM additive latency value instead. Signed-off-by: Derek Basehore <dbasehore@chromium.org> |
||
---|---|---|
.. | ||
common | ||
rk3368 | ||
rk3399 |
The F1 CAS latency setting was not bit shifted, which resulted in setting the DRAM additive latency value instead. Signed-off-by: Derek Basehore <dbasehore@chromium.org> |
||
---|---|---|
.. | ||
common | ||
rk3368 | ||
rk3399 |