Achin Gupta b44a4435c9 Add S-EL1 interrupt handling support in the TSPD ... This patch adds support in the TSPD for registering a handler for S-EL1 interrupts. This handler ferries the interrupts generated in the non-secure state to the TSP at 'tsp_fiq_entry'. Support has been added to the smc handler to resume execution in the non-secure state once interrupt handling has been completed by the TSP. There is also support for resuming execution in the normal world if the TSP receives a EL3 interrupt. This code is currently unused. Change-Id: I816732595a2635e299572965179f11aa0bf93b69		2014-05-22 17:54:46 +01:00
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bl1	Reduce deep nesting of header files	2014-05-06 13:57:48 +01:00
bl2	Rework memory information passing to BL3-x images	2014-05-22 16:19:32 +01:00
bl31	Add S-EL1 interrupt handling support in the TSPD	2014-05-22 17:54:46 +01:00
bl32	Add support for synchronous FIQ handling in TSP	2014-05-22 17:48:36 +01:00
common	Add support for BL3-1 as a reset vector	2014-05-22 16:25:09 +01:00
drivers	Introduce platform api to access an ARM GIC	2014-05-22 17:47:19 +01:00
lib	Use secure timer to generate S-EL1 interrupts	2014-05-22 17:47:20 +01:00
stdlib	Add Firmware Image Package creation tool	2014-02-17 18:51:43 +00:00