arm-trusted-firmware/plat
Antonio Nino Diaz f13cb561f0 LOAD_IMAGE_V1: Align BL2 memory layout struct to 8 bytes
In LOAD_IMAGE_V1 (i.e when LOAD_IMAGE_V2=0) the bl2_tzram_layout is,
by default, assigned to the bl1_tzram_layout->free_base which is
dynamically calculated based on the images loaded in memory. There is a
chance that the bl2_tzram_layout will be assigned a value not aligned to
8 bytes. This patch rounds up the free_base value for the required
alignment.

This doesn't happen in LOAD_IMAGE_V2 because the bl2_tzram_layout is
assigned by default to the bl1_tzram_layout->total_base, which is
aligned.

Change-Id: Idc583e7dad993d02ac6791797406118c96f83fa1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-06-12 14:08:48 +01:00
..
arm Merge pull request #1397 from dp-arm/dp/cortex-a76 2018-06-08 14:01:38 +01:00
common LOAD_IMAGE_V1: Align BL2 memory layout struct to 8 bytes 2018-06-12 14:08:48 +01:00
compat Do not enable SVE on pre-v8.2 platforms 2017-11-30 17:45:23 +00:00
hisilicon Merge pull request #1361 from vchong/tool_add_img 2018-05-01 17:12:51 +01:00
layerscape layerscape: fix integer handling issues 2018-04-11 12:12:24 +00:00
mediatek Fix pointer type mismatch of handlers 2018-04-27 18:35:02 +09:00
nvidia/tegra types: use int-ll64 for both aarch32 and aarch64 2018-04-27 18:35:02 +09:00
qemu Merge pull request #1334 from michpappas/tf-issues#572_qemu_dont_use_C_for_crash_console 2018-04-03 11:59:55 +01:00
rockchip rockchip/rk3399: Add watchdog support in pmusram 2018-05-15 16:31:19 +08:00
rpi3 Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements 2018-03-29 13:20:05 +01:00
socionext/uniphier plat: fix switch statements to comply with MISRA rules 2018-03-26 12:43:05 +01:00
xilinx/zynqmp zynqmp: Add wdt timeout restart functionality 2018-05-17 15:19:26 +05:30