Commit Graph

183 Commits

Author SHA1 Message Date
Jona Stubbe 9565962c37 refactor(plat/rockchip/rk3399/drivers/gpio): reduce code duplication
Refactor the GPIO code to use a small lookup table instead of redundant or
repetitive code.

Signed-off-by: Jona Stubbe <tf-a@jona-stubbe.de>
Change-Id: Icf60385095efc1f506e4215d497b60f90e16edfd
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
2022-01-04 15:26:43 +01:00
Jimmy Brisson 2c4b0c05c6 fix(rk3399/suspend): correct LPDDR4 resume sequence
This change adds 208 bytes to PMUSRAM, pushing the end of text from
0xff3b0de0 to 0xff3b0eb0, which is still shy of the maximum
0xff3b1000.

Further, this skips enabling the watchdog when it's not being used
elsewhere, as you can't turn the watchdog off.

Change-Id: I2e6fa3c7e01f2be6b32ce04ce479edf64e278554
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
2021-07-19 23:06:33 +02:00
Patrick Georgi f943b7c8e2 fix(rockchip/rk3399): fix dram section placement
To quote jwerner in T925:
"The __sramdata in the declaration is a mistake, the correct target
section for that global needs to be .pmusram.data. This used to be
in .sram.data once upon a time but then the suspend.c stuff got added
and required it to be moved to PMUSRAM. I guess they forgot to update
that part in the declaration and since the old GCC seemed to silently
prefer the attribute in the definition, nobody noticed."

This fixes building with gcc 11.

fix #T925

Change-Id: I2b91542277c95cf487eaa1344927294d5d1b8f2b
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
2021-06-23 21:41:55 +02:00
Christoph Müllner 826ba363c4 rockchip: Add support for the stack protector
It uses the system timer as "entropy" source in the same
way as QEMU, layerscape and others.

Change-Id: Icda17b78e85255bea96109ca2ee0e091187d62ac
Signed-off-by: Christoph Müllner <christophm30@gmail.com>
2020-12-01 11:54:57 +01:00
Alexei Fedorov a6ea06f563 TF-A GICv3 driver: Introduce makefile
This patch moves all GICv3 driver files into new added
'gicv3.mk' makefile for the benefit of the generic driver
which can evolve in the future without affecting platforms.
The patch adds GICv3 driver configuration flags
'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and
'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in
'GICv3 driver options' section of 'build-option.rst'
document.

NOTE: Platforms with GICv3 driver need to be modified to
include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles.

Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-03-30 10:54:01 +00:00
Alexei Fedorov 6e19bd563d TF-A GICv3 driver: Separate GICD and GICR accessor functions
This patch provides separation of GICD, GICR accessor
functions and adds new macros for GICv3 registers access
as a preparation for GICv3.1 and GICv4 support.
NOTE: Platforms need to modify to include both
'gicdv3_helpers.c' and 'gicrv3_helpers.c' instead of the
single helper file previously.

Change-Id: I1641bd6d217d6eb7d1228be3c4177b2d556da60a
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2020-03-10 09:40:19 +00:00
Deepika Bhavnani ed7a56361c rockchip: Unify Platform specific defines for PSCI module
PLATFORM_CORE_COUNT - Unsigned int
PLATFORM_CLUSTER_COUNT - Unsigned int
PLATFORM_MAX_CPUS_PER_CLUSTER - Unsigned int
PLATFORM_CORE_COUNT_PER_CLUSTER - Unsigned int

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: I624c15d569db477506a74964bc828e1a932181d4
2020-01-24 13:14:44 +00:00
Soby Mathew 287a81dfad Merge "plat/rockchip: enable power domains of rk3399 before reset" into integration 2019-12-17 16:41:30 +00:00
Soby Mathew 37ebe8e5ee Merge "plat/rockchip: cliam a macro to enable hdcp feature for DP" into integration 2019-12-17 15:12:43 +00:00
Heiko Stuebner 7f0b2e78e0 rockchip: really use base+size for secure ddr regions
The calls to secure ddr regions on rk3288 and rk3399 use parameters of
base and size - as it custom for specifying memory regions, but the
functions themself expect start and endpoints of the area.

This only works by chance for the TZRAM, as it starts a 0x0 and therefore
its end location is the same as its size.

To not fall into a trap later on adapt the functions to really take
base+size parameters.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Change-Id: Idb9fab38aa081f3335a4eca971e7b7f6757fbbab
2019-12-17 01:29:07 +01:00
Joshua Watt 39a97dce61 rockchip: Prevent macro expansion in paths
Instead of stringizing the paths to binary files, add them as string
defines on the command line (e.g. -DFOO=\"BAR\" instead of -DFOO=BAR).
This prevents macros from being expanded inside the string value itself.
For example, -DFOO=/path/with-linux-in-it would have been expanded to
"/path/with-1-in-it" because `linux=1` is one of the standard GCC
defines.

Change-Id: I7b65df3c9930faed4f1aff75ad726982ae3671e6
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
2019-12-13 14:13:45 -06:00
Ziyuan Xu f0063ef948 plat/rockchip: cliam a macro to enable hdcp feature for DP
HDCP is using a binary driver, add macro PLAT_RK_DP_HDCP to make it as
an option.

Change-Id: I54ef1a3635a28e8ae56654bd1e91dfe011520a7f
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-13 09:47:58 +08:00
Piotr Szczepanik b4899041e5 plat/rockchip: enable power domains of rk3399 before reset
This patch fixes hangs that happen after soft resetting of rk3399.

Signed-off-by: Piotr Szczepanik <piter75@gmail.com>
Change-Id: If41b12ba1dfcb2ba937361b58eafd50bf5c483d4
2019-12-10 20:55:00 +00:00
Justin Chadwell b7f6525db6 Enable -Wshadow always
Variable shadowing is, according to the C standard, permitted and valid
behaviour. However, allowing a local variable to take the same name as a
global one can cause confusion and can make refactoring and bug hunting
more difficult.

This patch moves -Wshadow from WARNING2 into the general warning group
so it is always used. It also fixes all warnings that this introduces
by simply renaming the local variable to a new name

Change-Id: I6b71bdce6580c6e58b5e0b41e4704ab0aa38576e
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-11-19 08:53:16 -06:00
Kever Yang 0aad563c74 rockchip: Update BL31_BASE to 0x40000
Rockchip platform is using the first 1MB of DRAM as secure ram space,
and there is a vendor loader who loads and runs the BL31/BL32/BL33,
this loader is usually load by SoC BootRom to the start addres of DRAM,
we need to reserve enough space for this loader so that it doesn't need
to do the relocate when loading the BL31. eg.
We use U-Boot SPL to load ATF BL31 and U-Boot proper as BL33, the SPL
TEXT BASE is offset 0 of DRAM which is decide by Bootrom; if we update
the BL31_BASE to offset 0x40000(256KB), then the 0~0x40000 should be
enough for SPL and no need to do the relocate while the space size
0x10000(64KB) may not enough for SPL.
After this update, the BL31 can use the rest 768KB of the first 1MB,
which is also enough, and the loader who is using BL31 elf file can
support this update without any change.

Change-Id: I66dc685594d77f10f9a49c3be015fd6729250ece
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-09-20 08:42:53 +08:00
Heiko Stuebner 0eb7fa91e1 rockchip: rk3399: store actual debug uart information on suspend
The rk3399 suspend code saves and restores the debug uart settings, but
right now always does this for the default uart. Right now this works
only by chance for the majority of rk3399 boards, which do not deviate
from that default.

But both Coreboot as well as U-Boot-based platforms can actually use
different uarts for their output, which can be configured from either
devicetree or Coreboot-variables.

To fix this, just use the stored uart-base information instead of the
default constant.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I1ea059d59a1126f6f8702315df7e620e632b686e
2019-08-09 09:40:19 +02:00
Julius Werner 3e02c7436c plat/rockchip: Use new bl31_params_parse_helper()
The Rockchip platform is a prime candidate for switching to the new
bl31_params_parse_helper(), so switch it over. This will allow BL2
implementations on this platform to transparently switch over to the
version 2 parameter structure.

Change-Id: I540741d2425c93f66c8697ce749a351eb2b3a7e8
Signed-off-by: Julius Werner <jwerner@chromium.org>
2019-07-24 11:04:03 -07:00
Julius Werner c1185ffde1 plat/rockchip: Switch to use new common BL aux parameter library
This patch changes all Rockchip platforms to use the new common BL aux
parameter helpers. Since the parameter space is now cleanly split in
generic and vendor-specific parameters and the COREBOOT_TABLE
parameter is now generic, the parameter type number for that parameter
has to change. Since it only affects coreboot which always builds TF as
a submodule and includes its headers directly to get these constants,
this should not cause any issues. In general, after this point, we
should avoid changing already assigned parameter type numbers whenever
possible.

Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad
Signed-off-by: Julius Werner <jwerner@chromium.org>
2019-07-23 20:25:30 -07:00
Justin Chadwell 79ca7807cc Update rockchip platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: Ib7fc54e4141cc4f1952a18241bc18671b36e2168
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-11 12:10:58 +01:00
Ambroise Vincent 5b6ebeec9c Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Christoph Müllner 33218d2a81 rockchip: Disable binary generation for all SoCs.
All supported Rockchip SoCs (RK3288, RK3328, RK3368 and RK3399)
have non-continuous memory areas in the linker script with a huge
gap between them. This results in extremely padded binary images
with a size of about 4 GiB.

E.g. on the RK3399 we have the following memory areas (and base addresses):
RAM (0x1000), SRAM (0xFF8C0000), and PMUSRAM (0xFF3B0000).

Consumers of the TF-A project (e.g. coreboot or U-Boot) therefore
use the ELF image instead, which has a size of a few hundred kBs.

In order to prevent the generation of a huge and useless file,
this patch disables the binary generation for all affected Rockchip
SoCs.

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I4ac65bdf1e598c3e1a59507897d183aee9a36916
2019-05-02 12:27:19 +02:00
Heiko Stuebner 4200e5aae7 rockchip: only include libfdt in non-coreboot cases
While mainline u-boot always expects to submit the devicetree
as platform param, coreboot always uses the existing parameter
structure. As libfdt is somewhat big, it makes sense to limit
its inclusion to where necessary and thus only to non-coreboot
builds.

libfdt itself will get build in all cases, but only the non-
coreboot build will actually reference and thus include it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7
2019-04-26 23:36:17 +02:00
Soby Mathew 5167520610 Merge "rk3399: m0: Fix compiler warnings." into integration 2019-04-26 12:55:49 +00:00
Heiko Stuebner c3aaabaf7e rockchip: move pmusram assembler code to a aarch64 subdir
The current code doing power-management from sram is highly
arm64-specific so should live in a corresponding subdirectory
and not in the common area.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I3b79ac26f70fd189d4d930faa6251439a644c5d9
2019-04-25 13:37:56 +02:00
Christoph Müllner af81a91ff4 rk3399: m0: Fix compiler warnings.
GCC complains for quite some versions, when compiling the M0 firmware
for Rockchip's rk3399 platform, about an invalid type of function 'main':

  warning: return type of 'main' is not 'int' [-Wmain]

This patch addresses this, by renaming the function to 'm0_main'.

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I10887f2bda6bdb48c5017044c264139004f7c785
2019-04-24 23:03:10 +02:00
Heiko Stuebner 7029e80683 rockchip: add an fdt parsing stub for platform param
The Rockchip ATF platform can be entered from both Coreboot and U-Boot.
While Coreboot does submit the list of linked parameter structs as
platform param, upstream u-boot actually always provides a pointer
to a devicetree as parameter.
This results in current ATF not running at all when started from U-Boot.

To fix this, add a stub that checks if the parameter is a fdt so we
can at least boot and not get stuck. Later on we can extend this with
actual parsing of information from the devicetree.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-03-14 22:45:15 +01:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Julius Werner 985ee0b7e8 drivers/console: Link console framework code by default
This patch makes the build system link the console framework code by
default, like it already does with other common libraries (e.g. cache
helpers). This should not make a difference in practice since TF is
linked with --gc-sections, so the linker will garbage collect all
functions and data that are not referenced by any other code. Thus, if a
platform doesn't want to include console code for size reasons and
doesn't make any references to console functions, the code will not be
included in the final binary.

To avoid compatibility issues with older platform ports, only make this
change for the MULTI_CONSOLE_API.

Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-12-06 16:13:50 -08:00
Antonio Nino Diaz c3cf06f1a3 Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-08 10:20:19 +00:00
Antonio Nino Diaz a9d5a3ff01 rockchip: Use common crash console functions
This platform depends on weak functions defined in
``plat/common/aarch64/platform_helpers.S`` that are going to be removed.

Change-Id: I5104d091c32271d77ed9690e9dc257c061289def
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-10-25 09:56:09 +01:00
Soby Mathew 3ed87a496a
Merge pull request #1584 from danielboulby-arm/db/Switches
Ensure the flow through switch statements is clear
2018-10-03 15:36:37 +01:00
Antonio Nino Diaz 2d6f1f01b1 rockchip: Migrate to new interfaces
- Migrate to new GIC interfaces.
- Migrate to bl31_early_platform_setup2().
- Use bl31_warm_entrypoint() instead of psci_entrypoint().
- Use PLAT_VIRT_ADDR_SPACE_SIZE and PLAT_PHY_ADDR_SPACE_SIZE.
- Update Makefile paths.
- Remove references to removed build options.
- Use private definition of bl31_params_t.

Change-Id: I860341594b5c868b2fcaa59d23957ee718472ef1
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-09-28 15:34:17 +01:00
Daniel Boulby a08a201430 Ensure the flow through switch statements is clear
Ensure case clauses:
*   Terminate with an unconditional break, return or goto statement.
*   Use conditional break, return or goto statements as long as the end
    of the case clause is unreachable; such case clauses must terminate
    with assert(0) /* Unreachable */ or an unconditional  __dead2 function
    call
*   Only fallthough when doing otherwise would result in less
    readable/maintainable code; such case clauses must terminate with a
    /* Fallthrough */ comment to make it clear this is the case and
    indicate that a fallthrough is intended.

This reduces the chance of bugs appearing due to unintended flow through a
switch statement

Change-Id: I70fc2d1f4fd679042397dec12fd1982976646168
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
2018-09-21 13:14:13 +01:00
Antonio Nino Diaz 93c78ed231 libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.

Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-22 10:26:05 +01:00
Antonio Nino Diaz 1083b2b315 PSCI: Fix types of definitions
Also change header guards to fix defects of MISRA C-2012 Rule 21.1.

Change-Id: Ied0d4b0e557ef6119ab669d106d2ac5d99620c57
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-20 13:49:22 +01:00
Roberto Vargas b2805dabaa Remove .func and .endfunc assembler directives
These directives are only used when stabs debugging information
is used, but we use ELF which uses DWARF debugging information.
Clang assembler doesn't support these directives, and removing
them makes the code more compatible with clang.

Change-Id: I2803f22ebd24c0fe248e04ef1b17de9cec5f89c4
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-07-11 09:22:56 +01:00
Paul Kocialkowski fb83888b61 rockchip: Move stdint header to the offending header file
The stdint header was introduced to rk3399's plat_sip_calls.c in order
to fix missing stdint definitions. However, ordering headers
alphabetically caused the fix to be ineffective, as stint was then
included after the offending header file (dfs.h).

Move the stdint include to that header to properly fix the issue.

Change-Id: Ieaad37a7932786971488ab58fc5b169bfa79e197
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2018-06-13 20:37:50 +02:00
Derek Basehore 5b886432dc rockchip/rk3399: Add watchdog support in pmusram
To catch early hangs in resume, this sets up the watchdog before
anything else in the pmusram code (ignoring setting up the stack...).
This uses hard coded settings for the watchdog until the proper
watchdog restore later on in the firmware/kernel.

This also restores the old watchdog register values before the PLLs
are restored to make sure we don't temporarily switch over to a 1/3s
timeout on the watchdog when the pclk_wdt goes from 4MHz to 100MHz.

Change-Id: I8f7652089a88783271b17482117b4609330abe80
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
2018-05-15 16:31:19 +08:00
Lin Huang ff4735cfdf rockchip/rk3399: Split M0 binary into two
All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
2018-05-15 16:31:09 +08:00
Lin Huang 133598cb7d rockchip/rk3399: improve pmu powermode configure when suspend
we need to enable PMU_WKUP_RST_EN for pmu powermode configure, since
enable wakeup reset will hold the soc status, so the SOC will not affect
by some power or other single glitch when resume, and keep the soc in the
right status. And it not need to enable DDRIO_RET_HW_DE_REQ, the ddr resume
will do it manual.

Change-Id: Ib4af897ffb3cb63dc2aa9a6002e5d9ef86ee4a49
Signed-off-by: Lin Huang <hl@rock-chips.com>
2018-05-15 16:31:00 +08:00
danh-arm ccd130ea74
Merge pull request #1255 from masahir0y/int-ll64
Use consistent int-ll64 typedefs for aarch32 and aarch64
2018-05-01 15:06:56 +01:00
Masahiro Yamada 57d1e5faf2 Fix pointer type mismatch of handlers
Commit 4c0d039076 ("Rework type usage in Trusted Firmware") changed
the type usage in struct declarations, but did not touch the definition
side.  Fix the type mismatch.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-04-27 18:35:02 +09:00
Derek Basehore 3cb74922d0 rockchip/rk3399: Fix sram_udelay
This fixes an off by 576x bug the the sram_udelay code. The wrong
value was multipled by the system ticks per mhz value (which is 24),
so we delayed for 1/576th of the requested time.

Signed-off-by: Derek Basehore <dbasehore@chromium.org>
2018-04-06 17:24:11 -07:00
Jonathan Wright 649c48f5dc plat: fix switch statements to comply with MISRA rules
Ensure (where possible) that switch statements in plat comply with MISRA
rules 16.1 - 16.7.

Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
2018-03-26 12:43:05 +01:00
Dimitris Papastamos b7229e4919
Merge pull request #1323 from rockchip-linux/Fixes-rk3399-watchdog
rockchip/rk3399: save/restore watchdog register correctly
2018-03-26 10:53:24 +01:00
Antonio Nino Diaz 085e80ec11 Rename 'smcc' to 'smccc'
When the source code says 'SMCC' it is talking about the SMC Calling
Convention. The correct acronym is SMCCC. This affects a few definitions
and file names.

Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S)
but the old files have been kept for compatibility, they include the
new ones with an ERROR_DEPRECATED guard.

Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-03-21 10:49:27 +00:00
Lin Huang 56bf940730 rockchip/rk3399: save/restore watchdog register correctly
there are two fix for save/restore watchdog register:
1. watchdog plck will shutdown after secure_watchdog_disable(), so need
   to save register before it and restore after secure_watchdog_enable().
2. need write 0x76 to cnt_restart to keep watchdog alive when restore
   watchdog register.

Change-Id: I1f6fbceae22186e3b72a87df6332a110adf37479
Signed-off-by: Lin Huang <hl@rock-chips.com>
2018-03-20 09:42:27 +08:00
David Cunado 5724481fdd Update ULL() macro and instances of ull to comply with MISRA
MISRA C-2012 Rule 7.3 violation: lowercase l shall not be used as literal suffixes.

This patch resolves this for the ULL() macro by using ULL suffix instead
of the ull suffix.

Change-Id: Ia8183c399e74677e676956e8653e82375d0e0a01
Signed-off-by: David Cunado <david.cunado@arm.com>
2018-02-27 17:05:51 +00:00
davidcunado-arm 956defc720
Merge pull request #1247 from rockchip-linux/rk3399/fixes-memory-corruptions
rockchip/rk3399: Fix memory corruptions or illegal memory access
2018-02-01 23:29:34 +00:00
davidcunado-arm 334e1ceb48
Merge pull request #1236 from dbasehore/gic-save-restore
RK3399 GIC save/restore
2018-02-01 08:58:23 +00:00