Commit Graph

9075 Commits

Author SHA1 Message Date
Jimmy Brisson 2c4b0c05c6 fix(rk3399/suspend): correct LPDDR4 resume sequence
This change adds 208 bytes to PMUSRAM, pushing the end of text from
0xff3b0de0 to 0xff3b0eb0, which is still shy of the maximum
0xff3b1000.

Further, this skips enabling the watchdog when it's not being used
elsewhere, as you can't turn the watchdog off.

Change-Id: I2e6fa3c7e01f2be6b32ce04ce479edf64e278554
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
2021-07-19 23:06:33 +02:00
Madhukar Pappireddy c8861f9f42 Merge changes Iebb86a0b,I7fe63311 into integration
* changes:
  refactor(plat/nxp/lx216x): refine variable definition
  refactor(plat/nxp/lx216x): use common make variables
2021-07-19 18:51:27 +02:00
Madhukar Pappireddy 8cf5afafd7 Merge changes I2b3aa9bd,I3237199b into integration
* changes:
  docs: add mt6795 to deprecated list
  feat(plat/mediatek/mt8195): add DCM driver
2021-07-19 18:38:59 +02:00
bipin.ravi 586aafa3a4 Merge "errata: workaround for Neoverse V1 errata 1791573" into integration 2021-07-19 05:36:18 +02:00
Madhukar Pappireddy 447e93eb81 Merge "fix(plat/marvell/a3k): fix printing info messages on output" into integration 2021-07-19 02:58:05 +02:00
Madhukar Pappireddy 384953df68 Merge "fix(rockchip/rk3399): fix dram section placement" into integration 2021-07-19 02:57:48 +02:00
Rex-BC Chen fc3300a500 docs: add mt6795 to deprecated list
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I2b3aa9bd0c23c360ecee673c68e1b2c92bc6d2be
2021-07-17 05:36:06 +01:00
johpow01 33e3e92541 errata: workaround for Neoverse V1 errata 1791573
Neoverse V1 erratum 1791573 is a Cat B erratum present in r0p0 and
r1p0 of the V1 processor core. It is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/60d499080320e92fa40b4625

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ic6f92da4d0b995bd04ca5b1673ffeedaebb71d10
2021-07-16 15:20:36 -05:00
Pali Rohár 9f6d154083 fix(plat/marvell/a3k): fix printing info messages on output
INFO() macro for every call prepends "INFO:   " string. Therefore
current code prints unreadable debug messages:

    "INFO:    set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0)INFO:    "
    "INFO:    Set IO decode window successfully, base(0xc000)INFO:     win_attr(3d) max_dram_win(2) max_remap(0)INFO:     win_offset(8)"

Fix it by calling exactly one INFO() call for one line. After this
change output is:

    "INFO:    set_io_addr_dec 0 result: ctrl(0x3fff3d01) base(0x0) remap(0x0)"
    "INFO:    Set IO decode window successfully, base(0xc000) win_attr(3d) max_dram_win(2) max_remap(0) win_offset(8)"

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6084e64c6f4da6c1929e5300588e4ba2608ca745
2021-07-16 19:07:44 +01:00
Madhukar Pappireddy c791113776 Merge "docs(maintainers): add Julius Werner as Rockchip platform code owner" into integration 2021-07-16 18:03:19 +02:00
Madhukar Pappireddy 6f466062fe Merge "docs: update supported FVP models as per release 11.15.14" into integration 2021-07-13 14:58:48 +02:00
Joanna Farley 07066378c4 Merge "refactor(mpam): remove unused function declaration" into integration 2021-07-13 10:10:38 +02:00
Manish V Badarkhe 8d15e46c57 docs: update supported FVP models as per release 11.15.14
Change-Id: I65da6ead356e3f4ee47c5a6bf391f65309bafcdd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-07-12 23:19:14 +02:00
Julius Werner c0cb6122bd docs(maintainers): add Julius Werner as Rockchip platform code owner
The two existing plat/rockchip code owners seem to be no longer active
in the project and are not responding to reviews. There have been a
couple of small fixup patches[1][2][3] pending for months that couldn't
be checked in for lack of Code-Owner-Review+1 flag. Add myself to the
code owner list to unblock this bottleneck (I have been deeply involved
in the rk3399 port, at least, so I know most of the code reasonably
well).

[1] https://review.trustedfirmware.org/9616
[2] https://review.trustedfirmware.org/9990
[2] https://review.trustedfirmware.org/10415

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ic7b2bb73c35a9bea91ff46ee445a22819d2045d9
2021-07-12 18:57:18 +01:00
Manish Pandey 3d47046712 Merge "refactor(plat/qemu): increase the non-secure DRAM size" into integration 2021-07-12 12:54:05 +02:00
Manish V Badarkhe 52698a620b refactor(mpam): remove unused function declaration
Change-Id: Ia660b6554fe4544effd1810e1aca202f95e3c447
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-07-09 22:03:38 +02:00
Madhukar Pappireddy 41e893fff4 Merge changes I6f568b85,I78f9c061 into integration
* changes:
  fix(plat/xilinx/versal): use sync method for blocking calls
  fix(plat/xilinx/zynqmp): use sync method for blocking calls
2021-07-09 15:37:58 +02:00
Abhyuday Godhasara fa58171534 fix(plat/xilinx/versal): use sync method for blocking calls
All API calls except non-blocking should wait for
IPI response and read buffer to check return status
from firmware. Some of API calls are not reading
status from IPI payload data. Use sync method which
reads actual return status from IPI payload.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I6f568b85d0da639c264f507122e3015807d8423d
2021-07-08 05:29:50 -07:00
Abhyuday Godhasara c063c5a4f9 fix(plat/xilinx/zynqmp): use sync method for blocking calls
All API calls except non-blocking should wait for
IPI response and read buffer to check return status
from firmware. Some of API calls are not reading
status from IPI payload data. Use sync method which
reads actual return status from IPI payload.

Signed-off-by: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
Change-Id: I78f9c061a80cee6d524ade4ef124ca88ce1848cf
2021-07-08 05:23:41 -07:00
Madhukar Pappireddy a43179a694 Merge "feat(plat/zynqmp): extend DT description by TF-A" into integration 2021-07-07 16:08:51 +02:00
Sandrine Bailleux 2cd9632945 Merge changes from topic "sb/measured-boot" into integration
* changes:
  refactor(measured boot): revisit error handling (3/3)
  refactor(measured boot): revisit error handling (2/3)
  refactor(measured boot): revisit error handling (1/3)
2021-07-07 14:07:38 +02:00
Madhukar Pappireddy 23b7ad5cc0 Merge changes from topic "stm32_io_update" into integration
* changes:
  refactor(plat/st): add stm32image_io_setup
  fix(plat/st): panic if boot interface is wrong
2021-07-07 03:09:54 +02:00
Garmin Chang 49d3bd8c4c feat(plat/mediatek/mt8195): add DCM driver
DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.

1. Add MCUSYS related DCM drivers.
2. Enable MCUSYS related DCM by default.

Change-Id: I3237199bc217bd3682f51d31284db5fd0324b396
Signed-off-by: Garmin Chang <garmin.chang@mediatek.com>
2021-07-06 14:59:06 +08:00
Manish Pandey bc97629b74 Merge changes from topic "st_fixes" into integration
* changes:
  fix(tools/stm32image): improve the tool
  fix(plat/st): add STM32IMAGE_SRC
2021-07-05 16:25:26 +02:00
Sandrine Bailleux 51018a0558 refactor(measured boot): revisit error handling (3/3)
- In tpm_record_measurement():

   The platform layer is responsible for providing an exhaustive list
   of images to measure. If it doesn't then this should be treated as
   a programming error, as documented in [1].

   Thus, turn the error test into an assertion.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-guidelines.html#using-assert-to-check-for-programming-errors

Change-Id: I002309c2ebdf2d348a7d12a8f7f9e82465046b8e
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-07-05 10:33:38 +02:00
Sandrine Bailleux 0c83207a55 refactor(measured boot): revisit error handling (2/3)
- In add_event2():

  Turn the first error condition checking whether there is room for an
  extra event2 data structure into an assertion. The platform layer is
  responsible for choosing an appropriate event log buffer size based
  on the number of measurements it expects. If this assertion fires,
  the platform macro EVENT_LOG_SIZE should be adjusted and the
  firmware recompiled.

  Call this assumption out in the function documentation.

  Also remove the second error condition check, which is a subset of
  the first one and thus is redundant.

  As a result of these changes, add_event2() can no longer fail. Thus,
  change its return type from int to void.

  Also, the 'size_of_event' local variable is now unused in release
  builds so remove it and move its value into the assertion.

Change-Id: I113fc141de59708b20435a0c7126255561ab7786
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-07-05 10:33:17 +02:00
Sandrine Bailleux ddb07a5689 refactor(measured boot): revisit error handling (1/3)
- In event_log_init():

   Throughout the function, we are incrementing a pointer by some fixed
   amounts of bytes (corresponding to the size of some data structure or
   to some constant number of bytes), there is no variable-size
   increments in the picture. Thus it seems pointless to verify that the
   pointer has indeed been incremented by this fixed amount of bytes
   afterwards.

   For this reason, remove these checks altogether. As a result, the
   start_ptr local variable is now unused so remove it as well.

Change-Id: I612e2278cd3a63d1417427e45d81e285503f5efe
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-07-05 10:32:55 +02:00
Ruchika Gupta 82f9930d71 refactor(plat/qemu): increase the non-secure DRAM size
In the qemu memory map 1GB and up is RAM. Change the
size of NS DRAM to 3GB to support VM's with more
memory requirements.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Change-Id: If15cf3b9d3e2e7876c40ce888f22e887893fe696
2021-07-05 13:59:11 +05:30
Sandrine Bailleux 976aedc9fc Merge "style(measured boot): fix incorrect indentation" into integration 2021-07-05 10:19:33 +02:00
Sandrine Bailleux ef65c9c6d1 style(measured boot): fix incorrect indentation
Change-Id: I5b84a28ed254a7c7bb95c18fa999592a4e3f6d90
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-07-05 10:19:30 +02:00
Sandrine Bailleux 9fa5db4da8 Merge changes from topic "sb/measured-boot" into integration
* changes:
  refactor(plat/fvp): tidy up list of images to measure
  docs: explain Measured Boot dependency on Trusted Boot
2021-07-05 10:19:19 +02:00
Manish Pandey 7fa35d068f Merge changes Ib8502f9b,I388fd231,I7bd37912,I3a186ed7 into integration
* changes:
  feat(plat/mediatek/mt8195): add SPM suspend driver
  feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
  feat(plat/mediatek/mt8195): add support for PTP3
  fix(plat/mediatek/mt8195): extend MMU region size
2021-07-02 12:44:34 +02:00
Olivier Deprez 05f47b77dd Merge "feat(spm): add Ivy partition to tb fw config" into integration 2021-07-02 10:28:01 +02:00
Edward-JW Yang 859e346b89 feat(plat/mediatek/mt8195): add SPM suspend driver
Support DRAM/MAINPLL/26M off when system suspend.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Ib8502f9b0b4e47aa405e5449f0b6d483bd3f5d77
2021-07-02 16:22:16 +08:00
Edward-JW Yang d336e093dd feat(plat/mediatek/mt8195): support MCUSYS off when system suspend
Add drivers to support MCUSYS off when system suspend.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: I388fd2318f471083158992464ecdf2181fc7d87a
2021-07-02 16:22:16 +08:00
Elly Chiang 048189637e feat(plat/mediatek/mt8195): add support for PTP3
Add PTP3 drivers to protect CPU excessive voltage drop
in CPU heavy loading.

Change-Id: I7bd37912c32d5328ba0287fccc8409794bd19c1d
Signed-off-by: Elly Chiang <elly.chiang@mediatek.com>
2021-07-02 16:22:16 +08:00
Tinghan Shen 9ff8b8ca93 fix(plat/mediatek/mt8195): extend MMU region size
In mt8195 suspend/resume flow, ATF has to communicate with a subsys by
read/write the subsys registers. However, the register region of subsys
doesn't include in the MMU mapping region. It triggers MMU faults.

This patch extends the MMU region 0 size to cover all mt8195 HW modules.
This patch also remove MMU region 1 because region 0 covers region 1.

Change-Id: I3a186ed71d0d963b59ae55e27a6d27a01fe4f638
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
2021-07-02 16:22:16 +08:00
Daniel Boulby 1bc02c2e0f feat(spm): add Ivy partition to tb fw config
The partition layout description JSON file generated by TF-A tests
declares a fourth test partition called Ivy demonstrating the
implementation of a S-EL0 partition supported by a S-EL1 shim.

Change-Id: If8562acfc045d6496dfdb3df0524b3a069357f8e
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
2021-07-02 09:19:59 +01:00
Mark Dykes 365e0f7764 Merge changes from topic "st_fixes" into integration
* changes:
  fix(plat/st): correct IO compensation disabling
  fix(plat/st): correct BSEC error code management
  fix(drivers/st/pmic): missing error check
  fix(drivers/st/pmic): initialize i2c_state
  fix(drivers/st/clk): use correct return value
2021-07-01 17:23:30 +02:00
Mark Dykes 156a6e137c Merge "fix(drivers/mtd): macronix quad enable bit issue" into integration 2021-07-01 17:21:07 +02:00
Manish Pandey 800009756a Merge "docs: update maintainer entry for nxp platform code" into integration 2021-07-01 11:23:26 +02:00
Sandrine Bailleux 8d148183a7 Merge "refactor(measured boot): remove weak definition of plat_get_measured_boot_data()" into integration 2021-07-01 11:13:41 +02:00
Sandrine Bailleux c04cb15cfa refactor(measured boot): remove weak definition of plat_get_measured_boot_data()
Weak definitions are confusing and should be avoided if possible.
Thus, turn plat_get_measured_boot_data() into a strong definition that
platforms must provide (if they need measured boot).

We could have moved the old weak implementation under plat/common as a
sane, default implementation that platforms may pull in if it suits
them. However, this implementation right now simply measures BL2,
which is not enough to get a complete measured boot flow, so this
patch just removes it.

This change only affects the Arm FVP platform, as no other upstream
platform implements measured boot at the moment.

Change-Id: If8680a39ae0ef1044ee981315439d5e0c8461229
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-07-01 10:06:54 +02:00
Pankaj Gupta 75569c3092 docs: update maintainer entry for nxp platform code
Add maintainer entry for NXP platform code

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Idd5407b8a9c1aa50ba812b2b1a7ce45e8fac5027
2021-06-30 21:52:09 +01:00
Patrick Delaunay c25ff16ecf refactor(plat/st): add stm32image_io_setup
Add a generic function to setup the stm32image IO.

Change-Id: I0f7cf4a6030605037643f3119b809e0319d926af
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-30 17:07:10 +02:00
Yann Gautier 71693a6634 fix(plat/st): panic if boot interface is wrong
Add a panic() at the end of stm32mp_io_setup() if the boot interface
given in ROM code boot context is not supported.

Change-Id: I0d50f21a11231febd21041b6e63108cc3e6f4f0c
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-06-30 17:04:22 +02:00
Manish Pandey c1c14b3485 Merge "feat(plat/arm): enable PIE when RESET_TO_SP_MIN=1" into integration 2021-06-30 13:04:45 +02:00
Olivier Deprez 00aa63d104 Merge changes from topic "tc0_tfa_v25" into integration
* changes:
  fix(tc0): remove ffa and optee device tree node
  fix(tc0): set cactus-tertiary vcpu count to 1
  fix(tc0): change UUID to string format
2021-06-30 12:06:13 +02:00
Olivier Deprez 81a8b2da2c Merge "feat(sve): enable SVE for the secure world" into integration 2021-06-30 11:51:04 +02:00
Manish Pandey 204fd9913c Merge "errata: workaround for Cortex A77 errata 1791578" into integration 2021-06-29 22:44:29 +02:00