Commit Graph

54 Commits

Author SHA1 Message Date
Nicolas Le Bayon 243b61d15a gpio: stm32_gpio: do not mix error code types
Change-Id: I84f8a99be2dcdf7c51fbecdb324df8e2f32cc855
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-10-03 11:17:48 +02:00
Lionel Debieve 4bdb1a7a6a stm32mp1: add authentication support for stm32image
This commit adds authentication binary support for STM32MP1.
It prints the bootrom authentication result if signed
image is used and authenticates the next loaded STM32 images.
It also enables the dynamic translation table support
(PLAT_XLAT_TABLES_DYNAMIC) to use bootrom services.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iba706519e0dc6b6fae1f3dd498383351f0f75f51
2019-09-23 09:48:07 +00:00
Lionel Debieve f700423c1f bsec: move bsec_mode_is_closed_device() service to platform
This BSEC service is a platform specific service. Implementation
moved to the platform part.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I1f70ed48a446860498ed111acce01187568538c9
2019-09-20 23:21:10 +02:00
Lionel Debieve b1e0b11cc9 crypto: stm32_hash: Add HASH driver
The driver manages the HASH processor IP on STM32MP1

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I3b67c80c16d819f86b951dae29a6c465e51ad585
2019-09-20 23:21:10 +02:00
Yann Gautier ebf851ed34 stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver
The STM32 console driver was pre-pending '\r' before '\n'.
It is now managed by the framework with the flag:
CONSOLE_FLAG_TRANSLATE_CRLF.
Remove the code in driver, and add the flag for STM32MP1.

Change-Id: I5d0d5d5c4abee0b7dc11c2f8707b1b5cf10149ab
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-10 17:21:58 +02:00
Yann Gautier d9d803e0be mmc: stm32_sdmmc2: correctly manage block size
DBLOCKSIZE should be filled such as the data size is 2^DBLOCKSIZE.
Hence it is calculated with __builtin_ctz.

Change-Id: Id6b5ff9b594afc4fc523a388011beed307e6abd1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02 17:53:16 +02:00
Yann Gautier 2c2c9f1eb1 mmc: stm32_sdmmc2: manage max-frequency property from DT
If the max-frequency property is provided in the device tree mmc node,
it should be managed. The max allowed frequency will be the min between
this property value and what the card can support.

Change-Id: I885b676c3300d2670a0fe4c6ecab87758b5893ad
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02 17:53:14 +02:00
Yann Gautier 1e91952942 stm32mp1: move check_header() to common code
This function can be used on several stm32mp devices, it is then moved in
plat/st/common/stm32mp_common.c.

Change-Id: I862debe39604410f71a9ddc28713026362e9ecda
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02 17:52:55 +02:00
Yann Gautier 4b549b2153 stm32mp1: add support for LpDDR3
This change enables LpDDR3 initialization with PMIC.

Change-Id: I2409a808335dfacd69a8517cb8510cee98bb8161
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02 17:52:29 +02:00
Yann Gautier e463d3f43e stm32mp1: use a common function to check spinlock is available
To use spinlocks, MMU should be enabled, as well as data cache.
A common function is created (moved from clock file).
It is then used whenever a spinlock has to be taken, in BSEC and clock
drivers.

Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02 17:51:57 +02:00
Yann Gautier 6cb45f8984 clk: stm32mp: enable RTCAPB clock for dual-core chips
In order to correctly manage the bring-up of non boot CPUs, the RTCAPB
clock needs to be enabled.
It controls the access to backup registers, where the CPU entrypoint
will be stored.

Change-Id: Ifeeceb4faf64bc9e0778030444f437cc0bb27272
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2019-09-02 17:51:30 +02:00
Yann Gautier 73680c230f stm32mp1: add watchdog support
Introduce driver for STM32 IWDG peripheral (Independent Watchdog).
It is configured according to device tree content and should be enabled
from there.
The watchdog is not started by default. It can be started after an HW
reset if the dedicated OTP is fused.

The watchdog also needs to be frozen if a debugger is attached.
This is done by configuring the correct bits in DBGMCU.
This configuration is allowed by checking BSEC properties.

An increase of BL2 size is also required when adding this new code.

Change-Id: Ide7535d717885ce2f9c387cf17afd8b5607f3e7f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2019-09-02 17:25:08 +02:00
Yann Gautier f33b2433f5 stm32mp1: add general SYSCFG management
The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.

The SYSCFG driver is in charge of configuring masters on the interconnect,
IO compensation, low voltage boards, or pull-ups for boot pins.
All other configurations should be handled in Linux drivers requiring it.

Device tree files are also updated to manage vdd-supply regulator.

Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier dd98aec87c clk: stm32mp1: correctly handle Clock Spreading Generator
To activate the CSG option, the driver needs to set the bit2
of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator.
This bit should not be cleared when starting the PLL.

Change-Id: Ie5c720ff03655f27a7e7e9e7ccf8295dd046112f
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier d4151d2ff9 clk: stm32mp1: use defines for mask values in stm32mp1_clk_sel array
Rework the macro that eases the table definition: the src and msk fields
are now using MASK and SHIFT defines of each source register.
Some macros had then to be modified: _USART1_SEL, _ASS_SEL and _MSS_SEL to
_UART1_SEL, _AXIS_SEL, and _MCUS_SEL to match register fields.

Note: the mask for RCC_ASSCKSELR_AXISSRC is changed from 0x3 to 0x7
to reflect the size of the register field, even if there are only
3 possible clock sources.

The mask value is also corrected for QSPI and FMC clock selection.

Change-Id: I44114e3c1dd37b9fa1be1ba519611abd9a07764c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier f66358afee clk: stm32mp1: move oscillator functions to generic file
Those functions are generic for parsing nodes from device tree
hence could be located in generic source file.

The oscillators description structure is also moved to STM32MP1 clock
driver, as it is no more used in stm32mp1_clkfunc and cannot be in a
generic file.

Change-Id: I93ba74f4eea916440fef9b160d306af1b39f17c6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:51 +02:00
Yann Gautier e1abd5600b arch: add some defines for generic timer registers
Those defines are used in STM32MP1 clock driver.
It is better to put them altogether with already defined registers.

Change-Id: I6f8ad8c2477b947af6f76283a4ef5c40212d0027
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-06-17 14:03:16 +02:00
Ambroise Vincent be3991c0c3 Console: remove deprecated finish_console_register
The old version of the macro is deprecated.

Commit cc5859ca19 ("Multi-console: Deprecate the
`finish_console_register` macro") provides more details.

Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-04-03 14:55:18 +01:00
Yann Gautier b248bb4a74 mmc: stm32_sdmmc2: fill ocr_voltage
STM32MP1 SDMMC device voltage is 3.3V. We should then precise the 2 ranges
3.2 to 3.3V and 3.3 to 3.4V in ocr_voltage field.

Change-Id: I88e479f8f16bfe608a7808eace0df3fdec48deab
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-03-08 10:59:00 +01:00
Yann Gautier b053a22e8a stm32mp1: add minimal support for co-processor Cortex-M4
STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4.
The support for Cortex-M4 clocks is added when configuring the clock tree.
Some minimal security features to allow communications between A7 and M4
are also added.

Change-Id: I60417e244a476f60a2758f4969700b2684056665
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-02-20 17:34:21 +01:00
Yann Gautier 0d21680c35 stm32mp1: update clock driver
Remove useless private structure in function prototypes.
Add a reference counter on clocks.
Prepare for future secured/shared/non-secured clocks.

Change-Id: I3dbed81721da5ceff5e10b2c4155b1e340c036ee
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier 5202cb393d stm32mp1: add timeout detection in reset driver
This change makes the platform to panic in case of peripheral reset
resource malfunction.

Change-Id: I17eb9cb045b78a4e5142a8c33b744e84992d732a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier 7ae58c6ba7 stm32mp1: use functions to retrieve some peripheral addresses
PWR, RCC, DDRPHYC & DDRCTRL addresses can be retrieved from device tree.
Platform asserts the value read from the DT are the SoC addresses.

Change-Id: I43f0890b51918a30c87ac067d3780ab27a0f59de
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier 447b2b137d stm32mp1: split clkfunc code
Create a new file stm32mp_clkfunc.c to put functions that could be common
between several platforms.

Change-Id: Ica915c796b162b2345056b33328acc05035a242c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier d82d4ff066 stm32mp1: update I2C and PMIC drivers
Regulator configuration at boot takes more information from DT.
I2C configuration from DT is done in I2C driver.
I2C driver manages more transfer modes.
The min voltage of buck1 should also be increased to 1.2V,
else the platform does not boot.

Heavily modifies stm32_i2c.c since many functions move inside the source
file to remove redundant declarations.

Change-Id: I0bee5d776cf3ff15e687427cd6abc06ab237d025
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier dfdb057a17 stm32mp1: use new functions to manage timeouts
Remove the previously use function: get_timer, and use new functions
timeout_init_us and timeout_elapsed.

Change-Id: I4e95b123648bff7ca91e40462a2a3ae24cfe1697
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier e0a8ce5d0d stm32mp1: remove some dependencies on clocks and reset in drivers
Include all RCC, clocks and reset headers from stm32mp1_def.h
which if exported to the firmware through platform_def.h.
The same dependency removal is done in common code as well.
Some useless includes are also removed in stm32_sdmmc2 driver.

Change-Id: I731ea5775c3fdb7f7b0c388b93923ed5e84b8d3f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier 3f9c97842e stm32mp1: make functions and macros more common
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions
that can be used in drivers shared by different platforms.

Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier c9d75b3cf9 stm32mp1: split code between common and private parts
Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.

stm32mp_common.h is a common API aggregate.

Remove some casts where applicable.
Fix some types where applicable.
Remove also some platform includes that are already in stm32mp1_def.h.

Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2019-02-14 11:20:23 +01:00
Yann Gautier 88ef0425da stm32mp1: add BSEC driver
The BSEC (Boot and Security and OTP control) is intended to control an OTP
(one time programmable) fuse box, used for on-chip non-volatile storage
for device configuration and security parameters.

Change-Id: I38c44684c7b9c6a1f24ec0ae3fe99cec481d5a51
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2019-01-18 15:45:08 +01:00
Yann Gautier 1fc2130c5b stm32mp1: update device tree and gpio functions
Change fdt_check_status function to fdt_get_status.
Update GPIO defines.
Move some functions in gpio driver, instead of dt helper file.
Add GPIO bank helper functions.
Use only one status field in dt_node_info structure including both status
and secure status.

Change-Id: I34f93408dd4aac16ae722f564bc3f7d6ae978cf4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2019-01-18 15:45:08 +01:00
Yann Gautier 4156d4daa8 drivers: st: update drivers code
Reword some traces.
Use uintptr_t where required.
Reduce scope of variables.
Improve io_stm32image algo.
Complete some IP registers definitions.
Add failure on supported DDR (stm32mp1_ddr_init()).
Fix cache flush on cache disable (stm32mp1_ddr_setup).

Change-Id: Ie02fa71e02b9d69abc807fd5b7df233e5be6668c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-01-18 15:45:08 +01:00
Yann Gautier 077f682853 drivers: st: pmic: update stpmic1 driver
Change-Id: I4a1b281925e0a3a1e2a34b3e363537e4a7f13823
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2019-01-18 15:45:08 +01:00
Yann Gautier c948f77136 stm32mp1: update device tree files
The drivers are also updated to reflect the changes.
Set RCC as non-secure.

Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-01-18 15:45:08 +01:00
Yann Gautier 23684d0e81 stm32mp1: rename stpmu1 to stpmic1
This is the correct name of the IP.
Rename stm32mp1_pmic files to stm32mp_pmic.

Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-01-18 15:45:08 +01:00
Yann Gautier 435832abfd drivers: st: move i2c driver in its own folder
The driver could be used for other devices than PMIC.

Change-Id: I4569e7c0028e52e1ff2fe9d38f11de11e95d1897
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-01-18 15:45:08 +01:00
Yann Gautier 6e6ab282f7 stm32mp1: do not include platform header files directly in drivers
Instead, only platform_def.h is included.
The required files to be included are added in stm32mp1_def.h.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-01-07 11:17:24 +01:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Yann Gautier 1d7bcaa636 drivers: st: mmc: improve error cases in send_cmd function
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-12-04 10:38:41 +01:00
Yann Gautier 8b7a26d0d6 drivers: st: uart: remove old API
Now that MULTI_CONSOLE_API is enabled for the STM32MP1 platform,
we can remove the non MULTI_CONSOLE_API parts in the driver.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-11-15 11:52:32 +01:00
Yann Gautier 6d264afc9e drivers: st: update console driver to support MULTI_CONSOLE_API
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-11-15 11:30:01 +01:00
Yann Gautier 8244d2260d stm32mp1: add a new file for UART registers definition
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-11-15 11:30:01 +01:00
Yann Gautier 3e6fab4308 stm32mp1: correct some static analysis tools issues
These issues wer found by sparse:

drivers/st/clk/stm32mp1_clk.c:1524:19:
 warning: incorrect type in assignment (different base types)
    expected restricted fdt32_t const [usertype] *pkcs_cell
    got unsigned int const [usertype] *

plat/st/stm32mp1/plat_image_load.c:13:6:
 warning: symbol 'plat_flush_next_bl_params' was not declared.
 Should it be static?
plat/st/stm32mp1/plat_image_load.c:21:16:
 warning: symbol 'plat_get_bl_image_load_info' was not declared.
 Should it be static?
plat/st/stm32mp1/plat_image_load.c:29:13:
 warning: symbol 'plat_get_next_bl_params' was not declared.
 Should it be static?

plat/st/stm32mp1/bl2_io_storage.c:40:10:
 warning: symbol 'block_buffer' was not declared. Should it be static?

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-11-09 18:22:08 +01:00
Yann Gautier a3d39cc763 stm32mp1: add an IO to read MMC devices
Whereas the GPT table is read with io_block, the binaries to be loaded
(e.g. BL33) cannot use it, as it is not suitable to read them block by
block, or the boot time would be very bad.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-10-15 09:36:44 +02:00
Yann Gautier ceaff75c9f stm32mp1: add an IO to read STM32IMAGE binaries
This IO is required to read binaries with STM32 header.
This header is added with the stm32image tool.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-10-15 09:36:32 +02:00
Yann Gautier 8e2e5e8b18 stm32mp1: add sdmmc2 driver
This driver is for the STMicroelectronics sdmmc2 IP
which is in STM32MP1 SoC.
It uses the MMC framework, and can address either eMMC or SD-card.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-10-15 09:36:04 +02:00
Antonio Nino Diaz 39b6cc66d6 libc: Use printf and snprintf across codebase
tf_printf and tf_snprintf are now called printf and snprintf, so the
code needs to be updated.

Change-Id: Iffeee97afcd6328c4c2d30830d4923b964682d71
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-22 10:26:05 +01:00
Antonio Nino Diaz 6a23356c4f Replace stdio.h functions by TF functions
Functions provided by stdio.h such as printf and sprintf are available
in the codebase, but they add a lot of code to the final image if they
are used:

- AArch64: ~4KB
- AArch32: ~2KB in T32, ~3KB in A32

tf_printf and tf_snprintf are a lot more simple, but it is preferable
to use them when possible because they are also used in common code.

Change-Id: Id09fd2b486198fe3d79276e2c27931595b7ba60e
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-10 09:36:18 +01:00
Yann Gautier 10a511ceaa stm32mp1: Add DDR support and its security with TZC400
The DDR driver is under dual license, BSD and GPLv2.
The configuration parameters are taken from device tree.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:18:19 +02:00
Yann Gautier e4f559ff54 stm32mp1: Add PMIC support
If a PMIC companion chip is present on board, it has to be configured
for regulators supplies.
This check is done with board DT configuration.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Pascal Paillet <p.paillet@st.com>
2018-07-24 17:15:13 +02:00