Commit Graph

61 Commits

Author SHA1 Message Date
Sieu Mun Tang 49446866a5 feat(intel): support ECDH request
This command sends the request on generating a share secret on
Diffie-Hellman key exchange.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ic7c8470cf036ea8c17bf87401f49936950b3e1d6
2022-05-11 16:57:25 +08:00
Sieu Mun Tang 583050607e feat(intel): support ECDSA SHA-2 Data Signature Verification
This command support ECC based signature verification on a blob.
Supported ECC algorithm are NISP P-256, NISP P-384, Brainpool 256
and Brainpool 384.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I7f43d2a69bbe6693ec1bb90f32b817cf00f9f5ae
2022-05-11 16:57:23 +08:00
Sieu Mun Tang 07912da1b7 feat(intel): support ECDSA SHA-2 Data Signing
This command support ECC based signing on a blob. Supported ECC algorithm
are NISP P-256, NISP P-384, Brainpool 256 and Brainpool 384.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I82f95ddafa6b62f8cd882fce9a3e63e469c85067
2022-05-11 16:57:20 +08:00
Sieu Mun Tang d2fee94afa feat(intel): support ECDSA Get Public Key
To support the ECDSA feature and send the command
as a request to get the public key

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9d7bb5b6ab8ef7d4f3ceb21ff0068baf3175a1ac
2022-05-11 16:57:17 +08:00
Sieu Mun Tang 537ff05257 feat(intel): support session based SDOS encrypt and decrypt
Extends existing Secure Data Object Service (SDOS) encryption and
decryption mailbox command to include session id and context id. The
new format requires an opened crypto service session.

A separated SMC function ID is introduced for the new format and it is
only supported by Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I2627750e8337c1af66217e9cb45981a9e06e7d19
2022-05-11 16:57:13 +08:00
Sieu Mun Tang 6726390eb0 feat(intel): support AES Crypt Service
Enable Support for AES Crypt Service to send request
to encrypt or decrypt a blob. Command will send a memory
location that SDM will read and also memory location that
SDM will write back after encryption or decryption operation.
Response will be sent back after the crypto operation is done,
and data is written back to the destination

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I86ea4ff64dda2fbb1000591e30fa8cb2640ce954
2022-05-11 16:57:11 +08:00
Sieu Mun Tang c05ea29690 feat(intel): support HMAC SHA-2 MAC verify request
This command sends request on checking the integrity and authenticity
of a blob by comparing the calculated MAC with tagged MAC. The
comparison result will be returned in response.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ifefdf67f088d7612d2ec2459d71faf2ec8181222
2022-05-11 16:57:08 +08:00
Sieu Mun Tang 7e8249a2db feat(intel): support SHA-2 hash digest generation on a blob
This command is to request the SHA-2 hash digest on a blob.
If input has a key, the output shall be key-hash digest.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I08cb82d89a8e8f7bfe04f5f01e079ea49fe38cf5
2022-05-11 16:57:02 +08:00
Sieu Mun Tang 24f9dc8a43 feat(intel): support extended random number generation
The random number generation (RNG) mailbox command format
is updated to extends the support to upto 4080 bytes random
number generation. The new RNG format requires an opened
crypto service session.

A separated SMC function ID is introduced for the new RNG
format and it is only supported by Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I3f044a3c01ff7cb50be4705e2c1f982bf6f61432
2022-05-11 16:56:45 +08:00
Sieu Mun Tang 342a0618c7 feat(intel): support crypto service key operation
Support crypto service key operation mailbox commands through SMC.

Crypto service key operation begin by sending an open crypto service
session request to SDM firmware. Once successfully open the session,
send crypto service key management commands (import, export, remove
and get key info) with the associated session id to SDM firmware.
The crypto service key is required before perform any crypto service
(encryption, signing, etc). Last, close the session after finishes
crypto service. All crypto service keys associated with this session
will be erased by SDM firmware.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I02406533f38b9607eb1ec7e1395b9dc2d084a9e3
2022-05-11 10:06:41 +08:00
Sieu Mun Tang 6dc00c24ab feat(intel): support crypto service session
Support crypto service open and close session mailbox commands through
SMC.

Crypto service support begin by sending an open crypto service session
request to SDM firmware. Last, close the session after finishes crypto
service. All crypto service parameters with this session will be erased
by SDM firmware.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I48968498bbd6f2e71791f4ed38dd5f369e171082
2022-05-11 10:06:37 +08:00
Sieu Mun Tang 581182c191 feat(intel): extend attestation service to Agilex family
This patch extends the functionality of FPGA Crypto Services (FCS) to
support FPGA Attestation feature in Agilex device.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I3c2e29d2fa04d394e9f65d8143d7f4e57389cd02
2022-05-11 10:06:32 +08:00
Sieu Mun Tang 651841f201 fix(intel): introduce a generic response error code
This patch will introduce a generic error code (0x3ff)
to be used in case where Secure Device Manager (SDM)
mailbox request is not failing (returns OK with no error
code) but BL31 instead wants to return error/reject
to the calling software. This value aligns with generic
error code implemented in SDM for consistency.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9894c7df8897fff9aa80970940a6f3f6bfa30bb7
2022-05-11 10:03:31 +08:00
Sieu Mun Tang 4837a64093 fix(intel): allow non-secure access to FPGA Crypto Services (FCS)
Allows non-secure software to access FPGA Crypto Services (FCS)
through secure monitor calls (SMC).

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I805b3f650abf5e118e2c55e469866d5d0ca68048
2022-05-11 10:02:46 +08:00
Sieu Mun Tang 7facacec63 feat(intel): single certificate feature enablement
Extend the functionality of FPGA Crypto Service
(FCS) to support FPGA single certificate feature
so that the counter value can be updated with
only one preauthorized certificate

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibde87e4ee46367cf7f27f7bb0172838ab8766340
2022-05-11 10:01:54 +08:00
Sieu Mun Tang d17408316d feat(intel): initial commit for attestation service
This is to extend the functionality of FPGA Crypto Service (FCS)
to support FPGA Attestation feature in Stratix 10 device.

Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ib15783383dc9a06a2f0dc6dc1786f44b89f32cb1
2022-05-11 09:59:55 +08:00
Sieu Mun Tang 02d3ef333d fix(intel): update encryption and decryption command logic
This change is to re-align HPS cryption logic with
underlying Secure Device Manager's (SDM) mailbox API.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I8fc90982d3cddceaf401c1a112ff8e20861bf4c5
2022-05-11 09:49:25 +08:00
Sieu Mun Tang 11f4f03043 feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge
This adds F2S and S2F bridge enable, disable and reset
sequence to enable, disable and reset properly the bridges
in SMC call or during reset.

The reset is also maskable as the SMC from uboot can
pass in the bridge mask when requesting for bridge
enable or disable.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ie144518c591664ef880016c9b3706968411bbf21
2022-05-05 22:58:03 +08:00
Kris Chaplin 52cf9c2cd4 feat(intel): add SMC support for HWMON voltage and temp sensor
Add support to read temperature and voltage using SMC command

Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I806611610043906b720b5096728a5deb5d652b1d
2022-04-28 22:46:56 +08:00
Sieu Mun Tang 93a5b97ec9 feat(intel): add SMC support for Get USERCODE
This patch adds SMC support for enquiring FPGA's User Code.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I82c1fa9390b6f7509b2284d51e199fb8b6a9b1ad
2022-04-28 22:45:26 +08:00
Sieu Mun Tang c026dfe38c fix(intel): extend SDM command to return the SDM firmware version
Updates intel_smc_fw_version function to read SDM
firmware version in major/minor ACDS release number.
Update CONFIG_STATUS Response Data [1] bit0-23.

Return INTEL_SIP_SMC_STATUS_ERROR if unexpected
firmware version is being retrieved.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I018ccbb961786a75dc6eb873b0f232e71341e1d2
2022-04-28 22:44:27 +08:00
Abdul Halim, Muhammad Hadi Asyrafi c34b2a7a1a feat(intel): add SMC for enquiring firmware version
This command allows non-secure world software to enquire the
version of currently running Secure Device Manager (SDM) firmware.

This will be useful in maintaining backward-compatibility as well
as ensuring software cross-compabitility.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ibc23734d1135db74423da5e29655f9d32472a3b0
2022-04-28 22:44:21 +08:00
Abdul Halim, Muhammad Hadi Asyrafi e40910e2dc fix(intel): configuration status based on start request
Configuration status command now returns the result based on the last
config start command made to the runtime software. The status type can
be either:
- NO_REQUEST (default)
- RECONFIGURATION
- BITSTREAM_AUTH

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I97406abe09b49b9d9a5b43e62fe09eb23c729bff
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-04-28 22:44:14 +08:00
Sieu Mun Tang 276a43663e fix(intel): bit-wise configuration flag handling
Change configuration type handling to bit-wise flag. This is to align
with Linux's FPGA Manager definitions and promotes better compatibility.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I5aaf91d3fec538fe3f4fe8395d9adb47ec969434
2022-04-28 22:40:58 +08:00
Abdul Halim, Muhammad Hadi Asyrafi e0fc2d1907 fix(intel): use macro as return value
SMC function should strictly return INTEL_SIP_SMC_STATUS macro. Directly
returning value of variable status might cause confusion in calling
software.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Iea17f4feaa5c917e8b995471f3019dba6ea8dcd3
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-04-28 22:29:23 +08:00
Abdul Halim, Muhammad Hadi Asyrafi ef51b097bf fix(intel): fix fpga config write return mechanism
This revert commit 279c8015fefcb544eb311b9052f417fc02ab84aa.
The previous change breaks this feature compatibility with Linux driver.
Hence, the fix for the earlier issue is going to be fixed in uboot instead.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I93220243bad65ed53322050d990544c7df4ce66b
2022-04-28 22:25:05 +08:00
Sieu Mun Tang 984e236e0d feat(intel): add SiP service for DCMF status
This patch adds 2 additional RSU SiP services for Intel SoCFPGA
platforms:
- INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS stores current DCMF status in
  BL31
- INTEL_SIP_SMC_RSU_DCMF_STATUS is calling function for non-secure
  software to retrieve stored DCMF status

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ic7a3e6988c71ad4bf66c58a1d669956524dfdf11
2022-04-28 22:21:01 +08:00
Chee Hong Ang 4c26957be2 feat(intel): add RSU 'Max Retry' SiP SMC services
Add SiP SMC services to store/retrieve 'Max Retry' counter
for Remote System Update (RSU).

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I17c1f0107ead64e6160954d26407f399003bcbd9
2022-04-28 22:14:34 +08:00
Abdul Halim, Muhammad Hadi Asyrafi b7f3044e87 feat(intel): enable SMC SoC FPGA bridges enable/disable
Enable SoC FPGA bridges enable/disable from non-secure world
through secure monitor calls

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4474abab9731923a61ff0e7eb2c2fa32048001cb
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2022-04-28 19:50:01 +08:00
Chee Hong Ang 44eb782e15 feat(intel): add SMC/PSCI services for DCMF version support
Support get/store RSU DCMF version:
INTEL_SIP_SMC_RSU_DCMF_VERSION - Get current DCMF version
INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION - Store current DCMF version

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I85ffbc0efc859736899d4812f040fd7be17c8d8d
2022-04-28 19:23:48 +08:00
Siew Chin Lim 7e954dfc2b feat(intel): allow to access all register addresses if DEBUG=1
Allow to access all register addresses from SMC call if compile the code
with DEBUG=1 for debugging purpose.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Idd31827fb71307efbdbcceeaa05f6cb072842e10
2022-04-28 19:22:06 +08:00
Abdul Halim, Muhammad Hadi Asyrafi ec4f28ecec fix(intel): modify how configuration type is handled
This patch creates macros to handle different configuration
types. These changes will help in adding new configuration
types in the future.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I5826a8e5942228a9ed376212f0df43b1605c0199
2022-04-28 19:08:41 +08:00
Sieu Mun Tang f0c40b897f feat(intel): support SiP SVC version
This command supports to return SiP SVC major and minor version.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: Ia8bf678b8de0278aeaae748f24bdd05f8c9f9b47
2022-04-28 19:08:38 +08:00
Sieu Mun Tang 77902fca8f feat(intel): add SMC support for ROM Patch SHA384 mailbox
HSD #16014059592:
Add support for ROM Patch SHA384 mailbox SMC call.

Signed-off-by: Kris Chaplin <kris.chaplin@linux.intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: Ide9a7af41a089980745cb7216a9bf85e7fbd84e3
2022-04-05 14:23:26 +08:00
Sieu Mun Tang c703d752cc fix(intel): fix ECC Double Bit Error handling
SError and Abort are handled in Linux (EL1) instead of
EL3. This patch adds some functionality that complements the
use cases by Linux as follows:

- Provide SMC for ECC DBE notification to EL3
- Determine type of reset needed and service the request in
  place of Linux

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I43d02c77f28004a31770be53599a5a42de412211
2022-03-09 09:14:16 +08:00
Sieu Mun Tang 286b96f4bb build(intel): initial commit for crypto driver
This patch adds driver for Intel FPGA's Crypto Services.
These services are provided by Intel platform
Secure Device Manager(SDM) and are made accessible by
processor components (ie ATF).
Below is the list of enabled features:
- Send SDM certificates
- Efuse provision data dump
- Encryption/decryption service
- Hardware IP random number generator

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: If7604cd1cacf27a38a9a29ec6b85b07385e1ea26
2022-03-09 09:13:20 +08:00
Sieu Mun Tang a250c04b0c fix(intel): null pointer handling for resp_len
Previous changes from commit #6a659448 updates resp_len from an integer
type to unsigned integer pointer type. This patch adds proper handling
in case resp_len is a null pointer. Resp_len with value 0 are also
changed to NULL to match the type change.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I75b3e3bfbb188d8e7b329ba3b948c23e31dec490
2022-02-23 16:30:30 +08:00
Sieu Mun Tang 108514ff71 fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return
mailbox status and the argument's length back to the caller

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Change-Id: I50d2ae74845794cab7bf0858e742b5a70e0ea868
2022-02-23 16:29:12 +08:00
Siew Chin Lim c9c070994c fix(intel): fix bit masking issue in intel_secure_reg_update
intel_secure_reg_update function should apply mask to the value before
write into register.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I84bbd06e24b8666528b53030e8359743d438eb5b
2022-02-23 16:28:59 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 12d71ac662 fix(intel): fix ddr address range checker
This patch fix address range checker to make sure that it does not
errors out on NULL address with size 0. Non-secure software will send
this NULL address if the SMC call doesn't need to pass any address buffer.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I7e492c562a311ba989570c4ed465f845333ec865
2022-02-23 16:28:56 +08:00
Abdul Halim, Muhammad Hadi Asyrafi d57318b7c9 intel: common: Fix non-MISRA compliant code v2
This patch is used to fix remaining non compliant code for Intel
SoCFPGA's mailbox and sip driver. These changes include:
- Change non-interface required uint32_t into unsigned int
- Change non-negative variable to unsigned int
- Remove obsolete variable initialization to 0

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I3a16c7621a5fc75eb614d97d72e44c86e7d53bf5
2020-10-27 11:21:00 +08:00
Abdul Halim, Muhammad Hadi Asyrafi aad868b4d9 intel: common: Change how mailbox handles job id & buffer
This patch modifies several basic mailbox driver features to prepare for
FCS enablement:
- Job id management for asynchronous response
- SDM command buffer full

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I78168dfb6c521d70d9cba187356b7a3c8e9b62d2
2020-10-27 11:17:34 +08:00
Abdul Halim, Muhammad Hadi Asyrafi d191eb247a intel: common: Remove urgent from mailbox async
Remove urgent argument from asynchrounous mailbox command as any urgent
command should always be synchronous

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Iaa64335db24df3a562470d0d1c3d6a3a71493319
2020-10-24 11:00:42 +08:00
Abdul Halim, Muhammad Hadi Asyrafi f8e6a09c64 intel: common: Improve mailbox driver readability
Use pre-defined macros for return values and common mailbox arguments

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I5d549ee5358aebadf909f79fda55e83ee9844a0e
2020-10-24 11:00:42 +08:00
Sandrine Bailleux 8f74c884a7 Merge "intel: Fix argument type for mailbox driver" into integration 2020-02-28 10:23:10 +00:00
Abdul Halim, Muhammad Hadi Asyrafi 960896eb89 intel: Update RSU driver return code
Modify RSU driver error code for backward-compatibility with
Linux RSU driver

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib9e38d4017efe35d3aceeee27dce451fbd429fb5
2020-02-27 20:25:58 +08:00
Abdul Halim, Muhammad Hadi Asyrafi ea9b962776 intel: Fix argument type for mailbox driver
This patch comes as fixes for 'intel: Fix Coverity Scan Defects' patch.
Revert changing argument type from uint32_t to uint64_t to fix
incompatible cast issue. Fix said bug by using intermediate uint32_t
array as a more appropriate solution.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I344cdabd432cf0a0389b225c934b35d12f4c631d
2020-02-25 16:41:47 +08:00
Abdul Halim, Muhammad Hadi Asyrafi a62b47b87a intel: Fix Coverity Scan Defects
Fix mailbox driver incompatible cast bug and control flow issue that
was flagged by Coverity Scan.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I3f34e98d24e40139d31cf7d5b9b973cd2d981065
2020-02-20 13:56:35 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 1a87db5d11 intel: Include address range check for SiP Mailbox
This patch modify current address range checker in SiP driver to also
accept input size.
Also, include said checker for SiP mailbox send command to ensure
referenced argument is within expected address.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ie0c3cac4c3d1a6ea0194602d9aa3541f5d9a3367
2020-02-07 14:55:06 +08:00
Hadi Asyrafi 0c5d62ad7f intel: Introduce SMC support for mailbox command
This update allows normal world to send mailbox commands through SMC

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I587bea06422da90e5907d586495cd9e3bde900f6
2020-02-05 16:26:15 +08:00