Commit Graph

10379 Commits

Author SHA1 Message Date
Bipin Ravi 2d972cc9c1 docs(security): security advisory for CVE-2022-23960
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I17b0847ff71e4a291bf7ba41fd71fe08c400b5e8
2022-03-08 13:33:53 -06:00
Madhukar Pappireddy 4cb2ec2ad2 Merge changes I18d47384,Icc3c7424,I73f20d82,I07325644,Iff10ad26, ... into integration
* changes:
  fix(zynqmp): query node status to power up APU
  feat(zynqmp): pm_api_clock_get_num_clocks cleanup
  feat(zynqmp): add feature check support
  fix(zynqmp): use common interface for eemi apis
  feat(zynqmp): add support to get info of xilfpga
  feat(zynqmp): pass ioctl calls to firmware
2022-03-08 16:29:49 +01:00
Madhukar Pappireddy 95cfac5a9a Merge "fix(st-pmic): add static const to pmic_ops" into integration 2022-03-08 16:03:01 +01:00
Yann Gautier 57e6018305 fix(st-pmic): add static const to pmic_ops
The static was found by sparse tool:
drivers/st/pmic/stm32mp_pmic.c:456:18: warning: symbol 'pmic_ops'
 was not declared. Should it be static?
The const was also missing.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibb5cfaf67ac980bf0af27712a95dbef05b617c25
2022-03-08 13:18:09 +01:00
Bipin Ravi af68314ddc Merge "refactor(mbedtls): allow platform to specify their config file" into integration 2022-03-07 21:40:26 +01:00
Madhukar Pappireddy 1cfe48963f Merge "docs(maintainers): add maintained files for MediaTek SoCs" into integration 2022-03-07 18:46:39 +01:00
Madhukar Pappireddy f083fe4abb Merge "fix(versal): fix the incorrect log message" into integration 2022-03-07 16:05:21 +01:00
Venkatesh Yadav Abbarapu ea04b3fe18 fix(versal): fix the incorrect log message
When the atf-handoff-params are updated we are returning
FSBL_HANDOFF_SUCCESS, but the return condition is wrongly
updated and added a error log which is incorrect.
Fixing the incorrect log message.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I44ebbb861831b86afcb87f09ddb2e23614393c28
2022-03-06 21:09:23 -07:00
Madhukar Pappireddy c507b06007 Merge "fix(st-clock): initialize pllcfg table" into integration 2022-03-06 01:24:17 +01:00
Madhukar Pappireddy 8dec6481c3 Merge changes from topic "st-uart-baudrate" into integration
* changes:
  refactor(st): configure UART baudrate
  docs(stm32mp1): document some compilation flags
  feat(st-uart): manage oversampling by 8
  fix(st-uart): correctly fill BRR register
2022-03-06 01:23:23 +01:00
Yann Gautier 99887cb904 refactor(st): configure UART baudrate
Add the possibility to configure console UART baudrate, it can be passed
as a command line parameter with STM32MP_UART_BAUDRATE. The default value
remains 115200.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I000df70c10b2b4dac1449556596f9820c36cf243
2022-03-04 14:55:18 +01:00
Yann Gautier 975cf6ff51 docs(stm32mp1): document some compilation flags
Add missing serial boot devices flags.
Add optional compilation flags, and their defauld values.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I507f7110bcd7b9af136a6fc6b8af342b084c8dbc
2022-03-04 14:55:18 +01:00
Yann Gautier 1f60d1bd33 feat(st-uart): manage oversampling by 8
UART oversampling by 8 allows higher baud rates for UART. This is
required when (UART freq / baudrate) <= 16. In this case the OVER8 bit
needs to be enabled in CR1 register. And the BRR register management is
different:
USARTDIV = (2 * UART freq / baudrate) (with div round nearest)
BRR[15:4] = USARTDIV[15:4]
BRR[3] = 0
BRR[2:0] = USARTDIV[3:0] >> 1

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ia3fbeeb73a36a4dc485c7ba428c531e65b6f6c09
2022-03-04 14:55:18 +01:00
Yann Gautier af7775ab53 fix(st-uart): correctly fill BRR register
To get the nearest divisor for BRR register, we use:
Divisor =  (Uart clock + (baudrate / 2)) / baudrate
But lsl was wrongly used instead of lsr to have the division by 2.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iedcc3ccdb4cf8268012e82a66df2a9ec48fc1d79
2022-03-04 14:55:18 +01:00
Yann Gautier 175758b277 fix(st-clock): initialize pllcfg table
The issue was found by Coverity:
CID 376582:    (UNINIT)
    Using uninitialized value "*pllcfg[_PLL4]" when calling
    "stm32mp1_check_pll_conf".
CID 376582:    (UNINIT)
    Using uninitialized value "*pllcfg[_PLL3]" when calling
    "stm32mp1_check_pll_conf".

Check PLL configs are valid before using pllcfg.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I49de849eaf451d0c165a8eb8555112a0a4140bbc
2022-03-04 13:48:53 +01:00
Olivier Deprez b298d4df5e Merge "feat(ff-a): forward FFA_VERSION from SPMD to SPMC" into integration 2022-03-04 13:22:45 +01:00
Rex-BC Chen 44cf2b1abb docs(maintainers): add maintained files for MediaTek SoCs
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I2d71b2fef2f2aee507a6e7c4b9b9d8175446a0ca
2022-03-04 14:42:02 +08:00
Manish Pandey a7ef8b31ce Merge "feat(mt8186): disable 26MHz clock while suspending" into integration 2022-03-03 13:57:27 +01:00
Ravi Patel b35b556718 fix(zynqmp): query node status to power up APU
If APU is in suspending state and if wakeup request comes then
PMUFW returns error which is not handled at ATF side.

To fix this, get the APU node status before calling wakeup and
return error if found in suspending state.

Here, we can not handle the error code of pm_req_wakeup() from PMUFW
because ATF is already calling pm_client_wakeup() before calling
pm_req_wakeup().

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I18d47384e46e22ae49e804093ad0641b7a6349e2
2022-03-02 22:10:57 -08:00
Michal Simek e682d38b56 feat(zynqmp): pm_api_clock_get_num_clocks cleanup
There is no reason to have even one additional useless line that's why
remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Icc3c74249dfe64173aa5c88fb0f9ffe7576fc2aa
2022-03-02 22:10:49 -08:00
Ronak Jain 223a6284b8 feat(zynqmp): add feature check support
This API returns version of supported APIs.

Here, there are three cases to check API version by using feature
check implementation.

1. Completely implemented in TF-A: I mean the EEMI APIs which are
completely implemented in the TF-A only. So check those IDs and
return appropriate version for the same. Right now, it is base
version.

2. Completely implemented in firmware: I mean the EEMI APIs which are
completely implemented in the firmware only. Here, TF-A only passes
Linux request to the firmware to get the version of supported API. So
check those IDs and send request to firmware to get the version and
return to Linux if the version is supported or return the error code
if the feature is not supported.

3. Partially implemented (Implemented in TF-A and firmware both):
First check dependent EEMI API version with the expected version in
the TF-A. If the dependent EEMI API is supported in firmware then
return its version and check with the expected version in the TF-A.
If the version matches then check for the actual requested EEMI API
version. If the version is supported then return version of API
implemented in TF-A.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I73f20d8222c518df1cda7879548b408b130b5b2e
2022-03-02 22:10:26 -08:00
Ronak Jain a469c1e1f4 fix(zynqmp): use common interface for eemi apis
Currently all EEMI API has its own implementation in TF-A which is
redundant. Most EEMI API implementation in TF-A does same work. It
prepares payload received from kernel, sends payload to firmware,
receives response from firmware and send response back to kernel.

So use common interface for EEMI APIs which has similar functionality.
This will optimize TF-A code.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I07325644a1fae80211f2588d5807c21973f6d48f
2022-03-02 22:10:11 -08:00
Nava kishore Manne cc077c2227 feat(zynqmp): add support to get info of xilfpga
Adds support to get the xilfpga library version and feature list info.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Iff10ad2628a6a90230c18dc3aebf9dde89f53ecd
2022-03-02 22:10:04 -08:00
Rajan Vaja 76ff8c459e feat(zynqmp): pass ioctl calls to firmware
Firmware supports new IOCTL for different purposes. To avoid
maintaining new IOCTL IDs in ATF, pass IOCTL call to firmware
for IOCTL IDs implemented in firmware.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Ie14697c8da9581b0f695f4d33f05161ece558385
2022-03-02 22:09:33 -08:00
Madhukar Pappireddy cf86fa1bfa Merge "feat(zynqmp): increase the max xlat tables when debug build is enabled" into integration 2022-03-02 19:28:13 +01:00
Madhukar Pappireddy f87fb0aca3 Merge "feat(versal): remove the time stamp configuration" into integration 2022-03-02 18:30:48 +01:00
Madhukar Pappireddy 3f7c88617a Merge "docs(rme): minor update to 4 world execution instructions" into integration 2022-03-02 16:53:53 +01:00
Manish Pandey 1dd4bafb82 docs(rme): minor update to 4 world execution instructions
Following updates done
  - Clarification on building Hafnium
  - New test suite "Invalid memory access"

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I04a934a648d53a860f06cd6cf3776ee534675bd9
2022-03-02 14:07:39 +00:00
Venkatesh Yadav Abbarapu 4c4b9615b1 feat(zynqmp): increase the max xlat tables when debug build is enabled
Update the MAX_XLAT_TABLES as the memory map has been
added for the dtb to accomodate in DDR address.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I46225673f40f123cdab38efefb038604da119b58
2022-03-02 02:25:14 -07:00
Venkatesh Yadav Abbarapu 18e2a79f8a feat(versal): remove the time stamp configuration
Remove the time stamp and system counter configuration, as
this configuration is already done by the first stage bootloader.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I41554dc2e14d97954bff299df9740a5efa30fad9
2022-03-01 21:20:21 -07:00
Madhukar Pappireddy df4520c6f0 Merge "fix(ufs): don't zero out buf before ufs read" into integration 2022-03-01 22:58:55 +01:00
Manish V Badarkhe 033f61370a refactor(mbedtls): allow platform to specify their config file
Common mbedTLS implementation include the fixed configuration
file of mbedTLS and that does not gives flexilibility to the
platform to include their own mbedTLS configuration.
Hence changes are done so that platform can include their own
mbedTLS configuration file.

Signed-off-by: Lucian Paul-Trifu <lucian.paul-trifu@arm.com>
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I04546589f67299e26b0a6a6e151cdf1fdb302607
2022-03-01 19:08:11 +01:00
Channa Kadabi 2ef6b8d378 fix(ufs): don't zero out buf before ufs read
ufs_read_blocks always zeros out the buffer before passing
to UFS for DMA. We don't need to zero out buf before reading
from UFS storage, this change remove the memset in ufs_read_blocks.

Signed-off-by: Channa Kadabi <kadabi@google.com>
Change-Id: I8029a7ea07fbd8cce29b383c80a3cfc782c5b7ec
2022-03-01 08:28:30 -08:00
Manish Pandey c73cb40033 Merge "feat(plat/zynqmp): fix section `coherent_ram' will not fit in region `RAM'" into integration 2022-03-01 14:58:41 +01:00
Madhukar Pappireddy a78c6c9666 Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration 2022-02-28 20:36:30 +01:00
Manish Pandey a8e06f040b Merge changes from topic "st-fix-enum" into integration
* changes:
  fix(stm32mp1): fix enum prints
  fix(st-clock): print enums as unsigned
2022-02-28 18:30:38 +01:00
Yann Gautier ceab2fc344 fix(stm32mp1): fix enum prints
With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. But the current version of
compiler used in CI states that this parameter is signed. Just cast the
value then.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic0655e5ba9c44fe6abcd9958d7a9972f5de3b7ef
2022-02-28 17:20:06 +01:00
Madhukar Pappireddy f83de3bba3 Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration
* changes:
  fix(intel): null pointer handling for resp_len
  fix(intel): define macros to handle buffer entries
  fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
  fix(intel): always set doorbell to SDM after sending command
  fix(intel): fix bit masking issue in intel_secure_reg_update
  fix(intel): fix ddr address range checker
  build(changelog): add new scope for Intel platform
2022-02-28 17:18:39 +01:00
Madhukar Pappireddy b5d2b4d532 Merge "fix(intel): enable HPS QSPI access by default" into integration 2022-02-28 16:37:06 +01:00
Yann Gautier 9fa9a0c55c fix(st-clock): print enums as unsigned
With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. Change %d to %u for several
lines in the clock driver.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ia2d24e6feef5e852e0a6bfaa1286fe605f9a16b7
2022-02-28 11:36:00 +01:00
Sandrine Bailleux 92537e170d Merge "fix(measured-boot): add RMM entry to event_log_metadata" into integration 2022-02-28 10:39:59 +01:00
Manish Pandey 0446bda15c Merge "fix(cert_create): let distclean Makefile target remove the cert_create tool" into integration 2022-02-25 14:52:23 +01:00
Nicolas Boulenguez e15591aaf4 fix(cert_create): let distclean Makefile target remove the cert_create tool
For some targets, Make recursively invokes itself in subdirectories.
When delegating the distclean target to tools/cert_create/Makefile,
the submake is called with the clean target instead of realclean.
Because of this, the submake never removes the cert_create executable.

A proper but more intrusive fix would
* avoid confusion about the semantics by following traditions or using
  new names
  https://www.gnu.org/prep/standards/standards.html#Standard-Targets
* avoid typing errors with the special $@ variable.
Something like:

In tools/cert_create/Makefile:
mostlyclean:
  # Remove most objects but keep some results.
        $(call SHELL_DELETE_ALL, src/build_msg.o ${OBJECTS})
clean: mostlyclean
  # mostlyclean, then remove things built by Make.
        $(call SHELL_DELETE,${BINARY})
distclean: clean
  # clean, then remove things built by ./configure (none here).
realclean maintainer-clean: distclean
  # distclean, then remove things built by autootols (none here).

In Makefile:
mostlyclean clean distclean realclean maintainer-clean:
	$(MAKE) -C subdir1 $@
	$(MAKE) -C subdir2 $@

Signed-off-by: Nicolas Boulenguez <nicolas@debian.org>
Change-Id: Iabfeca3da5724ab90a56ad6dcd6870d0a1d6b07f
2022-02-25 12:55:12 +00:00
Bipin Ravi 8a34299289 Merge changes I1784d643,Icb6e3699,I7805756e into integration
* changes:
  fix(errata): workaround for Cortex-A510 erratum 2172148
  fix(errata): workaround for Cortex-A510 erratum 2218950
  fix(errata): workaround for Cortex-A510 erratum 2250311
2022-02-25 04:50:31 +01:00
johpow01 c0959d2c46 fix(errata): workaround for Cortex-A510 erratum 2172148
Cortex-A510 erratum 2172148 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I1784d643ca3d1d448340cd421facb5f229df1d22
2022-02-24 22:31:52 +01:00
johpow01 cc79018b71 fix(errata): workaround for Cortex-A510 erratum 2218950
Cortex-A510 erratum 2218950 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Icb6e369946f8978a08cf8ed5e4452782efb0a77a
2022-02-24 22:31:47 +01:00
johpow01 7f304b02a8 fix(errata): workaround for Cortex-A510 erratum 2250311
Cortex-A510 erratum 2250311 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0 and is fixed in r1p1.

This erratum workaround is a bit different because it interacts with a
feature supported in TFA. The typical method of implementing an errata
workaround will not work in this case as the MPMM feature would just be
re-enabled by context management at every core power on after being
disabled by the errata framework. So in addition to disabling MPMM, this
workaround also sets a flag in the MPMM runtime framework indicating
that the feature should not be enabled even if ENABLE_MPMM=1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7805756e65ec90b6ef8af47e200617c9e07a3a7e
2022-02-24 23:30:41 +02:00
Bipin Ravi 510155aa74 Merge changes I7b1498fa,I1d2ebee3,I875519ff,I8c427ef2 into integration
* changes:
  fix(errata): workaround for Cortex-A510 erratum 2041909
  fix(errata): workaround for Cortex-A510 erratum 2042739
  fix(errata): workaround for Cortex-A510 erratum 2288014
  fix(errata): workaround for Cortex-A510 erratum 1922240
2022-02-24 20:47:47 +01:00
Soby Mathew 913e0334f9 Merge "docs(el3-runtimes): context management refactor proposal" into integration 2022-02-24 15:23:44 +01:00
jason-ch chen 9457cec8c0 feat(mt8186): disable 26MHz clock while suspending
Change resource_req to 0 to disable 26MHz clock.
SPM firmware will pull-down SRCLKENA0 after 26MHz off while suspending.

TEST=verify 26MHz clock off using the oscilloscope.
BUG=b:215639203

Signed-off-by: Jason-ch Chen <jason-ch.chen@mediatek.com>
Change-Id: I05702d14a015cabccd6d4af0e3f2a534fbe4dd12
2022-02-24 15:56:50 +08:00