Commit Graph

9019 Commits

Author SHA1 Message Date
Manish Pandey 800009756a Merge "docs: update maintainer entry for nxp platform code" into integration 2021-07-01 11:23:26 +02:00
Sandrine Bailleux 8d148183a7 Merge "refactor(measured boot): remove weak definition of plat_get_measured_boot_data()" into integration 2021-07-01 11:13:41 +02:00
Sandrine Bailleux c04cb15cfa refactor(measured boot): remove weak definition of plat_get_measured_boot_data()
Weak definitions are confusing and should be avoided if possible.
Thus, turn plat_get_measured_boot_data() into a strong definition that
platforms must provide (if they need measured boot).

We could have moved the old weak implementation under plat/common as a
sane, default implementation that platforms may pull in if it suits
them. However, this implementation right now simply measures BL2,
which is not enough to get a complete measured boot flow, so this
patch just removes it.

This change only affects the Arm FVP platform, as no other upstream
platform implements measured boot at the moment.

Change-Id: If8680a39ae0ef1044ee981315439d5e0c8461229
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-07-01 10:06:54 +02:00
Pankaj Gupta 75569c3092 docs: update maintainer entry for nxp platform code
Add maintainer entry for NXP platform code

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Idd5407b8a9c1aa50ba812b2b1a7ce45e8fac5027
2021-06-30 21:52:09 +01:00
Manish Pandey c1c14b3485 Merge "feat(plat/arm): enable PIE when RESET_TO_SP_MIN=1" into integration 2021-06-30 13:04:45 +02:00
Olivier Deprez 00aa63d104 Merge changes from topic "tc0_tfa_v25" into integration
* changes:
  fix(tc0): remove ffa and optee device tree node
  fix(tc0): set cactus-tertiary vcpu count to 1
  fix(tc0): change UUID to string format
2021-06-30 12:06:13 +02:00
Olivier Deprez 81a8b2da2c Merge "feat(sve): enable SVE for the secure world" into integration 2021-06-30 11:51:04 +02:00
Manish Pandey 204fd9913c Merge "errata: workaround for Cortex A77 errata 1791578" into integration 2021-06-29 22:44:29 +02:00
Manish Pandey 7285fd5f9a feat(plat/arm): enable PIE when RESET_TO_SP_MIN=1
For Arm platforms PIE is enabled when RESET_TO_BL31=1 in aarch64 mode on
the similar lines enable PIE when RESET_TO_SP_MIN=1 in aarch32 mode.
The underlying changes for enabling PIE in aarch32 is submitted in
commit 4324a14bf

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib8bb860198b3f97cdc91005503a3184d63e15469
2021-06-29 11:59:01 +01:00
Madhukar Pappireddy b9f7fcc949 Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration
* changes:
  feat(tc0): add cpu capacity to provide scheduling information
  fix(tc0): remove "arm,psci" from psci node
  feat(tc0): update mhuv2 dts node to align with upstream driver
2021-06-29 00:53:11 +02:00
Mark Dykes ce36b311a6 Merge "fix(drivers/mtd): fix MISRA issues and logic improvement" into integration 2021-06-28 22:15:02 +02:00
Mark Dykes 99ea2e912a Merge "style(scmi_common): add \n to warning messages" into integration 2021-06-28 21:59:41 +02:00
Usama Arif 309f5938e6
feat(tc0): add cpu capacity to provide scheduling information
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I8d3342315a46c78b4c41582ec114f0364a194316
2021-06-28 20:32:50 +01:00
Usama Arif 814646b4cb
fix(tc0): remove "arm,psci" from psci node
"arm,psci" expects the FIDs for cpu-on, cpu-off and cpu-suspend, which
arent present in the device tree, so remove it from psci compatible.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Icd1ce8ec7fd3f270925e4b3d5d0187088ffe4ba5
2021-06-28 20:32:29 +01:00
Usama Arif 63067ce87e
feat(tc0): update mhuv2 dts node to align with upstream driver
The MHUv2 driver has been merged upstream, and it has a different
dts format compared to what was previously used. This patch aligns
with the upstream driver.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Ic963c21c1475d301c3a75686718e6e17841831c3
2021-06-28 20:32:29 +01:00
Madhukar Pappireddy 02f7031780 Merge "fix(makefile): use space in WARNINGS list" into integration 2021-06-28 18:02:22 +02:00
Max Shvetsov 0c5e7d1ce3 feat(sve): enable SVE for the secure world
Enables SVE support for the secure world via ENABLE_SVE_FOR_SWD.
ENABLE_SVE_FOR_SWD defaults to 0 and has to be explicitly set by the
platform. SVE is configured during initial setup and then uses EL3
context save/restore routine to switch between SVE configurations for
different contexts.
Reset value of CPTR_EL3 changed to be most restrictive by default.

Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
Change-Id: I889fbbc2e435435d66779b73a2d90d1188bf4116
2021-06-28 13:24:24 +01:00
Arunachalam Ganapathy f1b44a9050 fix(tc0): remove ffa and optee device tree node
As FF-A driver probes OP-TEE SP dynamically, these entries are no more
required.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ica091722a7fad13e02662b9b2cd11ca1879b9f80
2021-06-28 11:11:55 +01:00
Arunachalam Ganapathy 05f667f0c6 fix(tc0): set cactus-tertiary vcpu count to 1
Third instance of cactus is a UP SP. Set its vcpu count to 1.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I34b7feb2915e6d335e690e89dea466e75944ed1b
2021-06-28 11:11:55 +01:00
Arunachalam Ganapathy 1c1953653c fix(tc0): change UUID to string format
Change OP-TEE, Cactus SPs UUID to string format

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I32dbf40e4c5aa959bb92d3e853072aea63409ddc
2021-06-28 11:11:47 +01:00
Olivier Deprez 573119980c Merge "feat(tc0): add bootargs node" into integration 2021-06-28 10:14:30 +02:00
bipin.ravi a5394205e9 Merge "errata: workaround for Cortex A78 errata 1821534" into integration 2021-06-24 16:43:03 +02:00
johpow01 1a691455d9 errata: workaround for Cortex A78 errata 1821534
Cortex A78 erratum 1821534 is a Cat B erratum present in r0p0 and
r1p0 of the A78 processor core, it is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/603e3733492bde1625aa8780

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I71057c4b9625cd9edc1a06946b453cf16ae5ea2c
2021-06-24 00:01:33 +02:00
johpow01 3f0bec7c88 errata: workaround for Cortex A77 errata 1791578
Cortex A77 erratum 1791578 is a Cat B erratum present in r0p0, r1p0,
and r1p1 of the A77 processor core, it is still open.

SDEN can be found here:
https://documentation-service.arm.com/static/60a63a3c982fc7708ac1c8b1

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ib4b963144f880002de308def12744b982d3df868
2021-06-23 14:26:06 -05:00
Mark Dykes 64b8db7e80 Merge "refactor(dt-bindings): align irq bindings with kernel" into integration 2021-06-22 21:21:21 +02:00
Lionel Debieve 5130ad14d5 fix(drivers/mtd): fix MISRA issues and logic improvement
Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.

Change-Id: I25a97fbd6c4389156b4f077b986019fa7c30a457
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-22 14:10:27 +02:00
Anders Dellien 4a840f27cd feat(tc0): add bootargs node
We will maintain the kernel command line here instead of in U-Boot.

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: I6011306cbaf47717c061f542e180005281695516
2021-06-22 11:57:23 +01:00
Olivier Deprez 967344b520 Merge "feat(spmd): add support for FFA_SPM_ID_GET" into integration 2021-06-18 17:28:39 +02:00
Madhukar Pappireddy 7cfe5999be Merge changes from topic "io_stm32image" into integration
* changes:
  fix(io_stm32image): invalidate cache on local buf
  refactor(io_stm32image): add header size variable
  fix(io_stm32image): uninitialized variable warning
2021-06-18 15:40:20 +02:00
Madhukar Pappireddy 2f0004bbbf Merge changes from topic "imx8m-sdei" into integration
* changes:
  feat(plat/imx8m): add sdei support for i.MX8MP
  feat(plat/imx8m): add sdei support for i.MX8MN
2021-06-18 15:34:01 +02:00
Manish Pandey 0fbc4aa028 Merge "refactor(plat/zynqmp): optimize the code to save some space" into integration 2021-06-18 13:05:16 +02:00
Madhukar Pappireddy 6db111968c Merge "refactor(plat/st): check boot device only for BL2" into integration 2021-06-17 23:44:07 +02:00
Madhukar Pappireddy a8b7a17547 Merge "feat(plat/imx8m): add system_reset2 implementation" into integration 2021-06-17 17:48:51 +02:00
Venkatesh Yadav Abbarapu db97f93963 refactor(plat/zynqmp): optimize the code to save some space
As there is constraint with the space for the release builds,
remove some of the legacy code.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5b8b16f34ed8e480f16ab1aeac80b85cdb391852
2021-06-17 00:43:41 -06:00
Igor Opaniuk 60a0dde91b feat(plat/imx8m): add system_reset2 implementation
Add imx_system_reset2 which extends existing SYSTEM_RESET. It provides
architectural reset definitions and vendor-specific resets.
By default warm reset is triggered.

Also refactor existing implementation of wdog reset, add details about
each flag used.

Change-Id: Ia7348c32c385f1c61f8085776e81dd1e38ddda5c
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-06-17 02:27:14 +01:00
Manish Pandey 5d582ff936 Merge "refactor(plat/st): avoid fixed DT address" into integration 2021-06-16 23:23:30 +02:00
Manish Pandey 96a0f97862 Merge "rpi4: update the iobase constant" into integration 2021-06-16 23:18:43 +02:00
Manish Pandey 6e34127504 Merge changes Iaf441fe5,I0355ca26 into integration
* changes:
  refactor(gicv3): use helper functions to get SPI/ESPI INTID limit
  refactor(gicv3): add helper function to get the limit of ESPI INTID
2021-06-16 23:17:45 +02:00
Madhukar Pappireddy 16b69ff547 Merge "fix(fdts/morello): fix scmi clock specifier to cluster mappings" into integration 2021-06-16 16:54:54 +02:00
Madhukar Pappireddy f85ab34120 Merge changes I4451ca03,I29be60ec,Ia30bd332,I72fe2275,I37bd65b0 into integration
* changes:
  feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
  feat(plat/nxp/common): add build macro for BOOT_MODE validation checking
  refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk
  refactor(plat/nxp/lx216x): clean up platform configure file
  refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk
2021-06-16 16:28:01 +02:00
Anurag Koul 387a9065a2 fix(fdts/morello): fix scmi clock specifier to cluster mappings
Fix the mapping of SCMI clock specifiers to the clusters they drive.
Also, add CPU cores to cluster mappings.

Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Change-Id: I230bea5614de4e29b54e1686b31bf01c0b6aa86c
2021-06-16 14:38:08 +01:00
Manish Pandey 2a0087796f Merge changes from topic "soc_id" into integration
* changes:
  refactor(plat/nvidia): use SOC_ID defines
  refactor(plat/mediatek): use SOC_ID defines
  refactor(plat/arm): use SOC_ID defines
  feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
  refactor(plat/st): export functions to get SoC information
  feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID
2021-06-16 12:03:17 +02:00
Heyi Guo ce2b49b879 refactor(gicv3): use helper functions to get SPI/ESPI INTID limit
Use helper functions to get SPI and ESPI INTID limit, to remove
several pieces of similar code in gicv3 driver.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: Iaf441fe5e333c4260e7f6d98df6fdd931591976d
2021-06-16 09:37:14 +08:00
Heyi Guo 30524ff80a refactor(gicv3): add helper function to get the limit of ESPI INTID
Add helper function gicv3_get_espi_limit() to get the value of
(maximum extended SPI INTID + 1), so that some duplicated code can be
removed later.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I0355ca2647f872e8189add259f6c47d415494cce
2021-06-16 09:24:31 +08:00
Mark Dykes ed0f0a0968 Merge "docs: change Linaro release version to 20.01" into integration 2021-06-15 17:08:54 +02:00
Jiafei Pan 28b3221aeb feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
Add macro of SUPPORTED_BOOT_MODE for board lx2160ardb, lx2160aqds,
lx2162aqds.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I4451ca030eca79c9bc5fee928eec497a7f0e878c
2021-06-15 17:43:04 +08:00
Jiafei Pan cd1280ea2e feat(plat/nxp/common): add build macro for BOOT_MODE validation checking
1. Added the build macro "add_boot_mode_define".
2. Use the macro to validate current BOOT_MODE against the
   pre-determined list of SUPPORTED_BOOT_MODE, so each platform
   need to define the list: SUPPORTED_BOOT_MODE.
3. Reports error if BOOT_MODE is not in SUPPORTED_BOOT_MODE list,
   or BOOT_MODE is not supported yet althoug it is in SUPPORTED_BOOT_MODE.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I29be60ecdb19fbec1cd162e327cdfb30ba629b07
2021-06-15 17:43:04 +08:00
Jiafei Pan 9398841e21 refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk
Move some soc make variables to new soc_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia30bd332c95b6475f1cfee2f03a8ed3892a9568d
2021-06-15 17:43:04 +08:00
Jiafei Pan 9663160d91 refactor(plat/nxp/lx216x): clean up platform configure file
Use common code in common file to configure platform.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I72fe22751f12b8a4996a7b9f75fae4c912ea86de
2021-06-15 17:43:04 +08:00
Jiafei Pan 5d5c3ff3f7 refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk
Move some common make variables to new plat_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I37bd65b0f8124f63074fa03339f886c2cdb30bd3
2021-06-15 17:43:04 +08:00