Replace %d with %u in log, to avoid warning when
-Wformat-signedness is enabled.
Change-Id: Ied5823520181f225ae09bd164e2e52e9a7692c60
Signed-off-by: Yann Gautier <yann.gautier@st.com>
As cmd_idx is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.
Change-Id: I6954a8c939f3fb47dbb2c6db56a1909565af078b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
As page is unsigned, we should use %u and not %d.
Find with -Wformat-signedness.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I7205971ee5e83163e4fe47d33bb9e90832b59ae0
From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I7f0a62f22bfcca638ddaefc9563df00f89f01653
At boot, the devices under ETZPC control are secured, so should be
their GPIOs. As securable GPIOs are secured by default, keep the reset
values in BL2.
Change-Id: I9e560d936f8e8fda0f96f6299bb0c3b35ba9b71f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Allow to set a gpio in output mode from the device tree.
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Change-Id: Ic483324bc5fe916a60df05f74706bd1da4d08aa5
No functional, change, but some improvements:
- Declare set_gpio() as static (only called locally)
- Handle the type ('open-drain') property independently from the
mode one.
- Replace mmio_clrbits_32() + mmio_setbits_32() with
mmio_clrsetbits_32().
- Add a missing log
- Add missing U() in macro definitions
Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Change-Id: I1a79609609ac8e8001127ebefdb81def573f76fa
Rename driver file to BSEC2.
Split header file in IP and feature parts.
Add functions to access BSEC scratch register.
Several corrections and improvements.
Probe the driver earlier, especially to check debug features.
Change-Id: I1981536398d598d67a19d2d7766dacc18de72ec1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Add support for regulator-always-on at BL2 level as it was supported
before using the regulator framework.
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: Idb2f4ddc2fdd4e0d31fb33da87c84618aa2e5135
Some clocks are only required in BL2, like boot devices clocks:
FMC, QSPI.
Some clocks are only used in BL32: Timers, devices that need special
care for independent reset.
Change-Id: Id4ba99afeea5095f419a86f7dc6423192c628d82
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This change removes reference counting support in clock gating
implementation for clocks that rely on non-secure only RCC resources.
As RCC registers are accessed straight by non-secure world for these
clocks, secure world cannot safely store the clock state and even
disabling such clock from secure world can jeopardize the non-secure
world clock management framework and drivers.
As a consequence, for such clocks, stm32_clock_enable() forces the clock
ON without any increment of a refcount and stm32_clock_disable() does
not disable the clock.
Change-Id: I0cc159b36a25dbc8676f05edf2668ae63c640537
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure upon RCC[TZEN] and RCC[MCKPROT] (MKP) or always accessible
from non-secure (N_S).
At init, lookup clock tree to check if any of the secure clocks
is derived from PLL3 in which case PLL3 shall be secure.
Note that this change does not grow byte size of stm32mp1_clk_gate[].
Change-Id: I933d8a30007f3c72f755aa1ef6d7e6bcfabbfa9e
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Rework the internal functions __stm32mp1_clk_enable/disable to check for
reference count instead of secure status for a clock.
Some functions now unused can be removed.
Change-Id: Ie4359110d7144229f85c961dcd5a019222c3fd25
Signed-off-by: Yann Gautier <yann.gautier@st.com>
In a later patch, the stm32mp1_def.h will be reworked. The inclusion
of common/debug.h may not be done there through another included file.
Add this header inclusion in the files that need it.
Change-Id: I83687f7910032ca38c0856796580a650e1e41a68
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Replace wrong %d with the correct types.
This issue was found with the compilation flag:
-Wformat-signedness
Change-Id: Iec3817a245f964ce444b59561b777ce06c51a60a
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Instead of transmitting an 'enum stm32mp_osc_id', just send
directly the clock name with a 'const char *'
Change-Id: I866b05cbb1685a9b9f80e63dcd5ba7b1d35fc932
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
In case of programmer mode, the bootrom manages to auto-detect
HSE clock configuration. In order to detect a bad device tree
setting in BL2, it will crash during programming if the configuration
is not aligned with the auto-detection.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I230697695745d6282d14b1ebfa6e4c4caa0cd8e2
Support "disabled" status for oscillator in device tree.
At boot time, the clock tree initialization performs the following
tasks:
- enabling of the oscillators present in the device tree and not
disabled,
- disabling of the HSI oscillator if the node is absent or disabled
(always activated by bootROM).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I176276022334f3d97ba0250b54062f0ae970e239
Add a function to get PLL settings from DT:
"cfg" property is mandatory, an error is generated if not found.
"frac" is optional, default value is returned if not found.
"csg" is optional too, a boolean value indicates if it has been
found, and its value is updated.
Store each PLL node validity information, this avoids parsing DT
several times.
Change-Id: I039466fbe1e67d160f7112814e7bb63b661804d0
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
These basic tests are generic and should be used independently of the
driver, depending on the plaftorm characteristics.
Change-Id: I38161b659ef2a23fd30a56e1c9b1bd98461a2fe4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
stm32mp_ddrctl structure contains DDRCTRL registers definitions.
stm32mp_ddr_info contains general DDR information extracted from DT.
stm32mp_ddr_size moves to the generic side.
stm32mp1_ddr_priv contains platform private data.
stm32mp_ddr_dt_get_info() and stm32mp_ddr_dt_get_param() allow to
retrieve data from DT. They are located in new generic c/h files in
which stm32mp_ddr_param structure is declared. Platform makefile
is updated.
Adapt driver with this new classification.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I4187376c9fff1a30e7a94407d188391547107997
A new flag STM32MP_DDR_DUAL_AXI_PORT is added, and enabled by default.
It will allow choosing single or dual AXI ports for DDR.
Change-Id: I48826a66a6f4d18df87e081c0960af89ddda1b9d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Force alignment of the size of parameters array with the expected
value by the binding.
The registers dynamic structs are removed as not used in TF-A.
Change-Id: I7a41f355a435f54fbf23f468cca87c7f8f7e69e8
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I7ac1c77c21ebc30315b532741f2f255c2312d5b2
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.
The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by CubeMX.
This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
the optional "st,phy-cal"
After this patch the built-in calibration is always executed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I3fc445520c259f7f05730aefc25e64b328bf7159
Replace %d with %u in logs, to avoid warning when
-Wformat-signedness is enabled.
And correct the order of includes.
Change-Id: I7c711a37fc1deceb8853831a8a09ae50422859c9
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
The issue was reported by Coverity [1]. The return of the functions
regulator_disable() and regulator_enable() was not checked.
If they fail, this means there is an issue either with PMIC or I2C.
The board should the stop booting with a panic().
[1] https://scan4.scan.coverity.com/reports.htm#v47771/p11439/mergedDefectId=374565
Change-Id: If5dfd5643c210e03ae4b1f4cab0168c0db89f60e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
To correctly initialize the MMC devices, a power cycle is required.
For this we need to:
- disable vmmc-supply regulator
- make the power cycle required for SDMMC2 peripheral
- enable regulators
Change-Id: I2be6d9082d1cc4c864a82cf2c31ff8522e2d31a2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Fixed regulator is mainly used when no pmic is available
Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474
Signed-off-by: Pascal Paillet <p.paillet@st.com>
print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after initialize_pmic() in BL2.
Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Add a regulator framework to:
- provide an interface to consumers and drivers,
- connect consumers with drivers,
- handle most of devicetree-parsing,
- handle always-on and boot-on regulators,
- handle min/max voltages,
Change-Id: I23c939fdef2c71a416c44c9de332f70db0d2aa53
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Add support for ICC, sink mode, bypass mode,
active discharge and list voltages.
Handle LDO3 sink source mode in a different way to avoid
setting voltage while in sink source mode.
Change-Id: Ib1b909fd8a153f542917f650e43e24317a570534
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Add regulators boost, pwr_sw1 and pwr_sw2 regulators related to
USB OTG supply BOOST, SW_OTG and SWIN/SWOUT. These regulators are
needed since manipulated during the suspend/resume power sequence
as per FDT description for stm32mp15x-xxx boards from
STMicroelectronics.
Change-Id: I6217de707e49882bd5a9100db43e0d354908800d
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Store status of dt_pmic_status() as local static variable,
this avoids parsing DT several times.
In the same way, store nodes in dt_pmic_i2c_config() and
in dt_get_pmic_node() as local static variables.
Change-Id: I4585e9dfdde2847a369bffcc6f2b39ecc2b74de1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_secure_at_reset().
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e
Add a UART/USART driver for STM32 with complete a hardware support;
it used for STM32CubeProgrammer support with even parity.
This driver is not used for console, which is already handle
by a simple driver (drivers/st/uart/aarch32/stm32_console.S).
Change-Id: Ia9266e5d177fe7fd09c8a15b81da1a05b1bc8b2d
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
The PLL4 can be used by ROM code as the source clock of USB PHYC and,
in this case, the PLL4 configuration must be preserved
with pll4_preserve to avoid USB disturbance.
This patch also adds an error when the clock tree PLL4 configuration
is not the PLL4 configuration used by ROM code; this error allows to
detect a invalid clock tree.
This commit corrects the coverity issue 343023.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I4bae9312a2db8dd342a38e649513d689b13976bb
sha 4ce3e99a3 introduced printf format specifiers for fixed width
types, which uses PRI*64 instead of "ll" for 64 bit values.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic6811cc1788c698adde0807e5f8ab5290a900a26
Add a device driver for Synopsis DWC2 USB IP of STM32MP15x,
this USB OTG device is only supported in device mode.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I90b21f094f6637b85f3ace23a3a3a2f6fd4e0951
Add enable bit mask description because power switches
are not all enabled by bit 0.
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: If7c9ae7d800adee8e25416ca35db1be20452741f
Use errno values, or the return of called functions, instead of -1.
Correct some MISRA issues, like braces.
Change-Id: If7b53de5cbfb4d2c9979bce0e594dd92bf07a77a
Signed-off-by: Yann Gautier <yann.gautier@st.com>