Commit Graph

10012 Commits

Author SHA1 Message Date
Sughosh Ganu 9adce87efc feat(fwu): add a function to pass metadata structure to platforms
Add a helper function to pass the metadata structure to the
platforms. Platforms can then read the metadata structure and pass the
boot index value, i.e. the bank(partition) from which the firmware
images were booted, to the Update Agent.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I571179b9baa0fbc4d0f08d7a6e3b50c0c7165c5c
2022-01-27 18:09:02 +05:30
Sughosh Ganu 3cb1065581 feat(partition): add a function to identify a partition by GUID
With the GPT partition scheme, a partition can be identified using
it's UniquePartitionGUID, instead of it's name. Add a function to
identify the partition based on this GUID value. This functionality is
useful in identification of a partition whose UniquePartitionGUID
value is known.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I543f794e1f7773f969968a6bce85ecca6f6a1659
2022-01-27 18:09:02 +05:30
Sughosh Ganu 7585ec4d36 feat(partition): copy the partition GUID into the partition structure
Copy the UniquePartitionGUID member of a GPT partition entry into the
partition_entry structure. This GUID is subsequently used to identify
the image to boot on a platform which supports multiple partitions of
firmware components using the FWU metadata structure.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I8b55a1ee7deb1353886fbd8ebde53055d677fee0
2022-01-27 18:09:02 +05:30
Sughosh Ganu 938e8a500a feat(partition): make provision to store partition GUID value
The FWU multi bank feature supports multiple partitions or banks of
firmware components, where a platform can support having an active and
a backup partition(bank) of firmware images to boot from. This feature
identifies the images in a given bank using image GUID's --
this GUID value corresponds to the UniquePartitionGUID value used to
uniquely identify a GPT partition.

To support identification of images, add a member to the
partition_entry structure to store the UniquePartitionGUID value of
the GPT partition entry. This value is subsequently used to select the
firmware image to boot in a multi partition setup.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I2d235467ce7a7f20ebc1cef4db09924a5282e714
2022-01-27 18:09:02 +05:30
Sughosh Ganu 2029f93009 feat(partition): cleanup partition and gpt headers
The EFI_NAMELEN macro has been moved to efi.h header. Get the macro
from efi.h. Use the struct efi_guid structure for declaring GUID
members in gpt.h

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I1c3a2605b9f857b9cf2dcfdaed4dc9d0a2cbf0f0
2022-01-27 18:09:02 +05:30
Sughosh Ganu 19d63df1af feat(fwu): add basic definitions for GUID handling
The FWU metadata structure uses GUID's to identify the updatable
firmware images. Add some basic helper functions and
macros that would be used for working with the GUID datatype.

With the FWU feature enabled, these would then be used for image
identification and booting of images from a particular
bank(partition).

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Ia54c0402d72b503d6abd1d94bc751cc14602cd39
2022-01-27 18:09:02 +05:30
Sughosh Ganu 6aaf257de4 feat(fwu): pass a const metadata structure to platform routines
The metadata structure copy is passed to the platform routine to set
the image source to boot the platform from. This is done by reading
the metadata structure. Pass the metadata as a read-only copy to the
routine -- the routine only needs to consume the metadata values and
should not be able to update the metadata fields.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I399cad99ab89c71483e5a32a1de0e22df304f8b0
2022-01-27 18:09:02 +05:30
Sughosh Ganu e1157ecdc4 build(changelog): add a valid scope for partition code
Add a valid scope for the partition code under the drivers directory.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I173ac45e4ccbc95566277dabef15dcd25533e097
2022-01-27 18:09:02 +05:30
Madhukar Pappireddy 0b1cfc2988 Merge "fix(st-ddr): add missing debug.h" into integration 2022-01-27 02:01:32 +01:00
Madhukar Pappireddy d6854cd1d9 Merge "refactor(stm32mp1): use a macro for header size" into integration 2022-01-27 01:58:50 +01:00
Madhukar Pappireddy dca5ce11bf Merge "refactor(ls1028a): fix header file group issue" into integration 2022-01-26 16:08:06 +01:00
Joanna Farley b618f5ed25 Merge changes from topic "ck/changelog" into integration
* changes:
  build(npm): mandate Node.js engine version
  docs(changelog): fix broken version bumping
  docs(changelog): fix version tag links
  refactor(hooks): replace cz-conventional-changelog with cz-commitlint
  style(commitlint): reorder header/body max line length fields
  chore(npm): update package versions/license
2022-01-26 12:08:31 +01:00
Jiafei Pan 40886d5ae0 refactor(ls1028a): fix header file group issue
ocram.h should be in platform includes group.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I43b6a279e48e1a173f8e7c601f2c8d48e6efc647
2022-01-26 10:13:14 +08:00
Sandrine Bailleux b19630037d Merge changes from topic "decouple-tb-mb" into integration
* changes:
  refactor(renesas): disable CRYPTO_SUPPORT option
  refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot
  refactor(measured-boot): avoid Measured-Boot dependency on Trusted-Boot
  build: introduce CRYPTO_SUPPORT build option
2022-01-25 08:10:58 +01:00
Madhukar Pappireddy 24dc0a2891 Merge changes from topic "st_syscfg_updates" into integration
* changes:
  feat(stm32mp1): add helper to enable high speed mode in low voltage
  refactor(stm32mp1): add helpers for IO compensation cells
  feat(stm32mp1): use clk_enable/disable functions
  feat(stm32mp1): add timeout in IO compensation
2022-01-24 23:07:01 +01:00
Chris Kay 0501d48b81 build(npm): mandate Node.js engine version
This change mandates a particular version of Node.js when running
`npm install`. When using a version of Node.js that does not meet these
expectations, a warning will be emitted to the user to let them know
that they are using an unsupported version of Node.js

Change-Id: I3f9bcf8be483a80b5882d65b034c6655013df19f
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:34 +00:00
Chris Kay ba748f3c35 docs(changelog): fix broken version bumping
Standard Version was not bumping the package metadata files as it
should have been. It's not clear to me why, but there is an open
[GitHub issue][1] for documenting this behaviour.

[1]: https://github.com/conventional-changelog/standard-version/issues/506

Change-Id: Ie89a81272fe507a3d2e1cd33c6ac1bdcc8ac3d75
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:34 +00:00
Chris Kay c503b42c09 docs(changelog): fix version tag links
The Standard Version tool will not recognize a release header as a
release header without the minor version, and will overwrite them when
generating the next release changelog.

Additionally, it will not generate a link to the tag diff unless a tag
of the form `vX.Y.Z` exists. We ought to generate tags with this version
format in the future to ensure the diff links are generated.

Change-Id: I7864ab7a5822f83ddb7a7917208d2d029ae34729
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:34 +00:00
Chris Kay f64c55826e refactor(hooks): replace cz-conventional-changelog with cz-commitlint
This change replaces cz-conventional-changelog with cz-commitlint, which
automatically configures Commitizen using our commitlint configuration
file. Currently, we use some manual Javascript magic to load our
Commitizen configuration into commitlint (the opposite of what's
introduced by this change), which can be removed.

With this change, we also move our commitlint configuration into a
new `changelog.yaml` file. This file holds the same data as `.cz.json`
previously did.

Change-Id: I14ff2308f1a0b2b293c2128b28ca2df578ce9c1c
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:00 +00:00
Manish Pandey b57d9d6f29 Merge changes from topic "new_ls1043a" into integration
* changes:
  docs(maintainers): update nxp layerscape maintainers
  docs(plat/nxp/layerscape): add ls1043a soc and board support
  feat(plat/nxp/ls1043ardb): add ls1043ardb board support
  feat(plat/nxp/ls1043a): add ls1043a soc support
  refactor(plat/ls1043): remove old implementation for platform ls1043
  feat(nxp/driver/dcfg): add some macro definition
  fix(nxp/common/setup): increase soc name maximum length
  feat(nxp/common/errata): add SoC erratum a008850
  feat(nxp/driver/tzc380): add tzc380 platform driver support
  feat(tzc380): add sub-region register definition
  feat(nxp/common/io): add ifc nor and nand as io devices
  feat(nxp/driver/ifc_nand): add IFC NAND flash driver
  feat(nxp/driver/ifc_nor): add IFC nor flash driver
  feat(nxp/driver/csu): add bypass bit mask definition
  feat(nxp/driver/dcfg): add gic address align register definition
  feat(nxp/common/rcpm): add RCPM2 registers definition
  fix(nxp/common/setup): fix total dram size checking
  feat(nxp/common): add CORTEX A53 helper functions
2022-01-20 17:29:00 +01:00
Jiafei Pan d9bb9779fc docs(maintainers): update nxp layerscape maintainers
Added myself to be NXP common code and ls1028a, ls1043a platforms
maintainer.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iadffc5600e9bb2e94b1d545b8dd1a819358cabcb
2022-01-20 23:38:03 +08:00
Jiafei Pan 168a20120b docs(plat/nxp/layerscape): add ls1043a soc and board support
Update document for nxp-layerscape to add ls1043a SoC and ls1043ardb
board support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I8442daf08a0f7c1ba982a3ed1d0ad24c4c420185
2022-01-20 23:38:03 +08:00
Jiafei Pan e4bd65fed8 feat(plat/nxp/ls1043ardb): add ls1043ardb board support
The LS1043A reference design board (RDB) is a computing, evaluation,
and development platform that supports the Layerscape LS1043A
architecture processor.

The old implementation in tf-a (plat/layerscape/board/ls1043/) is removed,
and this patch is adding it back, it is using the unified software
component and architecture with all the other Layerscape platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Change-Id: I83eee2f9254267b148960b05e25b6c9ba86cf07e
2022-01-20 23:38:03 +08:00
Jiafei Pan 3b0de91825 feat(plat/nxp/ls1043a): add ls1043a soc support
The LS1043A processor was NXP's first quad-core, 64-bit Arm based
processor for embedded networking.

The old implementation in tf-a (plat/layerscape/board/ls1043/) is removed,
and this patch is adding it back, it is using the unified software
component and architecture with all the other Layerscape platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Change-Id: Ia3877530fae6479bd4a33bbe46b0c0d28ab43160
2022-01-20 23:38:03 +08:00
Jiafei Pan ff4ec0a036 refactor(plat/ls1043): remove old implementation for platform ls1043
Remove old implementation for Layerscape ls1043a platform, and
will added it back with unified software architecture of all
Layerscape platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If038c19ab04d70050ec8e6ab2097b1c4f8324e87
2022-01-20 23:38:03 +08:00
Jiafei Pan 1b29fe534b feat(nxp/driver/dcfg): add some macro definition
Added offset for register DEVDISR2 and DEVDISR3, added
bit definiton for PORSR1_RCW, and some macro for SVR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie49392b89280c6c2c3510fcb4c85d827a1efdac0
2022-01-20 23:38:03 +08:00
Jiafei Pan 3ccd7e45a2 fix(nxp/common/setup): increase soc name maximum length
Increate SoC name length as it is not enough for some
SoC personalities.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2142b4b5162dd3c9ab3afefcdc859063836d8bcc
2022-01-20 23:38:03 +08:00
Jiafei Pan 3d14a30b88 feat(nxp/common/errata): add SoC erratum a008850
Add SoC erratum a008850 support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1ef41c67737b7b5fdf1d892929a2d8040effc282
2022-01-20 23:38:03 +08:00
Jiafei Pan de9e57ff1f feat(nxp/driver/tzc380): add tzc380 platform driver support
Added TZC380 platform driver support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id0aa6cb64fa7af79dd44e0dbb0e62cb2fd4cb824
2022-01-20 23:38:03 +08:00
Jiafei Pan fdafe2b5ea feat(tzc380): add sub-region register definition
Added sub-region register definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iab8130b56089d804c51ab967b184ddfc192e2858
2022-01-20 23:38:03 +08:00
Jiafei Pan b759727f59 feat(nxp/common/io): add ifc nor and nand as io devices
Added IFC Nor and NAN flash as boot IO devices.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ie1b87174d9c08d4e32138066b007fef6f8e3c5dd
2022-01-20 23:38:03 +08:00
Jiafei Pan 28279cf2c1 feat(nxp/driver/ifc_nand): add IFC NAND flash driver
Support IFC NAND flash as boot device.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I1aba7035ff70b179915e181c04e7b00be2066abe
2022-01-20 23:38:03 +08:00
Jiafei Pan e2fdc77ba4 feat(nxp/driver/ifc_nor): add IFC nor flash driver
Add IFC Nor flash driver.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3275664b8848d0fe3c15ed92d95fb19adbf57f84
2022-01-20 23:38:03 +08:00
Olivier Deprez bc378a0d8b Merge "feat(tc): enable tracing" into integration 2022-01-20 10:03:47 +01:00
Madhukar Pappireddy 0586c41b3f Merge changes from topic "st_clock_updates" into integration
* changes:
  fix(st-clock): correct types in error messages
  refactor(st-clock): directly use oscillator name
  feat(st-clock): check HSE configuration in serial boot
  feat(st-clock): manage disabled oscillator
  refactor(st-clock): improve DT parsing for PLL nodes
2022-01-19 18:15:19 +01:00
Yann Gautier 8be574bf66 refactor(stm32mp1): use a macro for header size
Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000
in linker script.

Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 16:57:30 +01:00
Yann Gautier dea02f4eae feat(stm32mp1): add helper to enable high speed mode in low voltage
This new function is used to fill the register(s) responsible to enable
high speed mode for pad in low voltage (<2.7V).

Change-Id: Ib8abc6628bdf51bbe6a866bc6a9bcdeb4a84a8f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:28:10 +01:00
Yann Gautier 1f4513cb79 refactor(stm32mp1): add helpers for IO compensation cells
Add enable_io_comp_cell and disable_io_comp_cell local helpers
to enable or disable an IO compensation cell.

Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:28:10 +01:00
Etienne Carriere c7a66e720a feat(stm32mp1): use clk_enable/disable functions
Use the clock framework functions in SYSCFG driver instead of dedicated
functions.

Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:19:58 +01:00
Nicolas Le Bayon de02e9b0ec feat(stm32mp1): add timeout in IO compensation
Use a timeout during IO compensation enable function, when
waiting for ready status. If timeout expires, print a warning
message, to indicate that the SoC recommendation is not followed.

Change-Id: I98c7dcb1364b832f4f4b5fc9a0b85a3741a8af4b
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:19:58 +01:00
Yann Gautier 15ca2c5e14 fix(st-ddr): add missing debug.h
In a later patch, the stm32mp1_def.h will be reworked. The inclusion
of common/debug.h may not be done there through another included file.
Add this header inclusion in the files that need it.

Change-Id: I83687f7910032ca38c0856796580a650e1e41a68
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-19 15:13:18 +01:00
Manish Pandey e1c018e807 Merge "fix(imx8mp): change the BL31 physical load address" into integration 2022-01-19 12:02:33 +01:00
Jiafei Pan ec5fc501f1 feat(nxp/driver/csu): add bypass bit mask definition
Add TZASC_BYPASS_MUX_DISABLE definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ife4d819e2af6deb5e027491d30f6b7c5f79764e7
2022-01-19 11:36:23 +08:00
Jiafei Pan 3a8c9d78d4 feat(nxp/driver/dcfg): add gic address align register definition
Add some register fields definition.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I9fd78c318b34a2becd82d502fa6d18c8298eb40a
2022-01-19 11:36:23 +08:00
Jiafei Pan d374060abe feat(nxp/common/rcpm): add RCPM2 registers definition
Added some RCPM2 register offset definiton for register: IPSTPCR,
IPSTPACKR and POWMGTDCR, also added OVRD bit definiton of register
POWMGTDCR.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I301bc1401e053c2089b5eb3672c6e649c805a2ab
2022-01-19 11:36:23 +08:00
Jiafei Pan 0259a3e828 fix(nxp/common/setup): fix total dram size checking
total_dram_size should be signed value because it is equal to return
value of init_ddr(), so if it is lower or equal zero, report
error as DDR is not initialized correctly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Idbc40da103f60f10cb18c5306e97b764c1a9d372
2022-01-19 11:36:23 +08:00
Jiafei Pan 3ccc8ac3e5 feat(nxp/common): add CORTEX A53 helper functions
Add helper function to disable the load-store prefetch.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I36d7be37e0b800ab1e5842a56cfd04d779338868
2022-01-19 11:36:23 +08:00
Yann Gautier 44fb470b7f fix(st-clock): correct types in error messages
Replace wrong %d with the correct types.
This issue was found with the compilation flag:
-Wformat-signedness

Change-Id: Iec3817a245f964ce444b59561b777ce06c51a60a
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2022-01-18 18:39:52 +01:00
Gabriel Fernandez b208e3da04 refactor(st-clock): directly use oscillator name
Instead of transmitting an 'enum stm32mp_osc_id', just send
directly the clock name with a 'const char *'

Change-Id: I866b05cbb1685a9b9f80e63dcd5ba7b1d35fc932
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
2022-01-18 18:39:52 +01:00
Lionel Debieve 31e9750bc1 feat(st-clock): check HSE configuration in serial boot
In case of programmer mode, the bootrom manages to auto-detect
HSE clock configuration. In order to detect a bad device tree
setting in BL2, it will crash during programming if the configuration
is not aligned with the auto-detection.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I230697695745d6282d14b1ebfa6e4c4caa0cd8e2
2022-01-18 17:07:41 +01:00