Commit Graph

483 Commits

Author SHA1 Message Date
Mark Dykes 7b97cf378a Merge changes from topic "st_fixes" into integration
* changes:
  fix(stpmic1): fix power switches activation
  fix(stpmic1): update error cases return
  refactor(stpmic1): use BIT and GENMASK helpers
  fix(stm32mp1_clk): keep RTC clock always on
  fix(stm32mp1_clk): set other clocks as always on
2021-10-14 23:16:36 +02:00
Manish V Badarkhe 8a89e1898b refactor(measured boot): make measurement strings compliant with SBSG
Made measurement strings compliant to Server Base Security Guide
(SBSG, Arm DEN 0086) hence updated measurement strings for BL32, BL31,
and SCP_BL2 images. As the GPT image is not get measured by BL2 so
removed its measurement string.
Also, namespaced measurement string defines that were looking quite
generic.

Change-Id: Iaa17c0cfeee3d06dc822eff2bd553da23bd99b76
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:48 +01:00
Manish V Badarkhe 48ba0345f7 feat(measured_boot): image hash measurement and recording in BL1
It looks safer and cleaner approach to record the measurement taken by
BL1 straightaway in TCG Event Log instead of deferring these recordings
to BL2.
Hence pull in the full-fledged measured boot driver into BL1 that
replaces the former ad-hoc platform interfaces i.e.
bl1_plat_set_bl2_hash, bl2_plat_get_hash.

As a result of this change the BL1 of Arm FVP platform now do the
measurements and recordings of below images:
1. FW_CONFIG
2. TB_FW_CONFIG
3. BL2

Change-Id: I798c20336308b5e91b547da4f8ed57c24d490731
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:48 +01:00
Manish V Badarkhe efa6521878 refactor(measured boot): remove platform calls from Event Log driver
Currently, the Event Log driver does platform layer work by invoking
a few platform functions in the 'event_log_finalise' call. Doing
platform work does not seem to be the driver's responsibility, hence
moved 'event_log_finalise' function's implementation to the platform
layer.

Alongside, introduced few Event Log driver functions and done
some cosmetic changes.

Change-Id: I486160e17e5b0677c734fd202af7ccd85476a551
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux 8cd09cfc91 refactor(measured boot): move BL2 measurement to platform layer
Right now, event_log_init() does 2 things:
1) It writes all the necessary TCG data structures in the event log buffer.
2) It writes the first measurement (BL2's).

Step 2) introduces in the TCG event log driver an assumption on what
is getting measured and in what order. Ideally, the driver should only
be concerned about generic operations, such as initializing the event
log or recording a measurement in it. As much as possible, we should
design the driver such that it could be reused in another project that
has a different measure boot flow.

For these reasons, move step 2) up to the caller, plat_mboot_init() in
this case. Make event_log_record() a public function for this purpose.

This refactoring will also help when we make BL1 record BL2's
measurement into the event log (instead of BL2). Both BL1 and BL2 will
need to call the driver's init function but only BL1 will need
recording BL2's measurement. We can handle this through different
implementations of plat_mboot_init() for BL1 and BL2, leaving the TCG
event log driver unchanged.

Change-Id: I358e097c1eedb54f82b866548dfc6bcade83d519
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux d89bec83dc build(measured boot): rename measured boot makefile
With the removal of the generic functions measured_boot_init()/finish(),
measured_boot.mk becomes specific to the TCG event log backend. Change
its file name to event_log.mk.
Also, the Event Log driver is one of the backend of measured boot hence
created a separate folder for it under the measured_boot directory.

Alongside done some cosmetic changes (adding a comment and fixing
identation).

Change-Id: I4ce3300e6958728dc15ca5cced09eaa01510606c
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Manish V Badarkhe 47bf3ac31e feat(measured boot): move init and teardown functions to platform layer
Right now, the measured boot driver is strongly coupled with the TCG
event log driver. It would not be possible to push the measurements
somewhere else, for instance to a physical TPM.

To enable this latter use case, turn the driver's init and teardown
functions into platform hooks. Call them bl2_plat_mboot_init()/finish().
This allows each platform to implement them appropriately, depending on
the type of measured boot backend they use. For example, on a platform
with a physical TPM, the plat_mboot_init() hook would startup the TPM
and setup it underlying bus (e.g. SPI).

Move the current implementation of the init and teardown function to the
FVP platform layer.

Finally move the conditional compilation logic (#if MEASURED_BOOT) out
of bl2_main() to improve its readability. Provide a dummy implementation
in the case measured boot is not included in the build.

Change-Id: Ib6474cb5a9c1e3d4a30c7f228431b22d1a6e85e3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-12 17:53:47 +01:00
Sandrine Bailleux 4a24707f94 refactor(measured boot): rename tpm_record_measurement()
tpm_record_measurement() function name suggests that:

 - It only records a measurement but does not compute it.
   This is not the case, the function does both.

 - It stores this measurement into a TPM (discrete chip or fTPM).
   This is not the case either, the measurement is just stored into
   the event log, which is a data structure hold in memory, there is
   no TPM involvement here.

To better convey the intent of the function, rename it into
event_log_measure_and_record().

Change-Id: I0102eeda477d6c6761151ac96759b31b6997e9fb
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2021-10-12 17:53:47 +01:00
Pankaj Gupta 1ff7e46b09 fix(include/drivers/flexspi): fix warm boot wait time for MT35XU512A
Now lx2 which use MT35XU512A supports warm boot, fix the macro
define caused by the commit:
feat(driver/nxp/xspi): add MT35XU02G flash info

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I83eb8cb9a30ac7c7efd5a010acbd03eddebed52b
2021-10-06 14:47:27 +05:30
Yann Gautier 4bafa3dad0 refactor(stpmic1): use BIT and GENMASK helpers
Use BIT and GENMASK macros to ease stpmic1.h reading.

Change-Id: I808a62818d4188bb2f3686ab37518d369b6c41cb
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-10-06 11:09:21 +02:00
Sandrine Bailleux 078925be4f Merge "refactor(measured boot): remove unused extern" into integration 2021-10-06 09:41:00 +02:00
Madhukar Pappireddy d7fe4cb036 Merge changes from topic "ethosn-multi-device" into integration
* changes:
  feat(drivers/arm/ethosn)!: multi-device support
  feat(fdt): add for_each_compatible_node macro
2021-10-05 22:15:40 +02:00
Manish Pandey 7feb435060 Merge "refactor(drivers/st/clk): change fdt_get_rcc_node as static" into integration 2021-10-04 14:15:41 +02:00
Manish V Badarkhe 83ad3819bf refactor(measured boot): remove unused extern
Change-Id: I4fb7a79c2f31973a3cd181feaface9a42bc3246f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-10-03 21:57:25 +01:00
Laurent Carlier 1c65989e70 feat(drivers/arm/ethosn)!: multi-device support
Add support for Arm Ethos-N NPU multi-device.

The device tree parsing currently only supports one NPU device with
multiple cores. To be able to support multi-device NPU configurations
this patch adds support for having multiple NPU devices in the device
tree.

To be able to support multiple NPU devices in the SMC API, it has been
changed in an incompatible way so the API version has been bumped.

Signed-off-by: Laurent Carlier <laurent.carlier@arm.com>
Change-Id: Ide279ce949bd06e8939268b9601c267e45f3edc3
2021-10-01 09:27:11 +01:00
Madhukar Pappireddy 890ee3e87a Merge changes from topic "st_fixes" into integration
* changes:
  fix(stm32_console): do not skip init for crash console
  fix(plat/st): add UART reset in crash console init
  refactor(stm32mp1_clk): update RCC registers file
  fix(stm32mp1_clk): keep RTCAPB clock always on
  fix(stm32mp1_clk): fix RTC clock rating
  fix(stm32mp1_clk): correctly manage RTC clock source
  fix(spi_nand): check correct manufacturer id
  fix(spi_nand): check that parameters have been set
2021-09-30 16:42:56 +02:00
Patrick Delaunay ff18c4cde4 refactor(drivers/st/clk): change fdt_get_rcc_node as static
Change the fdt_get_rcc_node function to static, as it is used only in
stm32mp_clkfunc.c file; it is only a cleanup change without functional
modification.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: Ib4ef110f6f1b16dbaa727a065e40275d3cf58a73
2021-09-22 15:39:12 +02:00
Yann Gautier 288f5cf204 refactor(stm32mp1_clk): update RCC registers file
The file is first generated with the peripheral spirit XML file.
And then we add some common definition, to ease driver development.

Change-Id: I4c222cf006caf27cda6da044eaf184ce66bb1442
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-17 15:39:32 +02:00
Jiafei Pan a4f5015a00 feat(driver/nxp/xspi): add MT35XU02G flash info
Add MT35XU02G flash info.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2dbbdcb454fae4befef71769f9646c077d72a057
2021-09-15 11:19:36 +08:00
Jiafei Pan 6c5d140ed9 feat(driver/nxp/dcfg): define RSTCR_RESET_REQ
Define RSTCR_RESET_REQ for Chassis V3.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I5cb7019baae5fe0d06b3d5e65f185f87ee16ad3a
2021-09-15 11:19:36 +08:00
André Przywara 0295079162 Merge changes from topic "gic-700-auto" into integration
* changes:
  feat(arm_fpga): support GICv4 images
  feat(gicv3): detect GICv4 feature at runtime
  feat(gicv3): multichip: detect GIC-700 at runtime
  refactor(gic): move GIC IIDR numbers
  refactor(gicv3): rename GIC Clayton to GIC-700
2021-09-10 17:17:46 +02:00
Mark Dykes d3f91e242a Merge "feat(tzc400): update filters by region" into integration 2021-09-09 17:49:06 +02:00
Lionel Debieve ce7ef9d146 feat(tzc400): update filters by region
Add a new function that allows to enable or disabled filters on
configured regions dynamically. This will avoid the need to
reconfigure the entire attribute and just manage to
enable/disable filters.

Change-Id: If0937ca755bec6c45d3649718147108459682fff
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-09-08 09:05:16 +02:00
Joanna Farley e5bc3ef3b5 Merge "feat(gic600ae): introduce support for Fault Management Unit" into integration 2021-09-06 21:00:56 +02:00
Varun Wadekar 2c248ade2e feat(gic600ae): introduce support for Fault Management Unit
The FMU is part of the GIC Distributor (GICD) component. It implements
the following functionality in GIC-600AE:

* Provides software the means to enable or disable a Safety Mechanism
  within a GIC block.
* Receives error signaling from all Safety Mechanisms within other GIC
  blocks.
* Maintains error records for each GIC block, for software inspection
  and provides information on the source of the error.
* Retains error records across functional reset.
* Enables software error recovery testing by providing error injection
  capabilities in a Safety Mechanism.

This patch introduces support to enable error detection for all safety
mechanisms provided by the FMU. Platforms are expected to invoke the
initialization function during cold boot.

The support for the FMU is guarded by the GICV3_SUPPORT_GIC600AE_FMU
makefile variable. The default value of this variable is '0'.

Change-Id: I421c3d059624ddefd174cb1140a2d2a2296be0c6
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2021-09-01 08:24:33 -07:00
Andre Przywara 858f40e379 feat(gicv3): detect GICv4 feature at runtime
At the moment we have a GIC_ENABLE_V4_EXTN build time variable to
determine whether the GIC interrupt controller is compliant to version
4.0 of the spec or not. This just changes the number of 64K MMIO pages
we expect per redistributor.

To support firmware builds which run on variable systems (emulators,
fast model or FPGAs), let's make this decision at runtime.
The GIC specification provides several architected flags to learn the
size of the MMIO frame per redistributor, we use GICR_TYPER[VLPI] here.

Provide a (static inline) function to return the size of each
redistributor.
We keep the GIC_ENABLE_V4_EXTN build time variable around, but change
its meaning to enable this autodetection code. Systems not defining this
rely on a "pure" GICv3 (as before), but platforms setting it to "1" can
now deal with both configurations.

Change-Id: I9ede4acf058846157a0a9e2ef6103bf07c7655d9
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-01 16:14:03 +01:00
Andre Przywara 1fe27d7135 refactor(gic): move GIC IIDR numbers
For the GIC power management we need to identify certain GIC
implementations, so we have the IIDR values for some Arm Ltd. GIC models
defined.
We will need those number elsewhere very soon, so export them to a
shared header file, to avoid defining them again.

Change-Id: I1b8e2d93d6cea0d066866143c89eef736231134f
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-01 12:50:08 +01:00
Jiafei Pan 08695df91d refactor(plat/nxp): refine api to read SVR register
1. Refined struct soc_info_t definition.
2. Refined get_soc_info function.
3. Fixed some SVR persernality value.
4. Refined API to get cluster numbers and cores per cluster.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I3c20611a523516cc63330dce4c925e6cda1e93c4
2021-08-26 10:08:57 +08:00
Manish Pandey e528bc22eb Merge changes from topic "st_fip_fconf" into integration
* changes:
  feat(io_mtd): offset management for FIP usage
  feat(nand): count bad blocks before a given offset
  feat(plat/st): add helper to save boot interface
  fix(plat/st): improve DDR get size function
  refactor(plat/st): map DDR secure at boot
  refactor(plat/st): rework TZC400 configuration
2021-08-13 00:22:55 +02:00
Pankaj Gupta 050a99a62f refactor: moved drivers hdr files to include/drivers/nxp
NXP drivers header files are moved:
  - from:  drivers/nxp/<xx>/*.h
  - to  :  include/drivers/nxp/<xx>/*.h

To accommodate these changes each drivers makefiles
drivers/nxp/<xx>/xx.mk, are updated.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I3979c509724d87e3d631a03dbafda1ee5ef07d21
2021-08-03 12:19:56 +02:00
Manish V Badarkhe 0ec3ac60d8 feat(fwu): add FWU driver
Implemented FWU metadata load and verification APIs.
Also, exported below APIs to the platform:
1. fwu_init - Load FWU metadata in a structure. Also, set the
	      addresses of updated components in I/O policy
2. fwu_is_trial_run_state - To detect trial run or regular run
			    state

Change-Id: I67eeabb52d9275ac83be635306997b7c353727cd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-08-02 17:15:40 +01:00
Manish V Badarkhe 5357f83d4e feat(fwu_metadata): add FWU metadata header and build options
Added a firmware update metadata structure as per section 4.1
in the specification document[1].

Also, added the build options used in defining the firmware
update metadata structure.

[1]: https://developer.arm.com/documentation/den0118/a/

Change-Id: I8f43264a46fde777ceae7fd2a5bb0326f1711928
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-08-02 14:39:41 +01:00
Lionel Debieve 9a9ea82948 feat(io_mtd): offset management for FIP usage
A new seek handler is also created. It will be used for NAND to add an
extra offset in case of bad blocks, when FIP is used.

Change-Id: I03fb1588b44029db50583c0b2e7af7a1e88a5a7a
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-07-13 18:16:55 +02:00
Yann Gautier bc3eebb25d feat(nand): count bad blocks before a given offset
In case of FIP, the offsets given in the FIP header are relative.
If bad blocks are found between the FIP base address and this offset,
the offset should be updated, taking care of the bad blocks.

Change-Id: I96fefabb583b3d030ab05191bae7d45cfeefe341
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
2021-07-13 18:16:55 +02:00
Vyacheslav Yurkov f3d2750aa2 feat(drivers/st): manage boot part in io_mmc
Use dedicated read function for boot partition

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: If75df7691fce0797205365736fc6e4e3429efdca
2021-06-04 10:08:39 +02:00
Vyacheslav Yurkov 5014b52dec feat(drivers/mmc): boot partition read support
Added a public function to read blocks from a current boot partition.
switch between partitions has to respect eMMC partition switch timing.

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: I55b0c910314253e5647486609583fd290dadd30a
2021-06-04 09:52:37 +02:00
Mikael Olsson 76a21174d2 Add SiP service to configure Arm Ethos-N NPU
By default the Arm Ethos-N NPU will boot up in secure mode. In this mode
the non-secure world cannot access the registers needed to use the NPU.
To still allow the non-secure world to use the NPU, a SiP service has
been added that can delegate non-secure access to the registers needed
to use it.

Only the HW_CONFIG for the Arm Juno platform has been updated to include
the device tree for the NPU and the platform currently only loads the
HW_CONFIG in AArch64 builds.

Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I65dfd864042ed43faae0a259dcf319cbadb5f3d2
2021-04-20 15:42:18 +02:00
Madhukar Pappireddy 866e6721f3 Merge changes from topic "scmi_v2_0" into integration
* changes:
  drivers/arm/css/scmi: Update power domain protocol version to 2.0
  tc0: update GICR base address
2021-04-15 23:39:31 +02:00
Nicola Mazzucato b67e9880fc drivers/arm/css/scmi: Update power domain protocol version to 2.0
The SCMI power domain protocol in firmware has been updated to v2.0,
thus update the corresponding version in TF-A too.

Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
Change-Id: If3920ff71136dce94b2780e29a47f24aa09876c0
2021-04-14 12:13:26 +01:00
Madhukar Pappireddy 511c7f3a9d Merge changes from topic "dcc_console" into integration
* changes:
  plat:xilinx:versal: Add JTAG DCC support
  plat:xilinx:zynqmp: Add JTAG DCC support
  drivers: dcc: Support JTAG DCC console
2021-04-13 21:42:55 +02:00
Madhukar Pappireddy 29e11bb299 Merge "driver: brcm: add USB driver" into integration 2021-04-12 16:44:11 +02:00
Madhukar Pappireddy bab737d397 Merge "driver: brcm: add mdio driver" into integration 2021-04-12 16:43:48 +02:00
Venkatesh Yadav Abbarapu e5936205ae drivers: dcc: Support JTAG DCC console
The legacy console is gone. Re-add DCC console support based
on the multi-console framework.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: Ia8388721093bc1be3af40974530d7c9a9ae5f43e
2021-03-31 21:59:45 -06:00
Sandrine Bailleux 27d593ad95 Merge changes from topic "tzc400_stm32mp" into integration
* changes:
  stm32mp1: add TZC400 interrupt management
  stm32mp1: use TZC400 macro to describe filters
  tzc400: add support for interrupts
2021-03-29 18:20:58 +02:00
Bharat Gooty 48c6a6b650 driver: brcm: add i2c driver
Broadcom I2C controller driver. Follwoing API's are supported:-
- i2c_init() Intialize ethe I2C controller
- i2c_probe()
- i2c_set_bus_speed() Set the I2C bus speed
- i2c_get_bus_speed() Get the current bus speed
- i2c_recv_byte() Receive one byte of data.
- i2c_send_byte() Send one byteof data
- i2c_read_byte() Read single byte of data
- i2c_read() Read multiple bytes of data
- i2c_write_byte Write single byte of data
- i2c_write() Write multiple bytes of data

This driver is verified by reading the DDR SPD data.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Change-Id: I2d7fe53950e8b12fab19d0293020523ff8b74e13
2021-03-26 16:22:55 +01:00
Pankaj Gupta 39faa9b291 nxp: adding the smmu driver
NXP SMMU driver API for NXP SoC.
- Currently it supports by-passing SMMU, called only when NXP CAAM
is enabled.
- (TBD) AMQ based SMMU access control: Access Management Qualifiers (AMQ)
  advertised by a bus master for a given transaction.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I23a12928ddedb1a2cf4b396606e35c67e016e331
2021-03-24 09:49:31 +05:30
Kuldeep Singh b525a8f0d2 nxp: add flexspi driver support
Flexspi driver now introduces read/write/erase APIs for complete flash
size, FAST-READ are by default used and IP bus is used for erase, read
and write using flexspi APIs.

Framework layer is currently embedded in driver itself using flash_info
defines.

Test cases are also added to confirm flash functionality currently under
DEBUG flag.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Change-Id: I755c0f763f6297a35cad6885f84640de50f51bb0
2021-03-24 09:49:31 +05:30
Yann Gautier 34c1a1a43c tzc400: add support for interrupts
A new function tzc400_it_handler() is created to manage TZC400
interrupts. The required helpers to read and clear interrupts are added
as well.
In case DEBUG is enabled, more information about the faulty access
(address, NSAID, type of access) is displayed.

Change-Id: Ie9ab1c199a8f12b2c9472d7120efbdf35711284a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-03-23 13:06:15 +01:00
Bharat Gooty 682fe37032 driver: brcm: add USB driver
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Change-Id: I456aa7a641fffa8ea4e833615af3effec42a31b2
2021-03-10 12:11:26 +05:30
Yann Gautier 4f81ed8e1a tzc400: correct FAIL_CONTROL Privileged bit
When bit 20 of TZC400 Fail control register [1] is set to 1, it means
Privileged access, the macros FAIL_CONTROL_PRIV_PRIV and
FAIL_CONTROL_PRIV_UNPRIV are then updated to reflect this.

 [1] https://developer.arm.com/documentation/ddi0504/c/programmers-model/register-descriptions/fail-control-register?lang=en

Change-Id: I01e522fded5cf66c9827293ddcf543c79f9e509e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-03-08 18:15:26 +01:00