Commit Graph

9005 Commits

Author SHA1 Message Date
Madhukar Pappireddy b9f7fcc949 Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration
* changes:
  feat(tc0): add cpu capacity to provide scheduling information
  fix(tc0): remove "arm,psci" from psci node
  feat(tc0): update mhuv2 dts node to align with upstream driver
2021-06-29 00:53:11 +02:00
Mark Dykes ce36b311a6 Merge "fix(drivers/mtd): fix MISRA issues and logic improvement" into integration 2021-06-28 22:15:02 +02:00
Mark Dykes 99ea2e912a Merge "style(scmi_common): add \n to warning messages" into integration 2021-06-28 21:59:41 +02:00
Usama Arif 309f5938e6
feat(tc0): add cpu capacity to provide scheduling information
Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I8d3342315a46c78b4c41582ec114f0364a194316
2021-06-28 20:32:50 +01:00
Usama Arif 814646b4cb
fix(tc0): remove "arm,psci" from psci node
"arm,psci" expects the FIDs for cpu-on, cpu-off and cpu-suspend, which
arent present in the device tree, so remove it from psci compatible.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Icd1ce8ec7fd3f270925e4b3d5d0187088ffe4ba5
2021-06-28 20:32:29 +01:00
Usama Arif 63067ce87e
feat(tc0): update mhuv2 dts node to align with upstream driver
The MHUv2 driver has been merged upstream, and it has a different
dts format compared to what was previously used. This patch aligns
with the upstream driver.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Ic963c21c1475d301c3a75686718e6e17841831c3
2021-06-28 20:32:29 +01:00
Madhukar Pappireddy 02f7031780 Merge "fix(makefile): use space in WARNINGS list" into integration 2021-06-28 18:02:22 +02:00
Olivier Deprez 573119980c Merge "feat(tc0): add bootargs node" into integration 2021-06-28 10:14:30 +02:00
bipin.ravi a5394205e9 Merge "errata: workaround for Cortex A78 errata 1821534" into integration 2021-06-24 16:43:03 +02:00
johpow01 1a691455d9 errata: workaround for Cortex A78 errata 1821534
Cortex A78 erratum 1821534 is a Cat B erratum present in r0p0 and
r1p0 of the A78 processor core, it is fixed in r1p1.

SDEN can be found here:
https://documentation-service.arm.com/static/603e3733492bde1625aa8780

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I71057c4b9625cd9edc1a06946b453cf16ae5ea2c
2021-06-24 00:01:33 +02:00
Mark Dykes 64b8db7e80 Merge "refactor(dt-bindings): align irq bindings with kernel" into integration 2021-06-22 21:21:21 +02:00
Lionel Debieve 5130ad14d5 fix(drivers/mtd): fix MISRA issues and logic improvement
Fix MISRA issues and invert the spi_nor_ready status
to improve readability.
Remove an unneeded variable initialization.

Change-Id: I25a97fbd6c4389156b4f077b986019fa7c30a457
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-06-22 14:10:27 +02:00
Anders Dellien 4a840f27cd feat(tc0): add bootargs node
We will maintain the kernel command line here instead of in U-Boot.

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: I6011306cbaf47717c061f542e180005281695516
2021-06-22 11:57:23 +01:00
Olivier Deprez 967344b520 Merge "feat(spmd): add support for FFA_SPM_ID_GET" into integration 2021-06-18 17:28:39 +02:00
Madhukar Pappireddy 7cfe5999be Merge changes from topic "io_stm32image" into integration
* changes:
  fix(io_stm32image): invalidate cache on local buf
  refactor(io_stm32image): add header size variable
  fix(io_stm32image): uninitialized variable warning
2021-06-18 15:40:20 +02:00
Madhukar Pappireddy 2f0004bbbf Merge changes from topic "imx8m-sdei" into integration
* changes:
  feat(plat/imx8m): add sdei support for i.MX8MP
  feat(plat/imx8m): add sdei support for i.MX8MN
2021-06-18 15:34:01 +02:00
Manish Pandey 0fbc4aa028 Merge "refactor(plat/zynqmp): optimize the code to save some space" into integration 2021-06-18 13:05:16 +02:00
Madhukar Pappireddy 6db111968c Merge "refactor(plat/st): check boot device only for BL2" into integration 2021-06-17 23:44:07 +02:00
Madhukar Pappireddy a8b7a17547 Merge "feat(plat/imx8m): add system_reset2 implementation" into integration 2021-06-17 17:48:51 +02:00
Venkatesh Yadav Abbarapu db97f93963 refactor(plat/zynqmp): optimize the code to save some space
As there is constraint with the space for the release builds,
remove some of the legacy code.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I5b8b16f34ed8e480f16ab1aeac80b85cdb391852
2021-06-17 00:43:41 -06:00
Igor Opaniuk 60a0dde91b feat(plat/imx8m): add system_reset2 implementation
Add imx_system_reset2 which extends existing SYSTEM_RESET. It provides
architectural reset definitions and vendor-specific resets.
By default warm reset is triggered.

Also refactor existing implementation of wdog reset, add details about
each flag used.

Change-Id: Ia7348c32c385f1c61f8085776e81dd1e38ddda5c
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-06-17 02:27:14 +01:00
Manish Pandey 5d582ff936 Merge "refactor(plat/st): avoid fixed DT address" into integration 2021-06-16 23:23:30 +02:00
Manish Pandey 96a0f97862 Merge "rpi4: update the iobase constant" into integration 2021-06-16 23:18:43 +02:00
Manish Pandey 6e34127504 Merge changes Iaf441fe5,I0355ca26 into integration
* changes:
  refactor(gicv3): use helper functions to get SPI/ESPI INTID limit
  refactor(gicv3): add helper function to get the limit of ESPI INTID
2021-06-16 23:17:45 +02:00
Madhukar Pappireddy 16b69ff547 Merge "fix(fdts/morello): fix scmi clock specifier to cluster mappings" into integration 2021-06-16 16:54:54 +02:00
Madhukar Pappireddy f85ab34120 Merge changes I4451ca03,I29be60ec,Ia30bd332,I72fe2275,I37bd65b0 into integration
* changes:
  feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
  feat(plat/nxp/common): add build macro for BOOT_MODE validation checking
  refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk
  refactor(plat/nxp/lx216x): clean up platform configure file
  refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk
2021-06-16 16:28:01 +02:00
Anurag Koul 387a9065a2 fix(fdts/morello): fix scmi clock specifier to cluster mappings
Fix the mapping of SCMI clock specifiers to the clusters they drive.
Also, add CPU cores to cluster mappings.

Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Change-Id: I230bea5614de4e29b54e1686b31bf01c0b6aa86c
2021-06-16 14:38:08 +01:00
Manish Pandey 2a0087796f Merge changes from topic "soc_id" into integration
* changes:
  refactor(plat/nvidia): use SOC_ID defines
  refactor(plat/mediatek): use SOC_ID defines
  refactor(plat/arm): use SOC_ID defines
  feat(plat/st): implement platform functions for SMCCC_ARCH_SOC_ID
  refactor(plat/st): export functions to get SoC information
  feat(smccc): add bit definition for SMCCC_ARCH_SOC_ID
2021-06-16 12:03:17 +02:00
Heyi Guo ce2b49b879 refactor(gicv3): use helper functions to get SPI/ESPI INTID limit
Use helper functions to get SPI and ESPI INTID limit, to remove
several pieces of similar code in gicv3 driver.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: Iaf441fe5e333c4260e7f6d98df6fdd931591976d
2021-06-16 09:37:14 +08:00
Heyi Guo 30524ff80a refactor(gicv3): add helper function to get the limit of ESPI INTID
Add helper function gicv3_get_espi_limit() to get the value of
(maximum extended SPI INTID + 1), so that some duplicated code can be
removed later.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I0355ca2647f872e8189add259f6c47d415494cce
2021-06-16 09:24:31 +08:00
Mark Dykes ed0f0a0968 Merge "docs: change Linaro release version to 20.01" into integration 2021-06-15 17:08:54 +02:00
Jiafei Pan 28b3221aeb feat(plat/nxp/lx2): add SUPPORTED_BOOT_MODE definition
Add macro of SUPPORTED_BOOT_MODE for board lx2160ardb, lx2160aqds,
lx2162aqds.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I4451ca030eca79c9bc5fee928eec497a7f0e878c
2021-06-15 17:43:04 +08:00
Jiafei Pan cd1280ea2e feat(plat/nxp/common): add build macro for BOOT_MODE validation checking
1. Added the build macro "add_boot_mode_define".
2. Use the macro to validate current BOOT_MODE against the
   pre-determined list of SUPPORTED_BOOT_MODE, so each platform
   need to define the list: SUPPORTED_BOOT_MODE.
3. Reports error if BOOT_MODE is not in SUPPORTED_BOOT_MODE list,
   or BOOT_MODE is not supported yet althoug it is in SUPPORTED_BOOT_MODE.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I29be60ecdb19fbec1cd162e327cdfb30ba629b07
2021-06-15 17:43:04 +08:00
Jiafei Pan 9398841e21 refactor(plat/nxp/common): moved soc make-variables to new soc_common_def.mk
Move some soc make variables to new soc_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia30bd332c95b6475f1cfee2f03a8ed3892a9568d
2021-06-15 17:43:04 +08:00
Jiafei Pan 9663160d91 refactor(plat/nxp/lx216x): clean up platform configure file
Use common code in common file to configure platform.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I72fe22751f12b8a4996a7b9f75fae4c912ea86de
2021-06-15 17:43:04 +08:00
Jiafei Pan 5d5c3ff3f7 refactor(plat/nxp/common): moved plat make-variables to new plat_common_def.mk
Move some common make variables to new plat_common_def.mk,
then it can be reused by other platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I37bd65b0f8124f63074fa03339f886c2cdb30bd3
2021-06-15 17:43:04 +08:00
Yann Gautier f1b6b014d7 refactor(dt-bindings): align irq bindings with kernel
The arm-gic.h was a concatenation of arm-gic.h and irq.h from Linux.
Just copy the 2 files here. They both have MIT license which is accepted
in TF-A.
With this alignment, a new macro is added (GIC_CPU_MASK_SIMPLE).

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib45174f35f1796ebb7f34af861b59810cfb808b0
2021-06-14 10:05:48 +02:00
Peng Fan 6b63125c41 feat(plat/imx8m): add sdei support for i.MX8MP
Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I8308c629448bd8adca9d3d25701adcf0c5a6afc2
2021-06-12 21:53:59 +08:00
Peng Fan ce2be321e8 feat(plat/imx8m): add sdei support for i.MX8MN
Add sdei support for i.MX8MN, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: Ie15fffdd09e1bba1b22334b8ccac2335c96b8b4d
2021-06-12 21:53:41 +08:00
Alexei Fedorov a57e6e4995 Merge "refactor(gicv3): add helper function to get the limit of SPI INTID" into integration 2021-06-11 12:23:34 +02:00
Madhukar Pappireddy dd0592c913 Merge "docs: change owner for MediaTek platforms" into integration 2021-06-11 00:47:58 +02:00
Joanna Farley 9598863d20 Merge "build(hooks): bump trim-newlines from 3.0.0 to 3.0.1" into integration 2021-06-10 14:50:27 +02:00
dependabot[bot] 7249e7f960 build(hooks): bump trim-newlines from 3.0.0 to 3.0.1
Bumps [trim-newlines](https://github.com/sindresorhus/trim-newlines) from 3.0.0 to 3.0.1.
- [Release notes](https://github.com/sindresorhus/trim-newlines/releases)
- [Commits](https://github.com/sindresorhus/trim-newlines/commits)

---
updated-dependencies:
- dependency-name: trim-newlines
  dependency-type: indirect
...

Change-Id: Ie7bcbf8a328d43de004c2f2dbe731f865ef0024d
Signed-off-by: dependabot[bot] <support@github.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>
2021-06-10 12:31:36 +01:00
Mark Dykes b085b990ed Merge "feat(plat/mediatek/mpu): add MPU support for DSP" into integration 2021-06-10 00:09:13 +02:00
Mark Dykes 66bf006e28 Merge "fix(security): Set MDCR_EL3.MCCD bit" into integration 2021-06-08 18:26:52 +02:00
Joanna Farley 8055bbf7bb Merge "docs(imx8m): update build support for imx8mq" into integration 2021-06-08 17:23:06 +02:00
Heyi Guo 05579daf79 style(scmi_common): add \n to warning messages
Add newline(\n) to make the message clearer when the warnings are
really triggered.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I5e2574a52c9065db32ecb4d453b9b02445f69a82
2021-06-08 20:10:35 +08:00
Heyi Guo 1e9428ea96 refactor(gicv3): add helper function to get the limit of SPI INTID
Add helper function gicv3_get_spi_limit() to get the value of (maximum
SPI INTID + 1), so that some duplicated code can be removed later.

Signed-off-by: Heyi Guo <guoheyi@linux.alibaba.com>
Change-Id: I160c8a88fbb71d22790b8999a84afbfba766f5e7
2021-06-08 19:07:49 +08:00
Jacky Bai e3c07d2f5a docs(imx8m): update build support for imx8mq
Due to the small OCRAM space used for TF-A, we will
meet imx8mq build failure caused by too small RAM size.
We CANNOT support it in TF-A CI. It does NOT mean that
imx8mq will be dropped by NXP. NXP will still actively
maintain it in NXP official release.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Iad726ffbc4eedc5f6770612bb9750986b9324ae9
2021-06-08 09:35:14 +08:00
Madhukar Pappireddy b39a1308ab Merge changes I85a87dc9,If75df769,I55b0c910 into integration
* changes:
  feat(plat/st): add STM32MP_EMMC_BOOT option
  feat(drivers/st): manage boot part in io_mmc
  feat(drivers/mmc): boot partition read support
2021-06-07 18:21:16 +02:00