Commit Graph

69 Commits

Author SHA1 Message Date
Hadi Asyrafi d8820789ca intel: Platform common code refactor
Pull out common code from agilex and stratix10

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Iddc0a9e6eccb30823d7b15615d5ce9c6bedb2abc
2019-08-01 16:39:27 +08:00
Soby Mathew d0d0f17164 Merge changes from topic "jc/shift-overflow" into integration
* changes:
  Enable -Wshift-overflow=2 to check for undefined shift behavior
  Update base code to not rely on undefined overflow behaviour
  Update hisilicon drivers to not rely on undefined overflow behaviour
  Update synopsys drivers to not rely on undefined overflow behaviour
  Update imx platform to not rely on undefined overflow behaviour
  Update mediatek platform to not rely on undefined overflow behaviour
  Update layerscape platform to not rely on undefined overflow behaviour
  Update intel platform to not rely on undefined overflow behaviour
  Update rockchip platform to not rely on undefined overflow behaviour
  Update renesas platform to not rely on undefined overflow behaviour
  Update meson platform to not rely on undefined overflow behaviour
  Update marvell platform to not rely on undefined overflow behaviour
2019-07-16 10:11:27 +00:00
Justin Chadwell 36cfbf3ca2 Update intel platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.

Change-Id: I4c7a315cb18b3bbe623e7a7a998d2dac869638a7
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-07-11 12:10:58 +01:00
Tien Hock, Loh 0943ea379f plat/intel: Fix SMPLSEL for MMC
MMC sample select needs to be set properly so that DWMMC clock can be
driven to 50Mhz

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I4a1dde4f6a1e78a36940c57a7a5b162be0bd443a
2019-07-10 11:39:03 +08:00
Paul Beesley 39c92b6271 Merge changes from topic "av/console-port" into integration
* changes:
  qemu: use new console interface in aarch32
  warp7: remove old console from makefile
  Remove MULTI_CONSOLE_API flag and references to it
  Console: removed legacy console API
2019-06-28 11:04:02 +00:00
Ambroise Vincent 5b6ebeec9c Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.

Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-06-28 10:52:48 +01:00
Hadi Asyrafi bf719f66a7 intel: Pull out common drivers into platform common
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib79e2c6fe6e66dec5004701133ad6a5f4c78f2fa
2019-06-26 18:45:01 +08:00
Muhammad Hadi Asyrafi Abdul Halim 10e70f87e0 intel: Enable watchdog timer on Intel S10 platform
Watchdog driver support & enablement during platform setup

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
2019-03-21 10:35:24 +08:00
Soby Mathew c61a807a4f
Merge pull request #1874 from hadi-asyrafi/qspi_boot
intel: QSPI boot enablement
2019-03-13 15:31:33 +00:00
Muhammad Hadi Asyrafi Abdul Halim f5ba408c34 intel: QSPI boot enablement
Manages QSPI initialization, configuration and IO handling as boot device

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
2019-03-13 10:17:14 +08:00
Muhammad Hadi Asyrafi Abdul Halim 150f1bc2ee intel: Add driver for QSPI
To support the enablement of QSPI booting

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
2019-03-13 10:08:24 +08:00
Dimitris Papastamos 3c652a2d1c
Merge pull request #1863 from thloh85-intel/mmc_fixes
drivers: mmc: Fix some issues with MMC stack
2019-03-08 09:41:22 +00:00
Tien Hock, Loh dd8c03b6bf plat: intel: Add MMC OCR voltage information for initialization
MMC stack needs OCR voltage information for the platform to initialize
MMC controller correctly.

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
2019-03-08 09:26:24 +08:00
Dimitris Papastamos a6561a28d6
Merge pull request #1864 from hadi-asyrafi/mailbox_fix
intel: Mailbox service un-accessible
2019-03-07 13:58:12 +00:00
Muhammad Hadi Asyrafi Abdul Halim 5bd1b445a9 intel: Mailbox service un-accessible
Change map region for device 2 from non-secure to secure

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
2019-03-07 13:17:25 +08:00
Tien Hock, Loh bf8b8fb657 plat: intel: Improve ECC scrubbing performance
We should be using zeromem to scrub memory instead of memset. This would
improve the performance by 200x

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
2019-03-07 11:28:05 +08:00
Tien Hock, Loh 1cf55aba49 plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform
This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A
supports:
- PSCI calls to enable 4 CPU cores
- PSCI mailbox calls for FPGA reconfiguration

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
2019-02-26 09:25:14 +08:00
Loh Tien Hock 51f366ac85 plat: intel: Fix faulty DDR calibration value
A DDR calibration value is missing write mask, causing ECC DDR calibration
to fail. This patch addresses the issue. ECC should also be scrubbed before
MMU initializes, thus the scrubbing is moved to ddr intialization phase.

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
2019-02-13 14:39:31 +08:00
Loh Tien Hock 9d82ef26c6 plat: intel: Add BL2 support for Stratix 10 SoC
This adds BL2 support for Intel Stratix 10 SoC FPGA.
Functionality includes:
- Release and setup peripherals from reset
- Calibrate DDR
- ECC DDR Scrubbing
- Load FIP (bl31 and bl33)

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
2019-02-04 16:17:24 +08:00