Commit Graph

9573 Commits

Author SHA1 Message Date
Yann Gautier e8a953a9b8 feat(fdts stm32mp1): align DT with latest kernel
Update STM32MP1 device tree files with kernel 5.15.

Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-28 11:36:54 +02:00
Sandrine Bailleux 292bb9a768 Merge "fix: remove "experimental" tag for stable features" into integration 2021-10-27 13:30:00 +02:00
Manish Pandey 04deada5d1 Merge "fix(spmd): revert workaround hafnium as hypervisor" into integration 2021-10-27 12:59:19 +02:00
Olivier Deprez 3221fce842 fix(spmd): revert workaround hafnium as hypervisor
This change essentially reverts [1] by removing the BL31 workaround
forcing the dtb address when Hafnium is loaded as an Hypervisor.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/9569

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I302161d027261448113c66b7fafa9c11620b54ef
2021-10-26 18:19:47 +02:00
Madhukar Pappireddy 387ff949e6 Merge "fix(sdei): print event number in hex format" into integration 2021-10-22 22:12:15 +02:00
Vasyl Gomonovych 6b94356b57 fix(sdei): print event number in hex format
SDEI specified event numbers in hexadecimal format.
Change event number format to hexadecimal to make
it easier for the reader to recognize the proper event.

Change-Id: Iac7a91d0910316e0ad54a8f09bc17209e8c6adf6
Signed-off-by: Vasyl Gomonovych <vgomonovych@marvell.com>
2021-10-22 13:45:06 +01:00
Manish Pandey 700e7685dd fix: remove "experimental" tag for stable features
there are features which are marked as experimental even though they
are stable and used for quite some time.
Following features are no longer marked as experimental
  - SPMD
  - MEASURED_BOOT
  - FCONF and associated build flags
  - DECRYPTION_SUPPORT and associated build flags
  - ENABLE_PAUTH
  - ENABLE_BTI
  - USE_SPINLOCK_CAS
  - GICv3 Multichip support

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I4bb653d9c413c66095ec31f0b8aefeb13ea04ee9
2021-10-22 10:49:20 +01:00
Manish Pandey 53602a1393 Merge "fix(cpu): correct Demeter CPU name" into integration 2021-10-21 21:53:19 +02:00
Madhukar Pappireddy 0172ac30ff Merge "fix(scmi): mention "SCMI" in driver initialisation message" into integration 2021-10-21 21:11:12 +02:00
johpow01 4cb576a0c5 fix(cpu): correct Demeter CPU name
This patch changes Cortex Demeter to Neoverse Demeter.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7306d09ca60e101d0a96c9ceff9845422d75c160
2021-10-21 20:12:28 +02:00
Manish Pandey 65da2f2af7 Merge "docs(stm32mp1): fix FIP command with OP-TEE" into integration 2021-10-21 16:27:16 +02:00
Yann Gautier 500888511d docs(stm32mp1): fix FIP command with OP-TEE
When building a FIP with OP-TEE as BL32 on STM32MP1, AARCH32_SP=optee
has to be added to the make command.

Change-Id: I900c01957fe4ed7ed13ca955edd91ed1c5c5c4fa
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-21 14:59:40 +02:00
Sandrine Bailleux ed6f89e95b Merge "fix(pie): invalidate data cache in the entire image range if PIE is enabled" into integration 2021-10-21 08:42:05 +02:00
Madhukar Pappireddy e86162aa26 Merge "feat(cpu): add support for Hunter CPU" into integration 2021-10-20 20:35:01 +02:00
johpow01 fb9e5f7bb7 feat(cpu): add support for Hunter CPU
This patch adds the basic CPU library code to support the Hunter CPU
in TF-A. This CPU is based on the Makalu core so that library code
was adapted as the basis for this patch.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I956b2dc0f43da7cec3e015252392e2694363e1b3
2021-10-20 20:05:59 +02:00
Julius Werner 0a712819f2 Merge "feat(plat/qti/sc7280): add support for pmk7325" into integration 2021-10-20 01:39:40 +02:00
Madhukar Pappireddy 4ac11a1528 Merge "build(plat/marvell): do not print comments on stdout" into integration 2021-10-19 22:46:37 +02:00
Manish Pandey 33d99fdb48 Merge "fix(lib/optee): correct signedness comparison" into integration 2021-10-19 22:22:55 +02:00
Zelalem Aweke 596d20d9e4 fix(pie): invalidate data cache in the entire image range if PIE is enabled
Currently on image entry, the data cache in the RW address range is
invalidated before MMU is enabled to safeguard against potential
stale data from previous firmware stage. If PIE is enabled however,
RO sections including the GOT may be also modified during pie fixup.
Therefore, to be on the safe side, invalidate the entire image
region if PIE is enabled.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I7ee2a324fe4377b026e32f9ab842617ad4e09d89
2021-10-19 21:30:56 +02:00
Pali Rohár 7b81471f91 build(plat/marvell): do not print comments on stdout
'#' needs to be before TAB, otherwise comment is printed on stdout during build.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I502374ef35d91e194dc35b78d31d6884a466fab2
2021-10-19 16:10:29 +02:00
Manish Pandey cc808acb9d Merge "fix(cc-713): fix a build failure with CC-713 library" into integration 2021-10-19 14:34:09 +02:00
Olivier Deprez e43949e240 Merge changes I6daaed9a,I3ef31047 into integration
* changes:
  feat(plat/arm): Add DRAM2 to TZC non-secure region
  fix(plat/arm): remove unused memory node
2021-10-19 11:58:56 +02:00
Andre Przywara e0baae7316 fix(scmi): mention "SCMI" in driver initialisation message
Currently the SCMI driver reports:
INFO:    Initializing driver on Channel 0
on the console, which is not very specific (which driver?).

Add "SCMI" to the message so the user knows what the firmware is trying
to initialise.

Change-Id: Id8202655d07b8e12fe07670d462c6202e6eae2f0
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-10-19 10:58:32 +02:00
André Przywara b4deee5971 Merge "fix(scmi): relax requirement for exact protocol version" into integration 2021-10-19 10:58:09 +02:00
Manish Pandey 0271be0dab Merge "feat(psci): require validate_power_state to expose CPU_SUSPEND" into integration 2021-10-18 18:28:55 +02:00
Manish Pandey 392547c365 Merge "fix(errata_report): correct typo" into integration 2021-10-18 18:26:54 +02:00
Madhukar Pappireddy b4f7320afa Merge "feat(plat/mdeiatek/mt8195): remove adsp event from wakeup source" into integration 2021-10-18 17:34:22 +02:00
Manish Pandey a06f2f4355 Merge changes from topic "ufs_patches" into integration
* changes:
  fix(ufs): add reset before DME_LINKSTARTUP
  refactor(ufs): add retry logic to ufshc_reset
  refactor(ufs): reuse ufshc_send_uic_cmd
2021-10-18 14:13:17 +02:00
Joanna Farley bf63dc56b0 Merge changes I684d54a7,I61339fc5,Ic0dabf3e,Ief09a841 into integration
* changes:
  feat(plat/rcar): change process for Suspend To RAM
  fix(plat/rcar): change process that copy code to system ram
  fix(plat/rcar): fix cache maintenance process of reading cert header
  fix(plat/rcar): fix to load image when option BL2_DCACHE_ENABLE is enabled
2021-10-18 10:14:07 +02:00
Joanna Farley 381d685021 Merge changes Id7d4f5df,If82542cc,I0ba80057,I75a443db,Ifa18b4fc, ... into integration
* changes:
  feat(nxp/common/ocram): add driver for OCRAM initialization
  feat(plat/nxp/common): add EESR register definition
  fix(plat/nxp/ls1028a): fix compile error when enable fuse provision
  fix(drivers/nxp/sfp): fix compile warning
  fix(plat/nxp/ls1028a): define endianness of scfg and gpio
  fix(nxp/scfg): fix endianness checking
2021-10-18 09:54:28 +02:00
Toshiyuki Ogasahara 731aa26f38 feat(plat/rcar): change process for Suspend To RAM
- Added the function rcar_pwr_domain_pwr_down_wfi() for power down process.
  And change the sequence to power down.
- Removed clearing the count of psci_locks (PSCI exclusive lock) during
  Warm Boot.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I684d54a798a6dccde15fbebe16c6e104cbb470ed
2021-10-16 17:41:50 +02:00
Toshiyuki Ogasahara 49593cc1ce fix(plat/rcar): change process that copy code to system ram
Change processing of invalidate instruction cache to after changing
the RAM attribute.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # squash with rcar_gen3: drivers: Disable data cache while Suspend To RAM
Change-Id: I61339fc5415b26074b1e0753da4c4a432e8f83d9
2021-10-16 17:41:49 +02:00
Toshiyuki Ogasahara c77ab18ec7 fix(plat/rcar): fix cache maintenance process of reading cert header
Move calling inv_dcache_range from before io_read to after that.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ic0dabf3eb94eeeb04099ed5127cdfda79bbac9b3
2021-10-16 17:41:49 +02:00
Toshiyuki Ogasahara d2ece8dba2 fix(plat/rcar): fix to load image when option BL2_DCACHE_ENABLE is enabled
- Modify load destination variable of the Cert Header to static.
- Modify the return value to error (IO_FAIL) when failed to check
  the Cert Header.

Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ief09a841ec8d2ae236de82d04855e6a47cfb43f0
2021-10-16 17:41:34 +02:00
Jorge Troncoso 905635d5e7 fix(ufs): add reset before DME_LINKSTARTUP
This change aims to make the UFS code more robust by performing a
controller reset if linkstartup fails. This idea was borrowed from
Linux's ufshcd_link_startup function.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I6b52148d1bf155b11198dc82a39b1120057adaaf
2021-10-15 13:22:49 -07:00
Jorge Troncoso 99ff1a35fe refactor(ufs): add retry logic to ufshc_reset
This change aims to make the UFS code more robust by adding retry logic
and timeouts to ufshc_reset. We also define a new function
ufshc_hce_enable for Host Controller Enable (HCE). The inner and outer
retry pattern is based on Linux's ufshcd_hba_execute_hce function.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I9403a5a25d3ca50af5f2f9a65b774f6a2d7a9626
2021-10-15 13:22:49 -07:00
Jorge Troncoso d68d163dd7 refactor(ufs): reuse ufshc_send_uic_cmd
This change aims to make the UFS code more robust by removing asserts
and adding retry logic. We also reduce repetition by reusing
ufshc_send_uic_cmd for DME_GET and DME_SET commands.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: Id70aa1687d5ca78dc7d47234372255ac5a04a612
2021-10-15 13:22:49 -07:00
Mark Dykes 3deb060015 Merge changes from topic "st_dt_match_instance" into integration
* changes:
  refactor(stm32_sdmmc2): use DT helpers
  feat(plat/st): create new helper for DT access
2021-10-15 20:53:01 +02:00
Samuel Holland a1d5ac6a5a feat(psci): require validate_power_state to expose CPU_SUSPEND
psci_cpu_suspend unconditionally calls psci_validate_power_state, which
asserts that the platform implements ops->validate_power_state. To avoid
a failure at runtime, do not expose CPU_SUSPEND unless that callback is
implemented. This also allows a platform to provide SYSTEM_SUSPEND
without providing CPU_SUSPEND.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I5dafb7845f482ab3af03a9de562def41dd70189e
2021-10-15 14:13:54 +02:00
Manish Pandey 02d36a92fc Merge "fix(plat/st): only check header major when booting" into integration 2021-10-15 13:48:10 +02:00
Manish V Badarkhe e5fbee5085 fix(cc-713): fix a build failure with CC-713 library
Fixed a below build failure with CC-713 library
error:
implicit declaration of function ‘mbedtls_x509_get_rsassa_pss_params’
[-Werror=implicit-function-declaration]

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: If298ec16d133cf54413c299327b2c007ec4117b2
2021-10-15 12:30:06 +02:00
Mark Dykes 09665c8348 Merge "fix(plat/st): correct signedness comparison issue" into integration 2021-10-14 23:25:28 +02:00
Mark Dykes 7b97cf378a Merge changes from topic "st_fixes" into integration
* changes:
  fix(stpmic1): fix power switches activation
  fix(stpmic1): update error cases return
  refactor(stpmic1): use BIT and GENMASK helpers
  fix(stm32mp1_clk): keep RTC clock always on
  fix(stm32mp1_clk): set other clocks as always on
2021-10-14 23:16:36 +02:00
Mark Dykes 115901bc2d Merge "fix(stm32mp1_clk): fix MPU clock rate" into integration 2021-10-14 22:56:25 +02:00
Mark Dykes d20d5002f9 Merge "fix(stm32mp1_clk): fix MCU/AXI parent clock" into integration 2021-10-14 22:56:15 +02:00
Mark Dykes 34ddd83bc8 Merge "refactor(stm32mp_clk): keep RCC node offset" into integration 2021-10-14 22:55:48 +02:00
Manish Pandey 68d8d3e7af Merge "fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe" into integration 2021-10-14 18:03:28 +02:00
Edward-JW Yang c260b3246b feat(plat/mdeiatek/mt8195): remove adsp event from wakeup source
Audio DSP is power-off when system suspend. Remove it from
wakeup source list to prevent unnecessary wakeup.

Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Id7251de9c8b9c9a4a4b2c41a310168d336035b9a
2021-10-14 19:25:28 +08:00
Madhukar Pappireddy 17c1f1e6ec Merge "fix(stm32mp1): add bl prefix for internal linker script" into integration 2021-10-13 18:54:55 +02:00
Nicola Mazzucato 125868c941 fix(scmi): relax requirement for exact protocol version
Currently, for the supported SCMI protocols, the version returned by the SCMI
platform agent must be exactly matching the driver's version (major version).

The recent change for the required version of Power Domain protocol means that
the platform must return version 2.0. This can be however a limitation in some
cases, where a SCMI-v1.0 platform can still be considered compatible with the
driver supported in firmware.

Relax the protocol version requirement such that any version older than the
one supported by the drivers can still be compatible.

Note: For now this has effect only on Power Domain protocol, as the other
drivers still require the "base" version 1.0.

Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
Change-Id: I310ae1869c2e952991a8d733f394029ab64087bf
2021-10-13 16:53:15 +01:00