Commit Graph

3740 Commits

Author SHA1 Message Date
Roberto Vargas fec3648478 Create a library file for libfdt
TF Makefile was linking all the objects files generated for the
fdt library instead of creating a static library that could be
used in the linking stage.

Change-Id: If3705bba188ec39e1fbf2322a7f2a9a941e1b90d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-08-03 11:31:26 +01:00
Roberto Vargas 5fee02873b Add make macros to build library archives
This patch adds all the make macros needed to create a library archive
and to use it in the link stage.

Change-Id: I26597bfd6543649d0b68a9b1e06aec1ba353e6de
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-08-03 11:31:24 +01:00
Dimitris Papastamos f68bc8a1c2
Merge pull request #1506 from danielboulby-arm/db/SeparateCodeAndROData
Fix build for SEPARATE_CODE_AND_RODATA=0
2018-08-03 10:56:47 +01:00
Dimitris Papastamos f943ce74ae
Merge pull request #1509 from antonio-nino-diaz-arm/an/bool
xlat: psci: Use bool instead of int
2018-08-03 10:53:12 +01:00
Dimitris Papastamos 0454f64b72
Merge pull request #1503 from ARM-software/dh/dual-lic
Update license information in readme.rst
2018-08-03 09:36:49 +01:00
Dimitris Papastamos 90b19376b9
Merge pull request #1508 from sandrine-bailleux-arm/sb/fix-trusty-build
Fix handler prototype in Trusty generic dispatcher
2018-08-03 09:34:58 +01:00
Antonio Nino Diaz 362030bf06 psci: Use bool in internal interfaces
Change-Id: I77c9cd2d1d6d0122cc49917fa686014bee154589
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-02 15:08:18 +01:00
Antonio Nino Diaz 5b395e3746 xlat: Use bool instead of int
Change-Id: I35d5b6a7c219f6f38983b30f157c1ed3808af17f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-08-02 15:08:18 +01:00
Dimitris Papastamos f214a80698
Merge pull request #1507 from jeenu-arm/bool
Define bool type
2018-08-02 10:21:27 +01:00
Daniel Boulby 2ecaafd2e8 Fix build for SEPARATE_CODE_AND_RODATA=0
TF won't build since no memory region is specified
for when SEPARATE_CODE_AND_RODATA=0 it still relies on
the ARM_MAP_BL_RO_DATA region which is never defined for
this case. Create memory region combining code and RO data for
when the build flag SEPARATE_CODE_AND_RODATA=0 to fix this

Change-Id: I6c129eb0833497710cce55e76b8908ce03e0a638
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
2018-08-01 16:26:26 +01:00
Jeenu Viswambharan eea75baa97 Define bool type
This would enable us to write semantically sensible code.

Change-Id: Ie7c75f9c024f671a037448f5c0922174fff3f0ce
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2018-08-01 15:15:11 +01:00
Sandrine Bailleux 2de6deaae5 Fix handler prototype in Trusty generic dispatcher
Fix the types of the arguments of trusty_generic_platform_smc()
to match the expected prototype of a runtime service handler
(see rt_svc_handle_t type).

Change-Id: Ie839d116ca924b4b018ea2abbef72a1073da2a32
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2018-08-01 16:07:20 +02:00
Dimitris Papastamos e313c122a7
Merge pull request #1500 from danielboulby-arm/db/RORedirection
Set console function pointers to const
2018-07-31 16:09:07 +01:00
Dan Handley 327cfc273f Update license information in readme.rst
Added information on how disjunctively dual licensed code from
other projects is treated in the TF-A project.

Change-Id: Idca329abba4d36bd3c4fd722ac1556940b9135a2
Signed-off-by: Dan Handley <dan.handley@arm.com>
2018-07-31 09:47:15 +01:00
Dimitris Papastamos 72bc63185c
Merge pull request #1498 from glneo/cache-early-fixes
Early cache enable and coherency fixes
2018-07-30 16:53:34 +01:00
Dimitris Papastamos 2ee596c498
Merge pull request #1493 from antonio-nino-diaz-arm/an/xlat-misra
Fix MISRA defects in xlat tables lib and SP805 driver
2018-07-30 16:44:43 +01:00
Daniel Boulby 455bca21fe Set console function pointers to const
Set the function pointers in the console struct and the functions
they point to to const since they only need to be defined when
the console is being initialised and should not be changed after

Change-Id: I0574307111e3ab2f13d1a4a74c3fa75532dfa4be
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
2018-07-30 13:10:44 +01:00
Antonio Nino Diaz 354305c3cf Fix MISRA defects in SP805 driver
Fix violations of MISRA C-2012 Rules 10.1, 10.3 and 10.4.

Change-Id: I13c6acda798c1666892f630f097a23e68748f9e4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-30 09:30:15 +01:00
Antonio Nino Diaz e7b9886c7c xlat: Fix MISRA defects
Fix defects of MISRA C-2012 rules 8.13, 10.1, 10.3, 10.4, 10.8, 11.6,
14.4, 15.7, 17.8, 20.10, 20.12, 21.1 and Directive 4.9.

Change-Id: I7ff61e71733908596dbafe2e99d99b4fce9765bd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-07-30 09:30:15 +01:00
Soby Mathew eef90a772d
Merge pull request #1497 from SNG-ARM/master
RAS changes for SGI575 platform
2018-07-27 11:03:13 +01:00
Soby Mathew 128dad9a20
Merge pull request #1494 from hzhuang1/pcie_pin
Hikey960: configure pins for PCIe controller
2018-07-27 11:02:36 +01:00
Kaihua Zhong 16bec9c25b Hikey960: configure pins for PCIe controller
GPIO_089 connects to PCIE_PERST_N. It needs to be configured as
output low.

Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2018-07-27 16:24:23 +08:00
Andrew F. Davis 903f13d312 ti: k3: common: Only enable caches early
We can enter and exit coherency without any software operations,
but HW_ASSISTED_COHERENCY has stronger implications that are
causing issues. Until these can be resolved, only use the weaker
WARMBOOT_ENABLE_DCACHE_EARLY flag.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-07-26 14:31:06 -05:00
Andrew F. Davis 9262eb54db GIC: Do not flush cache when unneeded
When a platform enables its caches before it initializes the
GICC/GICR interface then explicit cache maintenance is not
needed. Remove these here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-07-26 14:14:07 -05:00
Andrew F. Davis 39a8fa70f0 PSCI: Fix logic error to skip cache flushing
If either USE_COHERENT_MEM or HW_ASSISTED_COHERENCY being true
should cause us to not enter the ifdef block, then the logic
is not correct here. Posibly bad use of De Morgan's law?
Fix this.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-07-26 14:14:06 -05:00
Sughosh Ganu f29d18289a RAS: SGI: Add flags needed to build components for RAS feature
Add the various flags that are required to build the components needed
to enable the RAS feature on SGI575 platform. By default, all flags
are set to 0, disabling building of all corresponding components.

Change-Id: I7f8536fba895043ef6e397cc33ac9126cb572132
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 22:13:44 +05:30
Sughosh Ganu 167dae4dc6 RAS: SGI575: Add platform specific RAS changes
Add platform specific changes needed to add support for the RAS
feature on SGI575 platform, including adding a mapping for the
CPER buffer being used on SGI575 platform.

Change-Id: I01a982e283609b5c48661307906346fa2738a43b
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 22:10:27 +05:30
Sughosh Ganu 485fc95443 RAS: SGI: Add platform handler for RAS interrupts
Add a platform specific handler for RAS interrupts and configure the
platform RAS interrupts for EL3 handling. The interrupt handler passes
control to StandaloneMM code executing in S-EL0, which populates the
CPER buffer with relevant error information. The handler subsequently
invokes the SDEI client which processes the information in the error
information in the CPER buffer. The helper functions
plat_sgi_get_ras_ev_map and plat_sgi_get_ras_ev_map_size would be
defined for sgi platforms in the subsequent patch, which adds sgi575
specific RAS changes.

Change-Id: I490f16c15d9917ac40bdc0441659b92380108d63
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 22:03:32 +05:30
Sughosh Ganu d952391914 SPM: SGI: Map memory allocated for secure partitions
The secure partition manager reserves chunks of memory which are used
for the S-EL0 StandaloneMM image and the buffers required for
communication between the Non-Secure world with the StandaloneMM
image. Add the memory chunks to relevant arrays for mapping the
regions of memory with corresponding attributes.

Change-Id: If371d1afee0a50ca7cacd55e16aeaca949d5062b
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 22:02:39 +05:30
Sughosh Ganu 2e4a509dde ARM platforms: Allow board specific definition of SP stack base
The SGI platforms need to allocate memory for CPER buffers. These
platform buffers would be placed between the shared reserved memory
and the per cpu stack memory, thus the need to redefine stack base
pointer for these platforms. This patch allows each board in ARM
platform to define the PLAT_SP_IMAGE_STACK_BASE.

Change-Id: Ib5465448b860ab7ab0f645f7cb278a67acce7be9
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 22:01:29 +05:30
Sughosh Ganu d9cc9372e1 SGI: Include arm_spm_def.h in platform_def.h
Include arm_spm_def.h in the platform_def.h file. Without this
inclusion, we get build errors like

In file included from services/std_svc/spm/sp_setup.c:12:0:
services/std_svc/spm/sp_setup.c: In function 'spm_sp_setup':
services/std_svc/spm/sp_setup.c:61:57: error: 'PLAT_SPM_BUF_BASE'
  undeclared (first use in this function)
  write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X0, PLAT_SPM_BUF_BASE);

Now that the platform_def.h includes arm_spm_def.h, remove inclusion
of platform_def.h in arm_spm_def.h to remove the circular dependency.

Change-Id: I5225c8ca33fd8d288849524395e436c3d56daf17
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 22:00:26 +05:30
Sughosh Ganu 4576f73caa RAS: ras_common: Add null pointer check for error record probe function
Add a null pointer check for the error record probe
function -- avoids a panic in case a platform has not defined it.

Change-Id: I1139fa0df33297a12ec16615cacd07540925f991
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 21:58:45 +05:30
Sughosh Ganu 46b69e3de1 Include board_arm_def.h through the platform's header
The board_arm_def.h header file needs to be included via the platform
definition header. Not doing so, results in a redefinition error of
PLAT_ARM_MAX_BL31_SIZE macro, if defined in the platform definition
file.

Change-Id: I1d178f6e8a6a41461e7fbcab9f6813a2faa2d82b
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
2018-07-26 21:52:38 +05:30
danh-arm 60e062fb0e
Merge pull request #1486 from antonio-nino-diaz-arm/an/psci-misra
Fix several MISRA defects in PSCI library
2018-07-25 16:09:54 +01:00
danh-arm d87d524ee4
Merge pull request #1466 from Yann-lms/stm32mp1
Add STMicroelectronics STM32MP1 platform support
2018-07-25 16:05:35 +01:00
danh-arm e16d459daa
Merge pull request #1492 from jts-arm/docs
Reword LOAD_IMAGE_V2 in user guide & fix a typo
2018-07-25 15:23:58 +01:00
danh-arm cad25f1484
Merge pull request #1491 from jeenu-arm/misra-fix
Arm platforms: Fix type mismatch for arm_pm_idle_states
2018-07-25 15:23:25 +01:00
danh-arm f94523ed9e
Merge pull request #1472 from danielboulby-arm/db/Reclaim
Rework page table setup for varying number of mem regions
2018-07-25 15:16:24 +01:00
Yann Gautier efb3728d24 Update list of maintainers for STM32MP1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-07-24 17:18:47 +02:00
Yann Gautier f0958d8444 stm32mp1: Add platform documentation
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2018-07-24 17:18:45 +02:00
Yann Gautier f74cbc93a8 stm32mp1: Link BL2, BL32 and DTB in one binary
platform.mk is updated to have compilation rules for DTB, stm32image tool,
and the concatenation of the 3 binaries.
A new linker script and an assembly file are added to manage this.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:18:41 +02:00
Yann Gautier 5fbcdd056b tools: Add stm32image tool into TF-A
This tools adds a specific header to ST TF-A binary.
This header is used by STM32MP1 ROM code to check the bootloader.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:18:37 +02:00
Yann Gautier 587f60fac5 stm32mp1: Add device tree files
Those device tree files are taken from STM32MP1 U-Boot and Linux.
And they are updated to fit TF-A needs.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:18:35 +02:00
Yann Gautier 964dfee1a2 stm32mp1: Add BL32 SP_min secure monitor
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2018-07-24 17:18:32 +02:00
Yann Gautier 10a511ceaa stm32mp1: Add DDR support and its security with TZC400
The DDR driver is under dual license, BSD and GPLv2.
The configuration parameters are taken from device tree.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:18:19 +02:00
Yann Gautier e4f559ff54 stm32mp1: Add PMIC support
If a PMIC companion chip is present on board, it has to be configured
for regulators supplies.
This check is done with board DT configuration.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Pascal Paillet <p.paillet@st.com>
2018-07-24 17:15:13 +02:00
Yann Gautier 278c34df06 stm32mp1: Add console support
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:14:39 +02:00
Yann Gautier e58a53fb72 stm32mp1: save boot information in backup registers
This will be used by BL33 to get boot device and instance.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:14:22 +02:00
Yann Gautier 6a339a4952 stm32mp1: Add GPIO support
The management of pinctrl nodes of device tree is also added.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2018-07-24 17:14:08 +02:00
Yann Gautier 7839a05090 stm32mp1: Add clock and reset support
The clock driver is under dual license, BSD and GPLv2.
The clock driver uses device tree, so a minimal support for this is added.
The required files for driver and DTS files are in include/dt-bindings/.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
2018-07-24 17:13:36 +02:00