Tien Hock Loh 27cd1a4762 plat: intel: Fix CCU initialization for Agilex ... The CCU initialization loop uses the wrong units, this fixes that. This also fixes snoop filter register set bits should be used instead of overwriting the register Signed-off-by: Tien Hock Loh <tien.hock.loh@intel.com> Change-Id: Ia15eeeae5569b00ad84120182170d353ee221b31		2020-06-08 22:03:48 +00:00
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aarch64	intel: Implement platform specific system reset 2	2019-12-30 10:17:04 +08:00
drivers	plat: intel: Fix CCU initialization for Agilex	2020-06-08 22:03:48 +00:00
include	plat: intel: Add FPGAINTF configuration to when configuring pinmux	2020-06-08 22:03:41 +00:00
soc	Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration	2020-02-28 10:51:49 +00:00
bl2_plat_mem_params_desc.c	intel: Platform common code refactor	2019-08-01 16:39:27 +08:00
socfpga_delay_timer.c	intel: Platform common code refactor	2019-08-01 16:39:27 +08:00
socfpga_image_load.c	intel: Implement platform specific system reset 2	2019-12-30 10:17:04 +08:00
socfpga_psci.c	intel: Fix argument type for mailbox driver	2020-02-25 16:41:47 +08:00
socfpga_sip_svc.c	Merge "intel: Fix argument type for mailbox driver" into integration	2020-02-28 10:23:10 +00:00
socfpga_storage.c	intel: Refactor common platform code [2/5]	2019-11-28 12:47:58 +08:00
socfpga_topology.c	intel: Platform common code refactor	2019-08-01 16:39:27 +08:00