Commit Graph

10168 Commits

Author SHA1 Message Date
Bipin Ravi 510155aa74 Merge changes I7b1498fa,I1d2ebee3,I875519ff,I8c427ef2 into integration
* changes:
  fix(errata): workaround for Cortex-A510 erratum 2041909
  fix(errata): workaround for Cortex-A510 erratum 2042739
  fix(errata): workaround for Cortex-A510 erratum 2288014
  fix(errata): workaround for Cortex-A510 erratum 1922240
2022-02-24 20:47:47 +01:00
Soby Mathew 913e0334f9 Merge "docs(el3-runtimes): context management refactor proposal" into integration 2022-02-24 15:23:44 +01:00
Soby Mathew 327422633b docs(el3-runtimes): context management refactor proposal
This patch submits an RFC to refactor the context management
mechanism in TF-A.

Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: Ia1ad5a85cb86c129e2feaf36bed123f0067c3965
2022-02-24 08:04:48 +02:00
Madhukar Pappireddy e76b018f05 Merge "docs(a3k): add information about system-wide Crypto++ library" into integration 2022-02-23 16:31:38 +01:00
Madhukar Pappireddy 2c23b9c1b3 Merge "fix(a3k): fix comment about BootROM address range" into integration 2022-02-23 16:27:00 +01:00
Madhukar Pappireddy 80b895ca71 Merge "feat(board/rdedmunds): add support for rdedmunds variant" into integration 2022-02-23 16:25:44 +01:00
Madhukar Pappireddy 176717989f Merge changes from topic "bug-fix" into integration
* changes:
  fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
  build(changelog): add new scope for nxp crypto
  fix(lx2): drop erratum A-009810
2022-02-23 15:34:57 +01:00
Manish Pandey 9148f44067 Merge "fix(arm): increase ARM_BL_REGIONS count" into integration 2022-02-23 11:56:13 +01:00
Manish V Badarkhe dcb1959161 fix(arm): increase ARM_BL_REGIONS count
On RME-enabled platforms, it is currently not possible to incorporate
mapping of all bl_regions specified in bl31 setup[1] with the
ARM_BL_REGIONS macro defined to 6. Hence increased its count to 7.

[1]: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/
plat/arm/common/arm_bl31_setup.c#n380

Change-Id: Ieaa97f026ab2ae6eae22442595aa4122ba0a13c4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-02-23 12:34:42 +02:00
johpow01 e72bbe47ba fix(errata): workaround for Cortex-A510 erratum 2041909
Cortex-A510 erratum 2041909 is a Cat B erratum that applies to revision
r0p2 and is fixed in r0p3. It is also present in r0p0 and r0p1 but there
is no workaround in these revisions.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7b1498faa0c79488dee0d11d07f6e9f58144e298
2022-02-23 00:57:05 +01:00
johpow01 d48088acbe fix(errata): workaround for Cortex-A510 erratum 2042739
Cortex-A510 erratum 2042739 is a Cat B erratum that applies to revisions
r0p0, r0p1 and r0p2 and is fixed in r0p3.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I1d2ebee3914396e1e298eb45bdab35ce9e194ad9
2022-02-23 00:57:00 +01:00
johpow01 d5e2512c6b fix(errata): workaround for Cortex-A510 erratum 2288014
Cortex-A510 erratum 2288014 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I875519ff55be90244cc3d3a7e9f7abad0fc3c2b8
2022-02-23 00:56:55 +01:00
johpow01 83435637bf fix(errata): workaround for Cortex-A510 erratum 1922240
Cortex-A510 erratum 1922240 is a Cat B erratum that applies to revision
r0p0 and is fixed in r0p1.

Since no errata framework code existed for A510 prior to this patch, it
has been added as well. Also some general cleanup changes in the CPU lib
makefile.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I8c427ef255cb4b38ed3e5c2c7444fcef957277e4
2022-02-23 01:56:43 +02:00
Madhukar Pappireddy 47909f9d11 Merge changes from topic "x2_errata" into integration
* changes:
  fix(errata): workaround for Cortex-A710 erratum 2136059
  fix(errata): workaround for  Cortex-A710 erratum 2267065
  fix(errata): workaround for Cortex-X2 erratum 2216384
  fix(errata): workaround for Cortex-X2 errata 2081180
  fix(errata): workaround for Cortex-X2 errata 2017096
2022-02-22 18:48:17 +01:00
Joanna Farley 2ca915ba9c Merge "feat(allwinner): apx803: add aldo1 regulator" into integration 2022-02-22 09:44:46 +01:00
Madhukar Pappireddy 1776d4091b Merge changes from topic "paulliu-imx8m-eventlog" into integration
* changes:
  docs(imx8m): update for measured boot for imx8mm
  feat(plat/imx/imx8m/imx8mm): add support for measured boot
2022-02-21 16:41:38 +01:00
Thierry Bultel a29f6e76cb feat(allwinner): apx803: add aldo1 regulator
Notice that aldo1 is typically useful for the Olimex A64 board, where
it powers the PE bank through the vcc-pe line.
Without it, it is not possible to light the user led on PE17, for
instance.

Change-Id: I70588bc977b884b22df87f1b075549cb8925925a
Signed-off-by: Thierry Bultel <thierry.bultel@linatsea.fr>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-21 16:26:54 +01:00
Madhukar Pappireddy a809a6029c Merge "docs(a3k): fix information about SATA GPT booting" into integration 2022-02-18 19:07:41 +01:00
Jiafei Pan fa7fdfabf0 fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
bitfield structure maybe has strict-aliasing issue for some compiler,
for example the old code has hang issue for yocto 3.4 toolchain, so
refine the code to avoid to use bitfield structure.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6b6d7597311240dd6d6b8ca4ce508c69332f9c68
2022-02-18 12:03:16 +08:00
Jiafei Pan 9dcbeb9df3 build(changelog): add new scope for nxp crypto
Add new scope for NXP Crypto CAAM drivers.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I4beb96d1dc655281cb2fc99b8b0b998f35499dba
2022-02-18 12:03:07 +08:00
Jiafei Pan e36b0e4910 fix(lx2): drop erratum A-009810
The erratum A-009810 should not be applied to LX2, the impaction is
that it can cause system reboot when linux tried to power down, so remove
it.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I5e24229cf8512eff28b315ebcdf18de555c40c74
2022-02-18 11:55:27 +08:00
Madhukar Pappireddy 1b33b58b66 Merge changes from topic "ls1046a" into integration
* changes:
  docs(layerscape): add ls1046a soc and board support
  feat(ls1046aqds): add board ls1046aqds support
  feat(ls1046afrwy): add ls1046afrwy board support
  feat(ls1046ardb): add ls1046ardb board support
  feat(ls1046a): add new SoC platform ls1046a
  fix(nxp-tools): fix tool location path for byte_swape
  fix(nxp-qspi): fix include path for QSPI driver
  build(changelog): add new scopes for NXP layerscape platforms
2022-02-17 19:15:55 +01:00
Olivier Deprez 23ac80cc8b Merge "fix(fvp): extend memory map to include all DRAM memory regions" into integration 2022-02-17 11:10:40 +01:00
Madhukar Pappireddy 8d9c1b3ca5 Merge changes from topic "st-format-signedness" into integration
* changes:
  feat(stm32mp1): enable format-signedness warning
  fix(stm32mp1): correct types in messages
  fix(st-pmic): correct verbose message
  fix(st-sdmmc2): correct cmd_idx type in messages
  fix(st-fmc): fix type in message
  fix(mtd): correct types in messages
  fix(usb): correct type in message
  fix(tzc400): correct message with filter
  fix(psci): correct parent_node type in messages
  fix(libc): correct some messages
  fix(fconf): correct image_id type in messages
  fix(bl2): correct messages with image_id
2022-02-17 00:35:52 +01:00
Federico Recanati e80354212f fix(fvp): extend memory map to include all DRAM memory regions
Currently only the lowest 2 DRAM region were configured in the
TrustZone Controller, but the platform supports 6 regions spanning the
whole address space.
Configuring all of them to allow tests to access memory also in those
higher memory regions.

FVP memory map:
https://developer.arm.com/documentation/100964/1116/Base-Platform/Base---memory/Base-Platform-memory-map
Note that last row is wrong, describing a non-existing 56bit address,
all region labels should be shifted upward.
Issue has been reported and next release will be correct.

Change-Id: I695fe8e24aff67d75e74635ba32a133342289eb4
Signed-off-by: Federico Recanati <federico.recanati@arm.com>
2022-02-16 20:22:16 +01:00
Pali Rohár 27bc29367c docs(a3k): add information about system-wide Crypto++ library
On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d9376776b8afcb1ca46c16076e28c3d2e581d
2022-02-16 15:15:42 +01:00
Tony K Nadackal ef515f0d34 feat(board/rdedmunds): add support for rdedmunds variant
Add initial support for RD-Edmunds platform. This platform is considered
as a variant of RD-N2 platform with only major change being the CPU
which is Demeter instead of Neoverse-N2.

Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com>
Change-Id: I939d9eac652fa9e76ad002ee5e6107aa79baa013
2022-02-16 13:42:24 +00:00
Olivier Deprez b9be997d7d Merge "feat(spm): add FFA_MSG_SEND2 forwarding in SPMD" into integration 2022-02-16 11:00:41 +01:00
Madhukar Pappireddy 22bbb34afa Merge "refactor(stm32mp1): move PIE flag to SP_min" into integration 2022-02-15 23:41:24 +01:00
Madhukar Pappireddy 24872370fa Merge changes from topic "ea/corstone1000" into integration
* changes:
  feat(corstone1000): identify bank to load fip
  fix(corstone1000): change base address of FIP in the flash
  feat(corstone1000): implement platform specific psci reset
  feat(corstone1000): made changes to accommodate 3MB for optee
  build(corstone1000): rename diphda to corstone1000
2022-02-15 19:02:01 +01:00
Yann Gautier cff26c1916 feat(stm32mp1): enable format-signedness warning
Add the flag -Wformat-signedness to TF_CFLAGS for STM32MP1.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6af18778902b0a4dae1c08735d2d070ef3d137ce
2022-02-15 18:09:51 +01:00
Yann Gautier 43bbdca04f fix(stm32mp1): correct types in messages
Avoid warnings when -Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I0ca41cb96826b4f7f9bcf77909fad110325c1e91
2022-02-15 18:09:51 +01:00
Yann Gautier 47065ffe44 fix(st-pmic): correct verbose message
Replace %d with %u in log, to avoid warning when
-Wformat-signedness is enabled.

Change-Id: Ied5823520181f225ae09bd164e2e52e9a7692c60
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier bc1c98a8c7 fix(st-sdmmc2): correct cmd_idx type in messages
As cmd_idx is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I6954a8c939f3fb47dbb2c6db56a1909565af078b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier afcdc9d8d7 fix(st-fmc): fix type in message
As page is unsigned, we should use %u and not %d.
Find with -Wformat-signedness.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I7205971ee5e83163e4fe47d33bb9e90832b59ae0
2022-02-15 18:09:51 +01:00
Yann Gautier 6e86b46249 fix(mtd): correct types in messages
Some messages don't use the correct types, update them.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: Ie5384a7d139c48a623e1617c93d15fecc8a36061
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier bd9cd63ba0 fix(usb): correct type in message
pdev->request.bm_request is unsigned, use %u.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Idaadb8440d0b56bcfa02abd7c94a4ab59f5e15ee
2022-02-15 18:09:51 +01:00
Yann Gautier bdc88d2154 fix(tzc400): correct message with filter
As filter is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I9fc9f15774dc974edfa3db65f5aecd1e70bc146b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier b9338eee7f fix(psci): correct parent_node type in messages
As parent_node is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I5ab7acb33227d720b2c8a4ec013435442b219a44
2022-02-15 18:09:51 +01:00
Yann Gautier a211fde940 fix(libc): correct some messages
Replace %d with %u in logs, to avoid warning when
-Wformat-signedness is enabled.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Id058f6fb0fd25ce5f83b1be41082403fcb205841
2022-02-15 18:09:51 +01:00
Yann Gautier cec2fb2b1a fix(fconf): correct image_id type in messages
As image_id is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I292e1639847e69ba79265fc32871c0ad7eebc94e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Yann Gautier e4c77db9c8 fix(bl2): correct messages with image_id
As image_id is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I3f868f3d14c9f19349f0daa8a754179f887339c0
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-02-15 18:09:51 +01:00
Satish Kumar cf89fd57ed feat(corstone1000): identify bank to load fip
Secure enclave decides the boot bank based on the firmware update
state of the system and updates the boot bank information at a given
location in the flash. In this commit, bl2 reads the given flash
location to indentify the bank from which it should load fip from.

Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: I7f0f4ffc97189c9deb99db44afcd966082ffbf21
2022-02-15 13:26:35 +00:00
Pali Rohár 5a60efa12a fix(a3k): fix comment about BootROM address range
A53 AP BootROM is just 16 kB long and is mapped to address range
0xFFFF0000-0xFFFF4000. RVBAR_EL3 register has value 0xFFFF0000.
A53 AP BootROM itself is in the BootROM window which is 1 MB long and
mapped to address range 0xFFF00000-0xFFFFFFFF.

CM3 BootROM is not accessible from A53 core.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5d4a4c7b1e7550c4738c67a872d341f945d48bbc
2022-02-15 13:21:42 +01:00
Satish Kumar 1559450132 fix(corstone1000): change base address of FIP in the flash
More space in the flash is reserved up front for metadata
parser and UEFI variables. That requires change in the flash
base address of where images are present.

Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: Ieaabe09374d707de18d36505c69b6c9a8c2ec2e9
2022-02-15 09:12:32 +00:00
Emekcan Aras a599c80d06 feat(corstone1000): implement platform specific psci reset
This change implements platform specific psci reset
for the corstone1000.

Signed-off-by: Emekcan Aras <Emekcan.Aras@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: I25f77234506416c3376ff4a028f6ea40ebe68437
2022-02-15 09:11:59 +00:00
Jiafei Pan a3aeb4c865 docs(layerscape): add ls1046a soc and board support
Update document for nxp-layerscape to add ls1046a SoC and ls1046ardb,
ls1046afrwy board support.

Also update maintainer of ls1046a platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I522f978bc93aa8d1f1d60fa8efef392b7d854df7
2022-02-15 08:59:58 +08:00
Jiafei Pan 16662dc40d feat(ls1046aqds): add board ls1046aqds support
ls1046aqds board is full function board to evaluate ls1046a platform.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Id1befe37a25f7c379e76791538348fd03bba78f7
2022-02-15 08:59:58 +08:00
Jiafei Pan b51dc56ab9 feat(ls1046afrwy): add ls1046afrwy board support
The LS1046A Freeway board (FRWY) is a high-performance computing,
evaluation, and development platform that supports the LS1046A
architecture processor capable of support more than 32,000 CoreMark
performance. The FRWY-LS1046A board supports the LS1046A processor,
onboard DDR4 memory, multiple Gigabit Ethernet, USB3.0 and M2_Type_E
interfaces for Wi-Fi, FRWY-LS1046A-AC includes the Wi-Fi card.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I9a9680689e6f17bf4cc76fd5d1883eed6ace5149
2022-02-15 08:59:58 +08:00
Jiafei Pan bb52f7560b feat(ls1046ardb): add ls1046ardb board support
The LS1046A reference design board (RDB) is a high-performance
computing, evaluation, and development platform that supports
the Layerscape LS1046A architecture processor.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ib7a01b309e0b0acc7f38e22b138e9e181dff244a
2022-02-15 08:59:58 +08:00