Embed Arch Architecture SMCCC services in stm32mp1 SP_MIN. This
service is needed by Linux kernel to setup the SMCCC conduit
used by its SCMI SMC transport driver.
Change-Id: I454a7ef3048a77ab73fff945e8115b60445d5841
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
SCMI shared memory is used to exchange message payloads between
secure SCMI services and non-secure SCMI agents. It is mapped
uncached (device) mainly to conform to existing support in
the Linux kernel. Note that executive messages are mostly short
(few 32bit words) hence not using cache will not penalize much
performances.
Platform stm32mp1 shall configure ETZPC to harden properly the
secure and non-secure areas of the SYSRAM address space, that before
CPU accesses the shared memory when mapped non-secure.
This change defines STM32MP_SEC_SYSRAM_BASE/STM32MP_SEC_SYSRAM_SIZE and
STM32MP_NS_SYSRAM_BASE/STM32MP_NS_SYSRAM_SIZE.
Change-Id: I71ff02a359b9668ae1c5a71b5f102cf3d310f289
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
When using SP_min as monitor, only sp_min_warm_entrypoint() is a valid
secure entry point.
Change-Id: I440cec798e901b11a34dd482c33b2e378a8328ab
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Disable use of Neon VFP support for platform stm32mp1 when
building with SP_MIN runtime services as these can conflict with
non-secure world use of NEON support. This is preferred over a
systematic backup/restore of NEON context when switching
between non-secure and secure worlds.
When NEON support is disabled, this is done for both BL2 and BL32 as
build process uses common libraries built once for both binaries.
Change-Id: I4e8808dcb6ef58fc839e6f85fd6e45cfbaa34be0
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
BL32/SP_MIN configures platform security hardening from the shared
resources driver. At the end of SP_MIN initialization, all shared
resources shall be assigned to secure or non-secure world by
drivers. A lock prevent from further change on the resource
assignation. By definition, resources not registered are assign
to non-secure world since not claimed by any component on the BL.
No functional change as all resources are currently in state
SHRES_UNREGISTERED hence assigned to non-secure world as prior
this change in stm32mp1_etzpc_early_setup() and
sp_min_platform_setup().
Change-Id: Ic41fab47216c3b8b7a6a75b8358cfcec411ed941
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Get number of pins in the GPIOZ bank with helper function
fdt_get_gpio_bank_pin_count(). Save the value in RAM to prevent
parsing the FDT several time for the same information.
Change-Id: Ie68e300804461ffce09914100a7d2962116023b5
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Define enum stm32mp_shres for platform stm32mp1. The enumerated
type defines all resources that can be assigned to secure or
non-secure worlds at run time for the platform.
Change-Id: I5de20d72735856645f1efd0993643278e8d35bcb
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32MP1 SoC includes peripheral interfaces that can be assigned to
the secure world, or that can be opened to the non-secure world.
This change introduces the basics of a driver that manages such
resources which assignation is done at run time. It currently offers
API functions that state whether a service exposed to non-secure
world has permission to access a targeted clock or reset controller.
Change-Id: Iff20028f41586bc501085488c03546ffe31046d8
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Use ETZPC driver to configure secure aware interfaces to assign
them to non-secure world. Sp_min also configures BootROM resources
and SYSRAM to assign both to secure world only.
Define stm32mp15 SoC identifiers for the platform specific DECPROT
instances.
Change-Id: I3bec9f47b04bcba3929e4df886ddb1d5ff843089
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Changes stm32mp1 reset driver to API to add a timeout argument
to stm32mp_reset_assert() and stm32mp_reset_deassert() and
a return value.
With a supplied timeout, the functions wait the target reset state
is reached before returning. With a timeout of zero, the functions
simply load target reset state in SoC interface and return without
waiting.
Helper functions stm32mp_reset_set() and stm32mp_reset_release()
use a zero timeout and return without a return code.
This change updates few stm32 drivers and plat/stm32mp1 blé_plat_setup.c
accordingly without any functional change.
functional change.
Change-Id: Ia1a73a15125d3055fd8739c125b70bcb9562c27f
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
New helper functions to get GPIO banks configuration from the FDT.
stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to
differentiate specific GPIO banks when these are defined with a specific
path in the FDT.
fdt_get_gpio_bank_pin_count() returns the number of pins in a GPIO bank
as it depends on the SoC variant.
Change-Id: I4481774152b3c6bf35bf986f58e357c2f9c19176
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Relation between GPIO banks and their base address and offset address
if platform dependent. This change moves helper functions
stm32_get_gpio_bank_base() and stm32_get_gpio_bank_offset() from
plat/st/common to plat/st/stm32mp1/.
Change-Id: Id3d03e585746aa5509c6fab7d88183a92d561e3f
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Now that we have an implementation for getting the node offset of the
stdout-path property in the generic fdt_wrappers code, use that to
replace the current ST platform specific implementation.
Change-Id: I5dd05684e7ca3cb563b5f71c885e1066393e057e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The STM32 platform port parse DT nodes to find base address to
peripherals. It does this by using its own implementation, even though
this functionality is generic and actually widely useful outside of the
STM32 code.
Re-implement fdt_get_reg_props_by_name() on top of the newly introduced
fdt_get_reg_props_by_index() function, and move it to fdt_wrapper.c.
This is removes the assumption that #address-cells and #size-cells are
always one.
Change-Id: I6d584930262c732b6e0356d98aea50b2654f789d
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The STM32 platform code uses its own set of FDT helper functions,
although some of them are fairly generic.
Remove the implementation of fdt_read_uint32_default() and implement it
on top of the newly introduced fdt_read_uint32() function, then convert
all users over.
This also fixes two callers, which were slightly abusing the "default"
semantic.
Change-Id: I570533362b4846e58dd797a92347de3e0e5abb75
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The device tree parsing code for the STM32 platform is using its own FDT
helper functions, some of them being rather generic.
In particular the existing fdt_read_uint32_array() implementation is now
almost identical to the new generic code in fdt_wrappers.c, so we can
remove the ST specific version and adjust the existing callers.
Compared to the original ST implementation the new version takes a
pointer to the DTB as the first argument, and also swaps the order of
the number of cells and the pointer.
Change-Id: Id06b0f1ba4db1ad1f733be40e82c34f46638551a
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Instead of using dt_get_ddr_size() and withdrawing the secure and shared
memory areas, use stm32mp_get_ddr_ns_size() function.
Change-Id: I5608fd7873589ea0e1262ba7d2ee3e52b53d9a7d
Signed-off-by: Yann Gautier <yann.gautier@st.com>
DTB and BL32 area should not be set as executable in MMU during BL2
execution, hence set those areas as MT_RO_DATA.
Change-Id: I87c47a1e7fda761e541ec98a5b294588384d31db
Signed-off-by: Yann Gautier <yann.gautier@st.com>
A speculative accesses to DDR could be done whereas it was not reachable
and could lead to bus stall.
To correct this the dynamic mapping in MMU is used.
A first mapping is done for DDR tests with MT_NON_CACHEABLE attribute,
once DDR access is setup. It is then unmapped and a new mapping DDR is done
with cacheable attribute (through MT_MEMORY) to speed-up BL33 (or OP-TEE)
load.
The disabling of cache during DDR tests is also removed, as now useless.
A call to new functions stm32mp_{,un}map_ddr_non_cacheable() is done
instead.
PLAT_XLAT_TABLES_DYNAMIC is activated globally as used in BL2 and BL32.
BL33 max size is also updated to take into account the secure and shared
memory areas. Those are used in OP-TEE case.
Change-Id: I22c48b4a48255ee264991c34ecbb15bfe87e67c3
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This function gets the DDR size from DT, and withdraws (if defined) the
sizes of secure DDR and shared memory areas.
This function also checks DT values fits the default DDR range.
This non-secure memory is available for BL33 and non-secure OS.
Change-Id: I162ae5e990a0f9b6b7d07e539de029f1d61a391b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This warning was issued by cppcheck in our downstream code:
[plat/st/common/stm32mp_dt.c:629] -> [plat/st/common/stm32mp_dt.c:634]:
(warning) Identical condition 'node<0', second condition is always false
The second test has to check variable pwr_regulators_node.
Change-Id: I4a20c4a3ac0ef0639c2df36309d90a61c02b511f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Correct the following sparse warnings:
plat/st/common/stm32mp_dt.c:103:5: warning:
symbol 'fdt_get_node_parent_address_cells' was not declared.
Should it be static?
plat/st/common/stm32mp_dt.c:123:5: warning:
symbol 'fdt_get_node_parent_size_cells' was not declared.
Should it be static?
As those 2 functions are only used by assert(), put them under
ENABLE_ASSERTIONS flag.
Change-Id: Iad721f12128df83a3de3f53e7920a9c1dce64c56
Signed-off-by: Yann Gautier <yann.gautier@st.com>
* changes:
stm32mp1: platform.mk: support generating multiple images in one build
stm32mp1: platform.mk: migrate to implicit rules
stm32mp1: platform.mk: derive map file name from target name
stm32mp1: platform.mk: generate linker script with fixed name
stm32mp1: platform.mk: use PHONY for the appropriate targets
Board Support for the stm32mp1 platform is contained in the device tree,
so if we remove hardcoding of board name from the Makefile, we can build
the intermediary objects once and generate one new tf-a-*.stm32 binary
for every device tree specified. All in one go.
With implicit rules implemented, we only need to change the top level
target to support multi-image builds on the stm32mp1.
Change-Id: I4cae7d32a4c03a3c29c559dc5332e002223902c1
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Board Support for the stm32mp1 platform is contained in the device tree,
so if we remove hardcoding of board name from the Makefile, we can build
the intermediary objects once and generate one new tf-a-*.stm32 binary
for every device tree specified. All in one go.
Prepare for this by employing implicit rules.
Change-Id: I5a022a89eb12696cd8cee7bf28ac6be54849901f
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Doing this allows us in the next commit to use implicit rules (%-patterns)
to cover all the images we generate during a stm32mp1 build.
Change-Id: Ibde59d10ccce42566f82820117d7fd0d77345e6c
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
The linker script has no board-specific information that necessitates it
having a name derived from the board name. Give it a fixed name, so we
can later reuse the same linker script for multiple boards.
Change-Id: Ie6650f00389f4ab8577ae82a36c620af9c64101e
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Currently, building TF-A for STM32MP1 triggers a full rebuild,
avoid this by removing the .PHONY: specification for the final image and
replace it by specifying PHONYness for the targets that don't actually
produce file output.
This will come in handy in follow-up commits, when implicit rules are
introduced, as implicit rule search is skipped for .PHONY targets.
Change-Id: Ib9966479032b081a54123b99f889760e85639f19
Fixes: f74cbc93a ("stm32mp1: Link BL2, BL32 and DTB in one binary")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Since now the generic console_t structure holds the UART base address as
well, let's use that generic location and drop the UART driver specific
data structure at all.
Change-Id: Iea6ca26ff4903c33f0fad27fec96fdbabd4e0a91
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This flag warns if anything is declared more than once in the same
scope, even in cases where multiple declaration is valid and changes
nothing.
Consequently, this patch also fixes the issues reported by this
flag. Consider the following two lines of code from two different source
files(bl_common.h and bl31_plat_setup.c):
IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE);
IMPORT_SYM(unsigned long, __RO_START__, BL2_RO_BASE);
The IMPORT_SYM macro which actually imports a linker symbol as a C expression.
The macro defines the __RO_START__ as an extern variable twice, one for each
instance. __RO_START__ symbol is defined by the linker script to mark the start
of the Read-Only area of the memory map.
Essentially, the platform code redefines the linker symbol with a different
(relevant) name rather than using the standard symbol. A simple solution to
fix this issue in the platform code for redundant declarations warning is
to remove the second IMPORT_SYM and replace it with following assignment
static const unsigned long BL2_RO_BASE = BL_CODE_BASE;
Change-Id: If4835d1ee462d52b75e5afd2a59b64828707c5aa
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
STM32MP1 platform is able to boot from SPI-NOR devices.
These modifications add this support using the new
SPI-NOR framework.
Change-Id: I75ff9eba4661f9fb87ce24ced2bacbf8558ebe44
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
STM32MP1 platform is able to boot from SPI-NAND devices.
These modifications add this support using the new
SPI-NAND framework.
Change-Id: I0d5448bdc4bde153c1209e8043846c0f935ae5ba
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
STM32MP1 platform is able to boot from raw NAND devices.
These modifications add this support using the new
raw NAND framework.
Change-Id: I9e9c2b03930f98a5ac23f2b6b41945bef43e5043
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
For STM32MP1, the address space is 4GB, which can be first divided
in 4 parts of 1GB. This LVL1 table is already mapped regardless
of MAX_XLAT_TABLES.
Fixing typo: Replace Ko to KB.
BL2/sp_min for platform STM32MP1 requires 4 MMU translation tables:
- a level2 table and a level3 table for identity mapped SYSRAM
- a level2 table mapping 2MB of BootROM runtime resources
- a level2 table mapping 2MB of secure DDR (case BL32 is OP-TEE)
Change-Id: If80cbd4fccc7689b39dd540d6649b1313557f326
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Add a new entry to find register properties by name and
include new assert functions to limit address cells to 1
and size cells to 1.
Change-Id: Ide59a795a05fb2af36bd07fec15e5a3adf196226
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Adds compilation flags to specify which drivers will be
embedded in the generated firmware.
Change-Id: Ie9decc89c3f26cf17e7148a3a4cf337fd35940f7
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT.
timeout_init_us(some_timeout_us); returns a reference to detect
timeout for the provided microsecond delay value from current time.
timeout_elapsed(reference) return true/false whether the reference
timeout is elapsed.
Cherry picked from OP-TEE implementation [1].
[1] commit 33d30a74502b ("core: timeout detection support")
Minor:
- Remove stm32mp platform duplicated implementation.
- Add new include in marvell ble.mk
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iaef6d43c11a2e6992fb48efdc674a0552755ad9c
This commit adds authentication binary support for STM32MP1.
It prints the bootrom authentication result if signed
image is used and authenticates the next loaded STM32 images.
It also enables the dynamic translation table support
(PLAT_XLAT_TABLES_DYNAMIC) to use bootrom services.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iba706519e0dc6b6fae1f3dd498383351f0f75f51
This BSEC service is a platform specific service. Implementation
moved to the platform part.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I1f70ed48a446860498ed111acce01187568538c9
The STM32 console driver was pre-pending '\r' before '\n'.
It is now managed by the framework with the flag:
CONSOLE_FLAG_TRANSLATE_CRLF.
Remove the code in driver, and add the flag for STM32MP1.
Change-Id: I5d0d5d5c4abee0b7dc11c2f8707b1b5cf10149ab
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This function can be used on several stm32mp devices, it is then moved in
plat/st/common/stm32mp_common.c.
Change-Id: I862debe39604410f71a9ddc28713026362e9ecda
Signed-off-by: Yann Gautier <yann.gautier@st.com>
The runtime console is only kept in DEBUG configuration.
Change-Id: I0447dfcacb9a63a12bcdab7c55584d70c3220e5b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This change enhances performance and security in BL32 stage.
Change-Id: I64df5995fc6b04f6cf42d6a00a6d3d0f602b5407
Signed-off-by: Yann Gautier <yann.gautier@st.com>
To use spinlocks, MMU should be enabled, as well as data cache.
A common function is created (moved from clock file).
It is then used whenever a spinlock has to be taken, in BSEC and clock
drivers.
Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip.
A function is added to check the part number of the SoC.
If it corresponds to STM32MP151A or STM32MP151C, then the chip has a single
Cortex-A7.
Change-Id: Icac2015c5d03ce0bcb8e99bbaf1ec8ada34be49c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
On STMicroelectronics boards, the board information is stored in OTP.
This OTP is described in device tree, in BSEC board_id node.
Change-Id: Ieccbdcb048343680faac8dc577b75c67ac106f5b
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
This information is located in DBGMCU registers.
Change-Id: I480aa046fed9992e3d9665b1f0520bc4b6cfdf30
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Introduce driver for STM32 IWDG peripheral (Independent Watchdog).
It is configured according to device tree content and should be enabled
from there.
The watchdog is not started by default. It can be started after an HW
reset if the dedicated OTP is fused.
The watchdog also needs to be frozen if a debugger is attached.
This is done by configuring the correct bits in DBGMCU.
This configuration is allowed by checking BSEC properties.
An increase of BL2 size is also required when adding this new code.
Change-Id: Ide7535d717885ce2f9c387cf17afd8b5607f3e7f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.
All common C compilers predefine a macro called __ASSEMBLER__ when
preprocessing a .S file. There is no reason for TF-A to define it's own
__ASSEMBLY__ macro for this purpose instead. To unify code with the
export headers (which use __ASSEMBLER__ to avoid one extra dependency),
let's deprecate __ASSEMBLY__ and switch the code base over to the
predefined standard.
Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417
Signed-off-by: Julius Werner <jwerner@chromium.org>
Do not export function dt_get_stdout_node_offset() that is used only inside
stm32mp_dt.c source file.
Change-Id: I9dd3dbfab21d42ed81c68723e71fe5a7586dce93
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Correct SDMMC macros to define unsigned values as expected by the
driver implementation.
Change-Id: Ib009f3df2cf26a9759d129eb571a27b2564770ce
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Remove inclusion of libfdt source files in source file list since these
are already included from generic libfdt.mk makefile.
Change-Id: If42624557c4d88ca85d70f83b1b08c58f50afe72
Signed-off-by: Yann Gautier <yann.gautier@st.com>
The system configuration controller is mainly used to manage
the compensation cell and other IOs and system related settings.
The SYSCFG driver is in charge of configuring masters on the interconnect,
IO compensation, low voltage boards, or pull-ups for boot pins.
All other configurations should be handled in Linux drivers requiring it.
Device tree files are also updated to manage vdd-supply regulator.
Change-Id: I10fb513761a7d1f2b7afedca9c723ad9d1bccf42
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
GPIOx clocks are specific to each STM32MP platforms.
This change moves function stm32_get_gpio_bank_clock() from stm32mp
common source files to platform private stm32mp1_private.c source file.
Change-Id: I9616c0d3fe4d10af715d6f2d1550c13ab62c829a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Those functions are generic for parsing nodes from device tree
hence could be located in generic source file.
The oscillators description structure is also moved to STM32MP1 clock
driver, as it is no more used in stm32mp1_clkfunc and cannot be in a
generic file.
Change-Id: I93ba74f4eea916440fef9b160d306af1b39f17c6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Support booting OP-TEE as BL32 boot stage and secure runtime
service.
OP-TEE executes in internal RAM and uses a secure DDR area to store
the pager pagestore. Memory mapping and TZC are configured accordingly
prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where
a header file describes the effective boot images. This change
post processes header file content to get OP-TEE load addresses
and set OP-TEE boot arguments.
Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
This change disables secure accesses to non-secure DDR which are useless.
TF-A already maps non-secure memory with non-secure permissions thanks
to the MMU.
This change also corrects some inline comments.
Change-Id: Id4c20c9ee5c95a666dae6b7446ed80baf2d53fb0
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Remove STM32MP_DDR_SPEED_DFLT that is not used in STM32MP1 TF-A code.
Change-Id: I780cdc4e93a8a9d997d50f67cfc582acd4a353d6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
A new static function boot_mmc is created to simplify code maintenance
of stm32mp_io_setup.
Change-Id: I5c416e567e7e174fb1c2b435925a983c9c55fc40
Signed-off-by: Yann Gautier <yann.gautier@st.com>
The change of the structure highlighted the fact that all fields are not
correctly initialized with zeroes.
Replace the other memset in the function with zeromem, as it is faster.
Change-Id: I27f45a64e34637f79fa519f486bf5936721ef396
Signed-off-by: Yann Gautier <yann.gautier@st.com>
STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4.
The support for Cortex-M4 clocks is added when configuring the clock tree.
Some minimal security features to allow communications between A7 and M4
are also added.
Change-Id: I60417e244a476f60a2758f4969700b2684056665
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Remove useless private structure in function prototypes.
Add a reference counter on clocks.
Prepare for future secured/shared/non-secured clocks.
Change-Id: I3dbed81721da5ceff5e10b2c4155b1e340c036ee
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
PWR, RCC, DDRPHYC & DDRCTRL addresses can be retrieved from device tree.
Platform asserts the value read from the DT are the SoC addresses.
Change-Id: I43f0890b51918a30c87ac067d3780ab27a0f59de
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
Create a new file stm32mp_clkfunc.c to put functions that could be common
between several platforms.
Change-Id: Ica915c796b162b2345056b33328acc05035a242c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Regulator configuration at boot takes more information from DT.
I2C configuration from DT is done in I2C driver.
I2C driver manages more transfer modes.
The min voltage of buck1 should also be increased to 1.2V,
else the platform does not boot.
Heavily modifies stm32_i2c.c since many functions move inside the source
file to remove redundant declarations.
Change-Id: I0bee5d776cf3ff15e687427cd6abc06ab237d025
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas LE BAYON <nicolas.le.bayon@st.com>
timeout_init_us(some_timeout_us); returns a reference to detect
timeout for the provided microsecond delay value from current time.
timeout_elapsed(reference) return true/false whether the reference
timeout is elapsed.
This change is inspired by the OP-TEE OS timeout resources [1].
[1] https://github.com/OP-TEE/optee_os/blob/3.4.0/core/arch/arm/include/kernel/delay.h#L45
Change-Id: Id81ff48aa49693f555dc621064878417101d5587
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Include all RCC, clocks and reset headers from stm32mp1_def.h
which if exported to the firmware through platform_def.h.
The same dependency removal is done in common code as well.
Some useless includes are also removed in stm32_sdmmc2 driver.
Change-Id: I731ea5775c3fdb7f7b0c388b93923ed5e84b8d3f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions
that can be used in drivers shared by different platforms.
Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Some parts of code could be shared with platform derivatives,
or new platforms.
A new folder plat/st/common is created to put common parts.
stm32mp_common.h is a common API aggregate.
Remove some casts where applicable.
Fix some types where applicable.
Remove also some platform includes that are already in stm32mp1_def.h.
Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
This service, called with SMC from Non secure world, allows access to
some configurations saved in OTP fuses.
Change-Id: I92ba5614b2cb4a03260119e2cf74f2cd626a3431
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
The BSEC (Boot and Security and OTP control) is intended to control an OTP
(one time programmable) fuse box, used for on-chip non-volatile storage
for device configuration and security parameters.
Change-Id: I38c44684c7b9c6a1f24ec0ae3fe99cec481d5a51
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change fdt_check_status function to fdt_get_status.
Update GPIO defines.
Move some functions in gpio driver, instead of dt helper file.
Add GPIO bank helper functions.
Use only one status field in dt_node_info structure including both status
and secure status.
Change-Id: I34f93408dd4aac16ae722f564bc3f7d6ae978cf4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Move print_reset_reason function to bl2_plat_setup.c
Put __unused attribute for unused bl2_el3_early_platform_setup args.
Rename dt_dev_info to dt_uart_info.
Put MMU configuration earlier.
Remove unused macros.
Use U() or ULL() macros where needed.
Use device tree to configure GIC.
Use GIC helper function.
Change-Id: I34620c421cc6967a668bca318f7689fd74fa78a6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
This is the correct name of the IP.
Rename stm32mp1_pmic files to stm32mp_pmic.
Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
The driver could be used for other devices than PMIC.
Change-Id: I4569e7c0028e52e1ff2fe9d38f11de11e95d1897
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Instead, only platform_def.h is included.
The required files to be included are added in stm32mp1_def.h.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
On AARCH32, thumb is used by default, no need to redefine it.
As all our binaries are compiled with thumb, interwork is not needed.
The binaries compiled with or without those flags are the same,
except of course for the date.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
This patch makes the build system link the console framework code by
default, like it already does with other common libraries (e.g. cache
helpers). This should not make a difference in practice since TF is
linked with --gc-sections, so the linker will garbage collect all
functions and data that are not referenced by any other code. Thus, if a
platform doesn't want to include console code for size reasons and
doesn't make any references to console functions, the code will not be
included in the final binary.
To avoid compatibility issues with older platform ports, only make this
change for the MULTI_CONSOLE_API.
Change-Id: I153a9dbe680d57aadb860d1c829759ba701130d3
Signed-off-by: Julius Werner <jwerner@chromium.org>
These issues wer found by sparse:
drivers/st/clk/stm32mp1_clk.c:1524:19:
warning: incorrect type in assignment (different base types)
expected restricted fdt32_t const [usertype] *pkcs_cell
got unsigned int const [usertype] *
plat/st/stm32mp1/plat_image_load.c:13:6:
warning: symbol 'plat_flush_next_bl_params' was not declared.
Should it be static?
plat/st/stm32mp1/plat_image_load.c:21:16:
warning: symbol 'plat_get_bl_image_load_info' was not declared.
Should it be static?
plat/st/stm32mp1/plat_image_load.c:29:13:
warning: symbol 'plat_get_next_bl_params' was not declared.
Should it be static?
plat/st/stm32mp1/bl2_io_storage.c:40:10:
warning: symbol 'block_buffer' was not declared. Should it be static?
Signed-off-by: Yann Gautier <yann.gautier@st.com>
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver
- dt-bindings folders
- zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This driver is for the STMicroelectronics sdmmc2 IP
which is in STM32MP1 SoC.
It uses the MMC framework, and can address either eMMC or SD-card.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
platform.mk is updated to have compilation rules for DTB, stm32image tool,
and the concatenation of the 3 binaries.
A new linker script and an assembly file are added to manage this.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
The DDR driver is under dual license, BSD and GPLv2.
The configuration parameters are taken from device tree.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
If a PMIC companion chip is present on board, it has to be configured
for regulators supplies.
This check is done with board DT configuration.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
This will be used by BL33 to get boot device and instance.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
The management of pinctrl nodes of device tree is also added.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
The clock driver is under dual license, BSD and GPLv2.
The clock driver uses device tree, so a minimal support for this is added.
The required files for driver and DTS files are in include/dt-bindings/.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
STM32MP1 is a microprocessor designed by STMicroelectronics,
based on a dual Arm Cortex-A7.
It is an Armv7-A platform, using dedicated code from TF-A.
STM32MP1 uses BL2 compiled with BL2_AT_EL3.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Mark Dykes
Etienne Carriere
Andre Przywara
Yann Gautier
Sandrine Bailleux
Ahmad Fatoum
Madhukar Pappireddy
Deepika Bhavnani
Lionel Debieve
Nicolas Le Bayon
Julius Werner
Ambroise Vincent
Antonio Nino Diaz
Soby Mathew