Commit Graph

2737 Commits

Author SHA1 Message Date
Soby Mathew 76eac18647 Merge changes I08cf22df,I535ee414,Ie84cfc96,I8c35ce4e,If7649764, ... into integration
* changes:
  mediatek: mt8183: Support coreboot configuration
  mediatek: mt8183: support system reset
  mediatek: mt8183: pass platform parameters
  mediatek: mt8183: add GPIO driver
  mediatek: mt8183: support system off
  mediatek: mt8183: support CPU hotplug
  mediatek: mt8183: refine GIC driver
2019-09-13 11:51:49 +00:00
Sandrine Bailleux 19d15b4001 Merge "mediatek: mt8173: apply MULTI_CONSOLE framework" into integration 2019-09-13 07:03:01 +00:00
kenny liang d1d06275e9 mediatek: mt8173: apply MULTI_CONSOLE framework
- Switch uart driver from Mediatek 8250 to TI 16550
- Enable MULTI_CONSOLE

Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: Ie3948d9e64d05d29a1f69592792e277b680c4ed4
2019-09-12 09:16:12 -07:00
Soby Mathew 88b69fccba Merge "Tegra: memctrl_v2: fix "overflow before widen" coverity issue" into integration 2019-09-12 16:10:29 +00:00
Hadi Asyrafi b90f207a1d Invalidate dcache build option for bl2 entry at EL3
Some of the platform (ie. Agilex) make use of CCU IPs which will only be
initialized during bl2_el3_early_platform_setup. Any operation to the
cache beforehand will crash the platform. Hence, this will provide an
option to skip the data cache invalidation upon bl2 entry at EL3

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
2019-09-12 12:36:31 +00:00
Soby Mathew 8911a32a4d Merge "intel: agilex: Fix psci power domain off" into integration 2019-09-12 12:33:02 +00:00
Soby Mathew 5beeec7980 Merge "plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()" into integration 2019-09-12 12:29:46 +00:00
Soby Mathew 684b3a0205 Merge "Add UBSAN support and handlers" into integration 2019-09-12 11:14:21 +00:00
Soby Mathew f38e5182f7 Merge changes I072c0f61,I798401f4,I9648ef55,I7225d9fa,Ife682288, ... into integration
* changes:
  rcar_gen3: drivers: ddr_b: Update DDR setting for H3, M3, M3N
  rcar_gen3: drivers: qos: update QoS setting
  rcar_gen3: drivers: ddr_b: Fix checkpatch errors in headers
  rcar_gen3: drivers: ddr_b: Fix line-over-80s
  rcar_gen3: drivers: ddr_b: Further checkpatch cleanups
  rcar_gen3: drivers: ddr_b: Clean up camel case
  rcar_get3: drivers: ddr_b: Basic checkpatch fixes
  rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B
  rcar_get3: drivers: ddr: Clean up common code
2019-09-12 11:11:34 +00:00
Soby Mathew 9af73b3688 Merge changes from topic "amlogic-refactoring" into integration
* changes:
  amlogic: Fix includes order
  amlogic: Fix header guards
  amlogic: Fix prefixes in the SoC specific files
  amlogic: Fix prefixes in the PM code
  amlogic: Fix prefixes in the SCPI related code
  amlogic: Fix prefixes in the MHU code
  amlogic: Fix prefixes in the SIP/SVC code
  amlogic: Fix prefixes in the thermal driver
  amlogic: Fix prefixes in the private header file
  amlogic: Fix prefixes in the efuse driver
  amlogic: Fix prefixes in the platform macros file
  amlogic: Fix prefixes in the helpers file
  amlogic: Rework Makefiles
  amlogic: Move the SIP SVC code to common directory
  amlogic: Move topology file to common directory
  amlogic: Move thermal code to common directory
  amlogic: Move MHU code to common directory
  amlogic: Move efuse code to common directory
  amlogic: Move platform macros assembly file to common directory
  amlogic: Introduce unified private header file
  amlogic: Move SCPI code to common directory
  amlogic: Move the SHA256 DMA driver to common directory
  amlogic: Move assembly helpers to common directory
  amlogic: Introduce directory parameters in the makefiles
  meson: Rename platform directory to amlogic
2019-09-12 10:58:43 +00:00
Hadi Asyrafi afac9681ff intel: agilex: Fix psci power domain off
Disable gic cpu interface for powered down cpu. This patch also removes
core reset during power off as core reset will be done during power on

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I2ca96d876b6e71e56d24a9a7e184b6d6226b8673
2019-09-12 15:20:04 +08:00
Carlo Caione b56218744e amlogic: Fix includes order
As part of the code refactoring fix the order of the include files
across all the source files.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ice72f687cc26ee881a9051168149467688100cfb
2019-09-11 18:05:26 +01:00
Carlo Caione 421b67b666 amlogic: Fix header guards
Make the header guards more generic and contextually remove the
GXBB_BL31_PLAT_PARAM_VAL value that is unused on the GXL platform.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I842fa2e084e71280ae17b39c67877e844821a171
2019-09-11 18:04:12 +01:00
Justin Chadwell 1f4619796a Add UBSAN support and handlers
This patch adds support for the Undefined Behaviour sanitizer. There are
two types of support offered - minimalistic trapping support which
essentially immediately crashes on undefined behaviour and full support
with full debug messages.

The full support relies on ubsan.c which has been adapted from code used
by OPTEE.

Change-Id: I417c810f4fc43dcb56db6a6a555bfd0b38440727
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-09-11 14:15:54 +01:00
Jolly Shah 705bed5db1 plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()
Common ipi_table needs to be initialized before using any
IPI command (i.e send/receive). Move zynqmp ipi config table
initialization from sip_svc_setup() to zynqmp_config_setup().

Change-Id: Ic8aaa0728a43936cd4c6e1ed590e01ba8f0fbf5b
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
2019-09-10 12:25:56 -07:00
Soby Mathew 0289ab9eb8 Merge changes from topic "yg/stm32mp1_wdg_updates" into integration
* changes:
  mmc: stm32_sdmmc2: correctly manage block size
  mmc: stm32_sdmmc2: manage max-frequency property from DT
  stm32mp1: move check_header() to common code
  stm32mp1: keep console during runtime
  stm32mp1: sp_min: initialize MMU and cache earlier
  stm32mp1: add support for LpDDR3
  stm32mp1: use a common function to check spinlock is available
  clk: stm32mp: enable RTCAPB clock for dual-core chips
  stm32mp1: check if the SoC is single core
  stm32mp1: print information about board
  stm32mp1: print information about SoC
  stm32mp1: add watchdog support
2019-09-10 14:32:59 +00:00
Hung-Te Lin 0d8cb4937e mediatek: mt8183: Support coreboot configuration
When built for coreboot, we want to enable coreboot library to have
better integration. For example, serial console should be initialized by
coreboot_serial instead of hard-coded values.

Most coreboot configuration will enable memory console, which needs
larger XLAT_TABLES so MAX_XLAT_TABLES is increased; and to support that,
TZRAM_SIZE also need to be enlarged.

Change-Id: I08cf22df2fa26e48284e323d22ad8ce73a6ea803
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
2019-09-10 11:25:43 +08:00
kenny liang 3d91c9c382 mediatek: mt8183: support system reset
Implement system reset handler.

Change-Id: I535ee414616dde8d2b59dec5a723a540a3a1341d
Signed-off-by: kenny liang <kenny.liang@mediatek.com>
2019-09-10 11:25:36 +08:00
kenny liang a561205724 mediatek: mt8183: pass platform parameters
Add plat parameter structs to support BL2 to pass
variable-length, variable-type parameters to BL31.
The parameters are structured as a link list.
During BL31 setup time, we traverse the list to process
each parameter.

Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: Ie84cfc9606656fb1d2780a68cadf27e09afa6628
2019-09-10 11:25:29 +08:00
kenny liang 50cd952249 mediatek: mt8183: add GPIO driver
Add GPIO driver.

Change-Id: I8c35ce4ea247f3726081b0bbb95f0930c2b82517
Signed-off-by: kenny liang <kenny.liang@mediatek.com>
2019-09-10 11:25:22 +08:00
kenny liang e977b4db2a mediatek: mt8183: support system off
- Add PMIC driver
- Add RTC drvier
- Refactor PMIC and RTC to mediatek/common
- Implement system off handler

Change-Id: If76497646ace1b78bc9a5fa0110b652fe512281a
Signed-off-by: kenny liang <kenny.liang@mediatek.com>
2019-09-10 11:25:16 +08:00
kenny liang 7352f329e8 mediatek: mt8183: support CPU hotplug
- Add DCM driver
- Add SPMC driver
- Implement core and cluster power on/off handlers

Change-Id: I902002f8ea6f98fd73bf259188162b10d3939c72
Signed-off-by: kenny liang <kenny.liang@mediatek.com>
2019-09-10 11:25:08 +08:00
kenny liang f992b960f9 mediatek: mt8183: refine GIC driver
Refine MTK GIC driver.
Remove unused codes.

Signed-off-by: kenny liang <kenny.liang@mediatek.com>
Change-Id: I39e05ce7aa3c257e237fbc8e661cdde65cbcec7c
2019-09-10 11:23:07 +08:00
Varun Wadekar 36bf55d66c Tegra: memctrl_v2: fix "overflow before widen" coverity issue
This patch fixes a coding error, where the size of the protected memory area
was truncated due to an incorrect typecast.

This defect was found by coverity and reported as CID 336781.

Change-Id: I41878b0a9a5e5cd78ef3393fdc7b9ea7f7403ed3
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2019-09-05 08:40:38 -07:00
Carlo Caione 9158854a58 amlogic: Fix prefixes in the SoC specific files
Remove the GXBB prefix where needed and add SoC specific prefixes for
GXBB/GXL.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic3eb3a77ca2d9c779a9dee5cee786e9c16ecdb27
2019-09-05 10:39:30 +01:00
Carlo Caione 0e1d78969b amlogic: Fix prefixes in the PM code
Remove the GXBB prefix from the code in the common directory and add
SoC-specific prefixes in the SoC specific code.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ic983ef70b0ef23f95088dd8df488d8c42c3bc030
2019-09-05 10:39:30 +01:00
Carlo Caione 9a5616fa18 amlogic: Fix prefixes in the SCPI related code
Add a new aml_* prefix to the SCPI related function calls.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I697812ac1c0df28cbb639a1dc3e838f1107fb739
2019-09-05 10:39:30 +01:00
Carlo Caione cbaad533d1 amlogic: Fix prefixes in the MHU code
Make the MHU code AML specific adding a new aml_* prefix and remove the
GXBB prefix from the register names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I8f20918e29f08542bd71bd679f88e65b4efaa7d2
2019-09-05 10:39:30 +01:00
Carlo Caione 381b901f22 amlogic: Fix prefixes in the SIP/SVC code
All the SIP/SVC related code is currently the same between GXL and GXBB.
Rename function names and register names to avoid hardcoding the GXBB
prefix.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I7e58ab68489df8d4762663fc01fb64e6899cc8bf
2019-09-05 10:39:30 +01:00
Carlo Caione 73f6d05766 amlogic: Fix prefixes in the thermal driver
No need to have a special SoC-specific prefix.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I0da543e7d92d56604e79440a98027ffd9a2eaa59
2019-09-05 10:39:30 +01:00
Carlo Caione 010fdc1ba0 amlogic: Fix prefixes in the private header file
The header file is shared between all the SoCs. Better avoiding
hardcoding the SoC name in the function names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I9074871bd1ed8a702c1a656e0f50f2d3c6cb0425
2019-09-05 10:39:30 +01:00
Carlo Caione 93c795ae9c amlogic: Fix prefixes in the efuse driver
The efuse driver is hardcoding the GXBB prefix. No need to do that since
the driver is shared between multiple SoCs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I97691b0bbd55170d8216d301a3fc04feb8c2af2e
2019-09-05 10:39:30 +01:00
Carlo Caione 821781f30e amlogic: Fix prefixes in the platform macros file
Fixing at the same time the related register names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ib1130d50abe6088f1c0826878d1ae454a0f23008
2019-09-05 10:39:30 +01:00
Carlo Caione f681c676df amlogic: Fix prefixes in the helpers file
The code is the common directory is now generic, no need to have the SoC
prefix hardcoded in the function names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ied3a5e506b9abd4c2d6f893bafef50019bff24f1
2019-09-05 10:39:30 +01:00
Carlo Caione fab6951227 amlogic: Rework Makefiles
Now that every piece is in place, the makefiles can be refactored and
slightly beautified removing useless and redundant parts.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: If74e1909df52d475cf4b0dfed819d07d3a4c85b9
2019-09-05 10:39:30 +01:00
Carlo Caione 35aee24ef5 amlogic: Move the SIP SVC code to common directory
The code is the same between GXBB and GXL. Move it to the common source
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I875689a6fd029971aa755fc2725217e90ed06b6c
2019-09-05 10:39:30 +01:00
Carlo Caione 261e7fd7b6 amlogic: Move topology file to common directory
As done already for multiple files, move the topology file to the common
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iaca357a089593ad58c35c05c929239132249dcda
2019-09-05 10:39:30 +01:00
Carlo Caione cd94cc4013 amlogic: Move thermal code to common directory
As for most of the Amlogic code, this is common between the Amlogic
SoCs. Move the code to the common directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Id3f0073ff1f0b9ddbe964f80303323ee4a2f27b0
2019-09-05 10:39:30 +01:00
Carlo Caione 6f3b0dc465 amlogic: Move MHU code to common directory
The MHU code is shared between all the supported platforms. Move it to
the common directory instead.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Iaf53122866eae85c13f772927d16836dcfa877a3
2019-09-05 10:39:30 +01:00
Carlo Caione d498d24970 amlogic: Move efuse code to common directory
The efuse code is the same between GXL and GXBB. Move the code to common
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ie37f21d1907a36292724f1fb645a78041fe4a6b3
2019-09-05 10:39:30 +01:00
Carlo Caione 5b74369871 amlogic: Move platform macros assembly file to common directory
The platform macros are shared between all the SoCs. Move it to common
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Ia04c3ffe4d7b068aa701268ed99f69995d8db92b
2019-09-05 10:39:30 +01:00
Carlo Caione e26864af8b amlogic: Introduce unified private header file
Now that also the SHA256 DMA driver is shared between all the SoCs, we
can have one single private platform header file.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I77d51915f9d8233aeceeed66ed1f491573402cfc
2019-09-05 10:39:30 +01:00
Carlo Caione 69b315aabf amlogic: Move SCPI code to common directory
The SCPI code is the same between GXBB and GXL. No need to have it
replicated for each SoCs. Move it to the common directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I7e416caf1e9538b3ce7702c0363ee00a054e2451
2019-09-05 10:39:30 +01:00
Carlo Caione 01b2a7fc32 amlogic: Move the SHA256 DMA driver to common directory
The SHA256 DMA driver can be used by multiple SoCs. Move it to the
common directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I96319eeeeeebd503ef0dcb07c0e4ff6a67afeaa5
2019-09-05 10:39:30 +01:00
Carlo Caione 40fac1ab4c amlogic: Move assembly helpers to common directory
The assembly helpers are common to all the amlogic SoCs. Move the .S
file to the common directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I0d8616a7ae22dbcb14848cefd0149b6bb5814ea6
2019-09-05 10:39:30 +01:00
Carlo Caione 1b25019896 amlogic: Introduce directory parameters in the makefiles
Make the platform name a parameter for the source directories. Besides a
cosmetic fix, this is going to be helpful when reusing the same Makefile
for different SoCs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: I307897a21800cca8ad68a5ab8972d27e9356ff2a
2019-09-05 10:39:30 +01:00
Carlo Caione 4a079c752b meson: Rename platform directory to amlogic
Meson is the internal code name for the SoC family. The correct name for
the platform should be Amlogic. Change the name of the platform
directory.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
2019-09-05 10:39:25 +01:00
Sandrine Bailleux 5dbdf8e4ea Merge "intel: stratix10: Fix reliance on hard coded clock information" into integration 2019-09-05 09:11:31 +00:00
Masahiro Yamada abfd571974 uniphier: set CONSOLE_FLAG_TRANSLATE_CRLF and clean up console driver
This console driver sends '\r' before 'n', not after.
It works, but the convention is "\r\n" (i.e. CRLF)

Instead of fixing it in the driver, set CONSOLE_FLAG_TRANSLATE_CRLF
to leave it to the framework.

Change-Id: I2154e29313739a40dff70cfb5c0f8989136d4ad2
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-09-03 09:08:16 +00:00
Yann Gautier 1e91952942 stm32mp1: move check_header() to common code
This function can be used on several stm32mp devices, it is then moved in
plat/st/common/stm32mp_common.c.

Change-Id: I862debe39604410f71a9ddc28713026362e9ecda
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02 17:52:55 +02:00