Commit Graph

10192 Commits

Author SHA1 Message Date
Channa Kadabi 2ef6b8d378 fix(ufs): don't zero out buf before ufs read
ufs_read_blocks always zeros out the buffer before passing
to UFS for DMA. We don't need to zero out buf before reading
from UFS storage, this change remove the memset in ufs_read_blocks.

Signed-off-by: Channa Kadabi <kadabi@google.com>
Change-Id: I8029a7ea07fbd8cce29b383c80a3cfc782c5b7ec
2022-03-01 08:28:30 -08:00
Madhukar Pappireddy a78c6c9666 Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration 2022-02-28 20:36:30 +01:00
Manish Pandey a8e06f040b Merge changes from topic "st-fix-enum" into integration
* changes:
  fix(stm32mp1): fix enum prints
  fix(st-clock): print enums as unsigned
2022-02-28 18:30:38 +01:00
Yann Gautier ceab2fc344 fix(stm32mp1): fix enum prints
With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. But the current version of
compiler used in CI states that this parameter is signed. Just cast the
value then.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ic0655e5ba9c44fe6abcd9958d7a9972f5de3b7ef
2022-02-28 17:20:06 +01:00
Madhukar Pappireddy f83de3bba3 Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration
* changes:
  fix(intel): null pointer handling for resp_len
  fix(intel): define macros to handle buffer entries
  fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
  fix(intel): always set doorbell to SDM after sending command
  fix(intel): fix bit masking issue in intel_secure_reg_update
  fix(intel): fix ddr address range checker
  build(changelog): add new scope for Intel platform
2022-02-28 17:18:39 +01:00
Madhukar Pappireddy b5d2b4d532 Merge "fix(intel): enable HPS QSPI access by default" into integration 2022-02-28 16:37:06 +01:00
Yann Gautier 9fa9a0c55c fix(st-clock): print enums as unsigned
With gcc-11, the -Wformat-signedness warning complains about enum values
that should be printed as unsigned values. Change %d to %u for several
lines in the clock driver.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ia2d24e6feef5e852e0a6bfaa1286fe605f9a16b7
2022-02-28 11:36:00 +01:00
Sandrine Bailleux 92537e170d Merge "fix(measured-boot): add RMM entry to event_log_metadata" into integration 2022-02-28 10:39:59 +01:00
Manish Pandey 0446bda15c Merge "fix(cert_create): let distclean Makefile target remove the cert_create tool" into integration 2022-02-25 14:52:23 +01:00
Nicolas Boulenguez e15591aaf4 fix(cert_create): let distclean Makefile target remove the cert_create tool
For some targets, Make recursively invokes itself in subdirectories.
When delegating the distclean target to tools/cert_create/Makefile,
the submake is called with the clean target instead of realclean.
Because of this, the submake never removes the cert_create executable.

A proper but more intrusive fix would
* avoid confusion about the semantics by following traditions or using
  new names
  https://www.gnu.org/prep/standards/standards.html#Standard-Targets
* avoid typing errors with the special $@ variable.
Something like:

In tools/cert_create/Makefile:
mostlyclean:
  # Remove most objects but keep some results.
        $(call SHELL_DELETE_ALL, src/build_msg.o ${OBJECTS})
clean: mostlyclean
  # mostlyclean, then remove things built by Make.
        $(call SHELL_DELETE,${BINARY})
distclean: clean
  # clean, then remove things built by ./configure (none here).
realclean maintainer-clean: distclean
  # distclean, then remove things built by autootols (none here).

In Makefile:
mostlyclean clean distclean realclean maintainer-clean:
	$(MAKE) -C subdir1 $@
	$(MAKE) -C subdir2 $@

Signed-off-by: Nicolas Boulenguez <nicolas@debian.org>
Change-Id: Iabfeca3da5724ab90a56ad6dcd6870d0a1d6b07f
2022-02-25 12:55:12 +00:00
Bipin Ravi 8a34299289 Merge changes I1784d643,Icb6e3699,I7805756e into integration
* changes:
  fix(errata): workaround for Cortex-A510 erratum 2172148
  fix(errata): workaround for Cortex-A510 erratum 2218950
  fix(errata): workaround for Cortex-A510 erratum 2250311
2022-02-25 04:50:31 +01:00
johpow01 c0959d2c46 fix(errata): workaround for Cortex-A510 erratum 2172148
Cortex-A510 erratum 2172148 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I1784d643ca3d1d448340cd421facb5f229df1d22
2022-02-24 22:31:52 +01:00
johpow01 cc79018b71 fix(errata): workaround for Cortex-A510 erratum 2218950
Cortex-A510 erratum 2218950 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Icb6e369946f8978a08cf8ed5e4452782efb0a77a
2022-02-24 22:31:47 +01:00
johpow01 7f304b02a8 fix(errata): workaround for Cortex-A510 erratum 2250311
Cortex-A510 erratum 2250311 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0 and is fixed in r1p1.

This erratum workaround is a bit different because it interacts with a
feature supported in TFA. The typical method of implementing an errata
workaround will not work in this case as the MPMM feature would just be
re-enabled by context management at every core power on after being
disabled by the errata framework. So in addition to disabling MPMM, this
workaround also sets a flag in the MPMM runtime framework indicating
that the feature should not be enabled even if ENABLE_MPMM=1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7805756e65ec90b6ef8af47e200617c9e07a3a7e
2022-02-24 23:30:41 +02:00
Bipin Ravi 510155aa74 Merge changes I7b1498fa,I1d2ebee3,I875519ff,I8c427ef2 into integration
* changes:
  fix(errata): workaround for Cortex-A510 erratum 2041909
  fix(errata): workaround for Cortex-A510 erratum 2042739
  fix(errata): workaround for Cortex-A510 erratum 2288014
  fix(errata): workaround for Cortex-A510 erratum 1922240
2022-02-24 20:47:47 +01:00
Soby Mathew 913e0334f9 Merge "docs(el3-runtimes): context management refactor proposal" into integration 2022-02-24 15:23:44 +01:00
Soby Mathew 327422633b docs(el3-runtimes): context management refactor proposal
This patch submits an RFC to refactor the context management
mechanism in TF-A.

Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: Ia1ad5a85cb86c129e2feaf36bed123f0067c3965
2022-02-24 08:04:48 +02:00
Madhukar Pappireddy e76b018f05 Merge "docs(a3k): add information about system-wide Crypto++ library" into integration 2022-02-23 16:31:38 +01:00
Madhukar Pappireddy 2c23b9c1b3 Merge "fix(a3k): fix comment about BootROM address range" into integration 2022-02-23 16:27:00 +01:00
Madhukar Pappireddy 80b895ca71 Merge "feat(board/rdedmunds): add support for rdedmunds variant" into integration 2022-02-23 16:25:44 +01:00
Madhukar Pappireddy 176717989f Merge changes from topic "bug-fix" into integration
* changes:
  fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
  build(changelog): add new scope for nxp crypto
  fix(lx2): drop erratum A-009810
2022-02-23 15:34:57 +01:00
Tamas Ban f4e3e1e85f fix(measured-boot): add RMM entry to event_log_metadata
Platforms which support Realm world cannot boot up
properly if measured boot is enabled at build time.
An assertions occurs due to the missing RMM entry
in the event_log_metadata array.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I172f10a440797f7c9e1bc79dc72242b40c2521ea
2022-02-23 12:41:19 +01:00
Manish Pandey 9148f44067 Merge "fix(arm): increase ARM_BL_REGIONS count" into integration 2022-02-23 11:56:13 +01:00
Manish V Badarkhe dcb1959161 fix(arm): increase ARM_BL_REGIONS count
On RME-enabled platforms, it is currently not possible to incorporate
mapping of all bl_regions specified in bl31 setup[1] with the
ARM_BL_REGIONS macro defined to 6. Hence increased its count to 7.

[1]: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/tree/
plat/arm/common/arm_bl31_setup.c#n380

Change-Id: Ieaa97f026ab2ae6eae22442595aa4122ba0a13c4
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2022-02-23 12:34:42 +02:00
Sieu Mun Tang a250c04b0c fix(intel): null pointer handling for resp_len
Previous changes from commit #6a659448 updates resp_len from an integer
type to unsigned integer pointer type. This patch adds proper handling
in case resp_len is a null pointer. Resp_len with value 0 are also
changed to NULL to match the type change.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I75b3e3bfbb188d8e7b329ba3b948c23e31dec490
2022-02-23 16:30:30 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 7db1895f0b fix(intel): define macros to handle buffer entries
This patch defines a macro to handle Secure Device Manager's (SDM)
pointer to command & response buffer entries and convert them to the
correct physical address.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I4cf9f1d90e0d5ae4e1a2ce84165864b48c2862e7
2022-02-23 16:30:25 +08:00
Sieu Mun Tang 108514ff71 fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD
'INTEL_SIP_SMC_MBOX_SEND_CMD' SMC runtime service will only return
mailbox status and the argument's length back to the caller

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Change-Id: I50d2ae74845794cab7bf0858e742b5a70e0ea868
2022-02-23 16:29:12 +08:00
Siew Chin Lim e93551bb3b fix(intel): always set doorbell to SDM after sending command
This patch fixes the mailbox stall issue when sending mailbox command
that is larger than mailbox command FIFO size.

Large mailbox command will be sent to SDM in multiple chunks. HPS will
set doorbell to SDM when command FIFO full (is_doorbell_triggered will
be set to 1) to notify SDM to read the command data from FIFO, so that
HPS can continue to send the next chunk of command data.

However, HPS will not set the doorbell to SDM at the end if the doorbell
have been set earlier due to FIFO full. This will cause SDM mailbox
service stall because it is still waiting for last chunk of command data.

This patch fixes the code to always set the doorbell to SDM at the end
to get rid of stall issue.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: Idbe62410a00d92a30c7aeaa26d53d79a910cac0a
2022-02-23 16:29:03 +08:00
Siew Chin Lim c9c070994c fix(intel): fix bit masking issue in intel_secure_reg_update
intel_secure_reg_update function should apply mask to the value before
write into register.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I84bbd06e24b8666528b53030e8359743d438eb5b
2022-02-23 16:28:59 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 12d71ac662 fix(intel): fix ddr address range checker
This patch fix address range checker to make sure that it does not
errors out on NULL address with size 0. Non-secure software will send
this NULL address if the SMC call doesn't need to pass any address buffer.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I7e492c562a311ba989570c4ed465f845333ec865
2022-02-23 16:28:56 +08:00
Sieu Mun Tang e564137dbd build(changelog): add new scope for Intel platform
Add new scope for Intel platform.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I1fa7f5e0e5567825615dd0275b204b82fe8c2337
2022-02-23 16:28:52 +08:00
johpow01 e72bbe47ba fix(errata): workaround for Cortex-A510 erratum 2041909
Cortex-A510 erratum 2041909 is a Cat B erratum that applies to revision
r0p2 and is fixed in r0p3. It is also present in r0p0 and r0p1 but there
is no workaround in these revisions.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I7b1498faa0c79488dee0d11d07f6e9f58144e298
2022-02-23 00:57:05 +01:00
johpow01 d48088acbe fix(errata): workaround for Cortex-A510 erratum 2042739
Cortex-A510 erratum 2042739 is a Cat B erratum that applies to revisions
r0p0, r0p1 and r0p2 and is fixed in r0p3.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I1d2ebee3914396e1e298eb45bdab35ce9e194ad9
2022-02-23 00:57:00 +01:00
johpow01 d5e2512c6b fix(errata): workaround for Cortex-A510 erratum 2288014
Cortex-A510 erratum 2288014 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I875519ff55be90244cc3d3a7e9f7abad0fc3c2b8
2022-02-23 00:56:55 +01:00
johpow01 83435637bf fix(errata): workaround for Cortex-A510 erratum 1922240
Cortex-A510 erratum 1922240 is a Cat B erratum that applies to revision
r0p0 and is fixed in r0p1.

Since no errata framework code existed for A510 prior to this patch, it
has been added as well. Also some general cleanup changes in the CPU lib
makefile.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I8c427ef255cb4b38ed3e5c2c7444fcef957277e4
2022-02-23 01:56:43 +02:00
Madhukar Pappireddy 47909f9d11 Merge changes from topic "x2_errata" into integration
* changes:
  fix(errata): workaround for Cortex-A710 erratum 2136059
  fix(errata): workaround for  Cortex-A710 erratum 2267065
  fix(errata): workaround for Cortex-X2 erratum 2216384
  fix(errata): workaround for Cortex-X2 errata 2081180
  fix(errata): workaround for Cortex-X2 errata 2017096
2022-02-22 18:48:17 +01:00
Joanna Farley 2ca915ba9c Merge "feat(allwinner): apx803: add aldo1 regulator" into integration 2022-02-22 09:44:46 +01:00
Madhukar Pappireddy 1776d4091b Merge changes from topic "paulliu-imx8m-eventlog" into integration
* changes:
  docs(imx8m): update for measured boot for imx8mm
  feat(plat/imx/imx8m/imx8mm): add support for measured boot
2022-02-21 16:41:38 +01:00
Thierry Bultel a29f6e76cb feat(allwinner): apx803: add aldo1 regulator
Notice that aldo1 is typically useful for the Olimex A64 board, where
it powers the PE bank through the vcc-pe line.
Without it, it is not possible to light the user led on PE17, for
instance.

Change-Id: I70588bc977b884b22df87f1b075549cb8925925a
Signed-off-by: Thierry Bultel <thierry.bultel@linatsea.fr>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-02-21 16:26:54 +01:00
Siew Chin Lim 35fe7f400a fix(intel): assert if bl_mem_params is NULL pointer
This patch fixes the code issue detected by Klocwork scan. Pointer
'bl_mem_params' returned from call to function 'get_bl_mem_params_node'
may be NULL and the NULL pointer may be caused the system crash. Update
the code to assert if unexpected NULL pointer is returned.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Change-Id: I00f3132a6104618cadce26aa303c0b46b5921d5b
2022-02-21 15:35:47 +08:00
Abdul Halim, Muhammad Hadi Asyrafi 000267be22 fix(intel): enable HPS QSPI access by default
Request ownership and direct access to QSPI by default in BL2.
Previously, this is only done on QSPI boot mode.

Signed-off-by: Abdul Halim, Muhammad Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ie222bbf9d719f2f70f89d4739c285efe6df4c955
2022-02-21 15:18:54 +08:00
Madhukar Pappireddy a809a6029c Merge "docs(a3k): fix information about SATA GPT booting" into integration 2022-02-18 19:07:41 +01:00
Jiafei Pan fa7fdfabf0 fix(nxp-crypto): refine code to avoid hang issue for some of toolchain
bitfield structure maybe has strict-aliasing issue for some compiler,
for example the old code has hang issue for yocto 3.4 toolchain, so
refine the code to avoid to use bitfield structure.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6b6d7597311240dd6d6b8ca4ce508c69332f9c68
2022-02-18 12:03:16 +08:00
Jiafei Pan 9dcbeb9df3 build(changelog): add new scope for nxp crypto
Add new scope for NXP Crypto CAAM drivers.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I4beb96d1dc655281cb2fc99b8b0b998f35499dba
2022-02-18 12:03:07 +08:00
Jiafei Pan e36b0e4910 fix(lx2): drop erratum A-009810
The erratum A-009810 should not be applied to LX2, the impaction is
that it can cause system reboot when linux tried to power down, so remove
it.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I5e24229cf8512eff28b315ebcdf18de555c40c74
2022-02-18 11:55:27 +08:00
Madhukar Pappireddy 1b33b58b66 Merge changes from topic "ls1046a" into integration
* changes:
  docs(layerscape): add ls1046a soc and board support
  feat(ls1046aqds): add board ls1046aqds support
  feat(ls1046afrwy): add ls1046afrwy board support
  feat(ls1046ardb): add ls1046ardb board support
  feat(ls1046a): add new SoC platform ls1046a
  fix(nxp-tools): fix tool location path for byte_swape
  fix(nxp-qspi): fix include path for QSPI driver
  build(changelog): add new scopes for NXP layerscape platforms
2022-02-17 19:15:55 +01:00
Olivier Deprez 23ac80cc8b Merge "fix(fvp): extend memory map to include all DRAM memory regions" into integration 2022-02-17 11:10:40 +01:00
Madhukar Pappireddy 8d9c1b3ca5 Merge changes from topic "st-format-signedness" into integration
* changes:
  feat(stm32mp1): enable format-signedness warning
  fix(stm32mp1): correct types in messages
  fix(st-pmic): correct verbose message
  fix(st-sdmmc2): correct cmd_idx type in messages
  fix(st-fmc): fix type in message
  fix(mtd): correct types in messages
  fix(usb): correct type in message
  fix(tzc400): correct message with filter
  fix(psci): correct parent_node type in messages
  fix(libc): correct some messages
  fix(fconf): correct image_id type in messages
  fix(bl2): correct messages with image_id
2022-02-17 00:35:52 +01:00
Federico Recanati e80354212f fix(fvp): extend memory map to include all DRAM memory regions
Currently only the lowest 2 DRAM region were configured in the
TrustZone Controller, but the platform supports 6 regions spanning the
whole address space.
Configuring all of them to allow tests to access memory also in those
higher memory regions.

FVP memory map:
https://developer.arm.com/documentation/100964/1116/Base-Platform/Base---memory/Base-Platform-memory-map
Note that last row is wrong, describing a non-existing 56bit address,
all region labels should be shifted upward.
Issue has been reported and next release will be correct.

Change-Id: I695fe8e24aff67d75e74635ba32a133342289eb4
Signed-off-by: Federico Recanati <federico.recanati@arm.com>
2022-02-16 20:22:16 +01:00
Pali Rohár 27bc29367c docs(a3k): add information about system-wide Crypto++ library
On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d9376776b8afcb1ca46c16076e28c3d2e581d
2022-02-16 15:15:42 +01:00