Commit Graph

912 Commits

Author SHA1 Message Date
Manivannan Sadhasivam f657fa99df
docs: plat: stm32mp1: Document the usage of DTB_FILE_NAME variable
Since STM32MP1 platform supports different boards, it is necessary
to build for a particular board. With the current instructions, the
user has to modify the DTB_FILE_NAME variable in platform.mk for
building for a particular board, but this can be avoided by passing
the appropriate board DTB name via DTB_FILE_NAME make variable.
Hence document the same in platform doc.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Change-Id: I16797e7256c7eb699a7b8846356fe430d0fe0aa1
2019-04-26 19:17:11 +05:30
Antonio Niño Díaz d87af648a2 Merge "Cortex A9: Fix typo in errata 794073 workaround" into integration 2019-04-23 13:01:20 +00:00
Yann Gautier 1989a19c2d stm32mp1: add OP-TEE support
Support booting OP-TEE as BL32 boot stage and secure runtime
service.

OP-TEE executes in internal RAM and uses a secure DDR area to store
the pager pagestore. Memory mapping and TZC are configured accordingly
prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where
a header file describes the effective boot images. This change
post processes header file content to get OP-TEE load addresses
and set OP-TEE boot arguments.

Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2019-04-23 13:34:12 +02:00
Louis Mayencourt b4e9ab9ce9 Cortex A9: Fix typo in errata 794073 workaround
Change-Id: I22568caf83b9846cd7b59241fcec34a395825399
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2019-04-18 12:11:25 +01:00
Louis Mayencourt 0e985d708e DSU: Implement workaround for errata 798953
Under certain near idle conditions, DSU may miss response transfers on
the ACE master or Peripheral port, leading to deadlock. This workaround
disables high-level clock gating of the DSU to prevent this.

Change-Id: I820911d61570bacb38dd325b3519bc8d12caa14b
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2019-04-17 13:46:43 +01:00
Louis Mayencourt cba71b70ef Cortex-A35: Implement workaround for errata 855472
Under specific conditions, the processor might issue an eviction and an
L2 cache clean operation to the interconnect in the wrong order. Set
the CPUACTLR.ENDCCASCI bit to 1 to avoid this.

Change-Id: Ide7393adeae04581fa70eb9173b742049fc3e050
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2019-04-17 13:46:43 +01:00
Antonio Niño Díaz 6cf7b2184b Merge "Cortex A9:errata 794073 workaround" into integration 2019-04-12 10:40:35 +00:00
Antonio Niño Díaz 72db70ca18 Merge changes from topic "av/tls-heap" into integration
* changes:
  Mbed TLS: Remove weak heap implementation
  sgm: Fix bl2 sources
2019-04-12 10:40:15 +00:00
Joel Hutton dd4cf2c745 Cortex A9:errata 794073 workaround
On Cortex A9 an errata can cause the processor to violate the rules for
speculative fetches when the MMU is off but branch prediction has not
been disabled. The workaround for this is to execute an Invalidate
Entire Branch Prediction Array (BPIALL) followed by a DSB.

see:http://arminfo.emea.arm.com/help/topic/com.arm.doc.uan0009d/UAN0009_cortex_a9_errata_r4.pdf
for more details.

Change-Id: I9146c1fa7563a79f4e15b6251617b9620a587c93
Signed-off-by: Joel Hutton <Joel.Hutton@arm.com>
2019-04-12 10:10:32 +00:00
Ambroise Vincent 2374ab1799 Mbed TLS: Remove weak heap implementation
The implementation of the heap function plat_get_mbedtls_heap() becomes
mandatory for platforms supporting TRUSTED_BOARD_BOOT.

The shared Mbed TLS heap default weak function implementation is
converted to a helper function get_mbedtls_heap_helper() which can be
used by the platforms for their own function implementation.

Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-04-12 09:52:52 +01:00
Paul Beesley 573b4cd226 doc: Clarify cert_create build when USE_TBBR_DEFS=0
The user guide documentation for the cert_create tool needs to
mention that a platform must have a platform_oid.h header file
in order to successfully build the cert_create tool when
USE_TBBR_DEFS is 0.

Change-Id: I77f86a022d207e88a79c97741be3eafbfa0c86f1
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-04-11 13:43:52 +01:00
Antonio Niño Díaz 01e7e0cadc Merge "Add support for Cortex-A76AE CPU" into integration 2019-04-09 09:21:51 +00:00
Alexei Fedorov 9ccc5a5733 Add support for Cortex-A76AE CPU
Change-Id: I0a81f4ea94d41245cd5150de341b51fc70babffe
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2019-04-08 14:48:55 +01:00
Joel Hutton 699475ac5c Document changes to auth-framework
The data structures in the auth-framework were changed by the previous
patch, and need to be updated.

Change-Id: Icfad2ac688d03d32aa93e45f930a375abbc164a9
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
2019-04-08 14:27:02 +01:00
Paul Beesley c48991e1fe doc: Fix heading levels for changelog
The change-log.rst file does not use the same symbols
as the other documents when organising its headings,
sub-headings and so on. In order to compile these
documents together with Sphinx, forming a top-level
index and a consistent structure, it is necessary to
normalise these.

Change-Id: Ib4620ff03a9e76fec9e36e95549016c7b3fe12bb
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-04-05 10:28:36 +01:00
Antonio Niño Díaz 18d4d113ec
Merge pull request #1918 from lmayencourt/lm/contrib_guidelines
doc: Update contribution guidelines
2019-04-03 11:20:38 +01:00
Louis Mayencourt 63fdda2d98 doc: Update contribution guidelines
Update the documentation for trustedfirmware.org migration

Change-Id: Ibb7052b0becbec3326164f1503806ca2c2fd4dcc
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2019-04-02 16:19:11 +01:00
Remi Pommarel 9b5a8aa58d plat: gxl: Add documentation on building GXL image
Also adds a maintainer for GXL.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
2019-04-02 16:33:59 +02:00
Soby Mathew ee80da114b
Merge pull request #1911 from lmayencourt/lm/update_gcc
doc: Suggest to use the latest version of GCC 8.2
2019-03-29 10:53:57 +00:00
Paul Beesley bf32bc9c50 doc: Clarify draft status of SPCI and SPRT specs
These SPM-related specifications are mentioned in the readme and
the change log. Update references to these specs to make it clear
that they are in draft form and are expected to change.

Change-Id: Ia2791c48c371a828246d96f102a402747cd69f96
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-29 10:16:12 +00:00
Louis Mayencourt 0042f5784b doc: Suggest to use the latest version of GCC 8.2
The latest version of GCC are required to use the new features of TF-A.
Suggest to use the latest version available on developer.arm.com instead
of the version specified on the Linaro Release notes.
At the time of writing, GCC 8.2-2019.01 is the latest version available.

Change-Id: Idd5c00749e39ca9dc8b7c5623b5d64356c9ce6e5
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2019-03-29 10:02:21 +00:00
Soby Mathew 5debac490d
Merge pull request #1910 from soby-mathew/sm/mb_ver_doc
docs: List MB version dependancy for Juno FWU as known issue
2019-03-28 14:30:40 +00:00
Soby Mathew 97fc1968ae docs: List MB version dependency for Juno FWU as known issue
Change-Id: Ib37215ca4c9b515e54054290952eed5034582ba4
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2019-03-28 14:25:09 +00:00
Ambroise Vincent 6192448a43 Documentation: update tested platforms
Update both the readme and user guide on their shared "platform"
section.

Change-Id: Ia1f30acda45ac8facdcb7d540800191cdf6cdacf
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-28 12:51:48 +00:00
Soby Mathew cc429178ce
Merge pull request #1906 from pbeesley-arm/pb/readme
doc: Prepare readme for 2.1 release
2019-03-27 12:08:16 +00:00
Soby Mathew 512650c348
Merge pull request #1907 from pbeesley-arm/pb/changelog
doc: Update change log for v2.1
2019-03-27 12:03:25 +00:00
Paul Beesley 9e437f2964 doc: Update change log for v2.1
Change-Id: Ib6a20ffdddad11b9629d7dca7f841182299bf860
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-27 10:53:45 +00:00
Ambroise Vincent 68126051d3 docs: Update user guide
Make sure the steps in the user guide are up to date and can be
performed out of the box.

Change-Id: Ib4d959aa771cf515f74e150aaee2fbad24c18c38
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-26 14:59:34 +00:00
Paul Beesley 9dc5f21ec2 doc: Add contents.rst to link to pages
This is the temporary contents page that links
to all other documents (except platform ports).

This page is needed during the
trustedfirmware.org migration, before we have a
Sphinx rendering pipeline set up, because cgit
doesn't offer a good way to view rendered docs
while browsing the tree. We need to have a links
page that can be opened from the cgit 'about'
view.

Change-Id: I3ad87a9fa8a14dc8e371aac7ee473575fed316bf
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-26 14:49:17 +00:00
Dimitris Papastamos 46d58f80af
Merge pull request #1902 from jts-arm/romlib
ROMLIB bug fixes
2019-03-21 12:40:35 +00:00
John Tsichritzis ae2e01b876 ROMLIB bug fixes
Fixed the below bugs:
1) Bug related to build flag V=1: if the flag was V=0, building with
ROMLIB would fail.
2) Due to a syntax bug in genwrappers.sh, index file entries marked as
"patch" or "reserved" were ignored.
3) Added a prepending hash to constants that genwrappers is generating.
4) Due to broken dependencies, currently the inclusion functionality is
intentionally not utilised. This is why the contents of romlib/jmptbl.i
have been copied to platform specific jmptbl.i files. As a result of the
broken dependencies, when changing the index files, e.g. patching
functions, a clean build is always required. This is a known issue that
will be fixed in the future.

Change-Id: I9d92aa9724e86d8f90fcd3e9f66a27aa3cab7aaa
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2019-03-21 10:51:07 +00:00
Dimitris Papastamos cc0dcf428f
Merge pull request #1899 from jts-arm/docs
Add USE_ROMLIB build option to user guide
2019-03-20 12:36:17 +00:00
John Tsichritzis 5a8f0a3f74 Add USE_ROMLIB build option to user guide
Change-Id: I4261fec500184383980b7fc9475620a485cf6c28
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2019-03-19 12:21:37 +00:00
Alexei Fedorov 06715f85d1 Declare PAuth for Secure world as experimental
Declare ENABLE_PAUTH and CTX_INCLUDE_PAUTH_REGS
build options as experimental.
Pointer Authentication is enabled for Non-secure world
irrespective of the value of these build flags if the
CPU supports it.
The patch also fixes the description of fiptool 'help' command.

Change-Id: I46de3228fbcce774a2624cd387798680d8504c38
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2019-03-18 15:46:22 +00:00
Dimitris Papastamos d409c3eb3e
Merge pull request #1890 from jts-arm/mbedtls
Update documentation for mbed TLS v2.16
2019-03-15 15:27:59 +00:00
John Tsichritzis 62e2d97423 Update documentation for mbed TLS v2.16
Change-Id: I1854b5830dbd48e909a4ce1b931c13fb3e997600
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
2019-03-14 15:27:19 +00:00
Soby Mathew d7cf435bed
Merge pull request #1859 from JackyBai/master
refact the imx8m common code and add the imx8mm support
2019-03-13 17:31:36 +00:00
Ambroise Vincent be10dcde52 Cortex-A17: Implement workaround for errata 852423
Change-Id: I3a101e540f0b134ecf9a51fa3d7d8e3d0369b297
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-13 15:40:45 +00:00
Ambroise Vincent 0b64c19485 Cortex-A17: Implement workaround for errata 852421
Change-Id: Ic3004fc43229d63c5a59ca74c1837fb0604e1f33
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-13 15:40:45 +00:00
Soby Mathew ab15922ebd
Merge pull request #1884 from AlexeiFedorov/af/set_march_to_arch_minor
Allow setting compiler's target architecture
2019-03-13 15:36:58 +00:00
Ambroise Vincent 5f2c690d0e Cortex-A15: Implement workaround for errata 827671
This erratum can only be worked around on revisions >= r3p0 because the
register that needs to be accessed only exists in those revisions[1].

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0438g/CIHEAAAD.html

Change-Id: I5d773547d7a09b5bd01dabcd19ceeaf53c186faa
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-13 14:05:47 +00:00
Ambroise Vincent 75a1ada95e Cortex-A15: Implement workaround for errata 816470
Change-Id: I9755252725be25bfd0147839d7df56888424ff84
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-03-13 14:05:47 +00:00
Jacky Bai 179f82a2c6 plat: imx8m: Add the basic support for imx8mm
The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-art media-specific
features with high-performance processing while optimized
for lowest power consumption. The i.MX 8M Mini Media Applications
Processor is  14nm FinFET product of the growing i.MX8M family
targeting the consumer & industrial market. It is built in 14LPP
to achieve both high performance and low power consumption
and relies on a powerful fully coherent core complex based on
a quad Cortex-A53 cluster with video and graphics accelerators

this patch add the basic support for i.MX8MM.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-03-13 10:14:59 +08:00
Alexei Fedorov fa6f774b28 Allow setting compiler's target architecture
Change-Id: I56ea088f415bdb9077c385bd3450ff4b2cfa2eac
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2019-03-12 17:04:50 +00:00
Paul Beesley 0c6be93fc2 doc: Add and correct headings for imported files
Some files imported from the wiki are missing RST section headers and
other files are using inconsistent characters for the same header level.

Change-Id: I318c843f9bc8fb40074ef90827b9acac06463662
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-07 11:23:32 +00:00
Paul Beesley 12fc6ba73d doc: Add missing CVE links to advisories
Some security advisories did not contain a direct link to the CVE page
on mitre.org.

Change-Id: I80f8f27a25da3a76b564a3e49cafe5e253379f37
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-07 11:23:32 +00:00
Joel Hutton d0f9809d89 doc: Update links within imported wiki content
This patch covers two changes:

- Links that refer to GitHub are updated to point to the
  relevant content on trustedfirmware.org

- Internal links between documents have been updated,
  with the required .rst suffix being added or due
  to a change in the relative locations of the files.

Change-Id: Ibf87da7d2ece726d1c94a9b33a2bbc3129de7779
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-07 11:23:32 +00:00
Joel Hutton 4fe9123024 doc: Migrate a subset of the GitHub wiki content
With the TF wiki being migrated from GitHub to trustedfirmware.org,
some documents will be moved into the docs/ directory within the
repository rather than remaining as external content. The
appropriate action has been decided on a per-document basis.

Change-Id: Id0f615f3418369256f30d2e34e354a115389d105
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-07 11:23:32 +00:00
Paul Beesley 3d20bf716b Remove todo from example code
Keeping that in the docs is a bit untidy

Change-Id: Ia95246208cee48df1536b4317a8c896ab2c84fc2
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-03-06 10:27:57 +00:00
Sandrine Bailleux bd587e8375 Doc: Fix internal links in interrupt framework design guide
Some of the sections numbers have been incorrect since the document
structure has changed. Using references to sections rather than
hard-coded section numbers fixes the issue while making it more
future-proof to updates.

Change-Id: I80f5ab6a55a0073b1562a02ce2c9ec7d67cddfff
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
2019-03-01 14:42:39 +01:00